Transcript Semiconductor Device Modeling and Characterization – EE5342 Lecture 34 – Spring 2011 Professor Ronald L.

Semiconductor Device Modeling
and Characterization – EE5342
Lecture 34 – Spring 2011
Professor Ronald L. Carter
[email protected]
http://www.uta.edu/ronc/
The npn Gummel-Poon Static Model
C
RC
B
RBB
B’
ILC
IBR
ILE
IBF
ICC - IEC =
IS(exp(vBE/NFVt
- exp(vBC/NRVt)/QB
RE
E
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Gummel Poon npn
Model Equations
IBF = ISexpf(vBE/NFVt)/BF
ILE = ISEexpf(vBE/NEVt)
IBR = ISexpf(vBC/NRVt)/BR
ILC = ISCexpf(vBC/NCVt)
QB = (1 + vBC/VAF + vBE/VAR ) 
{½ + [¼ + (BFIBF/IKF + BRIBR/IKR)]1/2 }
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Values for fms
with metal gate

 NCNa  
Al to p - Si : fms  fm,Al    Si  Vt ln 2  
 ni  

 NCNa  Eg
 Na 
 Vt ln 
Note : Vt ln 2  
 ni 
 ni  2q

 NC  
 
Al to n - Si : fms  fm,Al    Si  Vt ln

N
 d 

fm,Al  4.28, Si  4.05, ni  1.45E10
NC  2.8E19, Eg  1.12, Vt  0.02586
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Values for fms
with silicon gate
n

poly to p - Si : fms

 NCNa  
 Si   Si  Vt ln 2  
 ni  

 NCNa  Eg
 Na 
Note : Vt ln 2    Vt ln 
 ni 
 ni  2q
Eg 
 NC  

p poly to n - Si : fms  Si    Si  Vt ln  
q 
 Nd  
 NC  Eg
 Nd 
Note : Vt ln    Vt ln 
Nd  2q
 ni 

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Typical fms values
fms
(V)
Fig 10.15*
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NB (cm-3)
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Flat band with oxide
charge (approx. scale)
If a charge Q'ss is
at the Ox/Si bound,
then at FB cond a
Al
q(Vox)
+<--Vox-->-
charge Q'm  Q'ss is q(fm-ox)
on the gate surface
E
'
Qss
1 dEc VOx
Ex 


 Ox q dx xOx
VFB  f ms  VOx  f ms
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'
Qss
 '
COx
p-Si
SiO2
Fm
q(VFB)
Ec,Ox q(f - )
fp ox
Ex
Eg,ox
Ec
~8eV
EFi
Ev
EFp
VFB= VG-VB, when
Si bands are flat
Ev
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Flat-band parameters
for n-channel (p-subst)
p  substrate : VFB  fms
Q'ss

C'Ox
 Ox
C'Ox 
, Q'ss is the Ox/Si chg den
xOx
For a n  poly - Si gate, f s  fm   s
fms
 NcNa 
 Eg
 Na  
 Vt ln 2     Vt ln    0
 ni  
 2q
 ni 
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Flat-band parameters
for p-channel (n-subst)
n  substrate : VFB  fms
Q'ss

(no change)
C'Ox
Ox
C'Ox 
, Q'ss is the Ox/Si chg den
xOx
For a p  poly - Si gate, f s  fm   s 
 NvNd   Eg
 Nd  
fms  Vt ln 2     Vt ln    0
ni   2q
 ni  
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Eg
q
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Inversion for p-Si
Vgate>VTh>VFB
EOx,x
VOx

0
xOx
Vgate> VFB
 Induced ESi
 0 depletes
 Induced ESi
above threshold
for inversion
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EOx,x> 0
e- e- e- e- e-
Depl Reg
Acceptors
Vsub = 0
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Approximation concept
“Onset of Strong Inv”
• OSI = Onset of Strong Inversion
occurs when ns = Na = ppo and VG = VTh
• Assume ns = 0 for VG < VTh
• Assume xdepl = xd,max for VG = VTh and
it doesn’t increase for VG > VTh
• Cd,min = Si/xd,max for VG > VTh
• Assume ns > 0 for VG > VTh
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MOS Bands at OSI
p-substr = n-channel
Fig 10.9*
qfp
2q|fp|
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xd,max
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Computing the D.R.
W and Q at O.S.I.
Ex
Emax

2Si 2 f p
xd ,max 
q
dEx

Na
dx
Si

qNa
area  2 f p
x
Q'd,max  qNa xd,max
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Calculation of the
threshold cond, VT
The threshold condition is reached
when the surface is inverted. The
depletion region has reached the
value of xd,max and the extra charge
is Q'd,max  qNBxd,max (n - sub, p - sub)
VT  VFB  V, where V is the voltage
added to induce  Q'd,max across the Ox
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Equations for
VT calculation
p, n  substr : VT  VFB  2fp,n 
'
Qd,max
C'Ox
 Nd 
 ni 
fp  Vt ln    0, fn  Vt ln    0,
 Na 
 ni 
Q'd,max   qNa,d xd,max , xd,max 
2 2fp,n
qNa,d
V  0 for p - substr,  0 for n - substr
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Fully biased n-MOS
capacitor
VG
Channel if
V G > VT
VS
VD
EOx,x> 0
e- e- e- e- e- e-
n+
n+
p-substrate
Depl Reg
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Acceptors
Vsub=VB
0
y
L
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MOS energy bands at
Si surface for n-channel
Fig 8.10**
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Computing the D.R.
W and Q at O.S.I.
Ex
Emax
xd ,max 

2Si 2 f p  (VB VS )

qNa
q
dEx

Na
dx
Si
area  2 f p  (VB VS )
x
Qd,max  qNa xd,max
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Q’d,max and xd,max for
biased MOS capacitor
Fig 8.11**
xd,max
(mm)
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Q'd,max
q
-2
(cm )
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Fully biased nchannel VT calc
p  substrate : VG, at threshold  VT
VT  VC  VFB  2fp 
Q'd,max
 VFB  V
C'Ox
 ni 
fp  Vt ln   0, Q'd,max  qNa xd,max ,
 Na 
xd,max 
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

2 2 fp  VB  VC 
qNa
, V  0
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n-channel VT for
VC = VB = 0
Fig 10.20*
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References
* Semiconductor Physics & Devices, by
Donald A. Neamen, Irwin, Chicago,
1997.
**Device Electronics for Integrated
Circuits, 2nd ed., by Richard S. Muller
and Theodore I. Kamins, John Wiley
and Sons, New York, 1986
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