Transcript CSCE 385: Computer Architecture Measuring Performance Performance • Can be defined in several ways • Execution Time/Response Time ▫ Time between the start and.

CSCE 385: Computer Architecture
Measuring Performance
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Performance
• Can be defined in several ways
• Execution Time/Response Time
▫ Time between the start and completion of a task
• Throughput/Bandwidth
▫ Total amount of work/tasks done in a given time
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Relative Performance
• Performance = 1 / Execution_Time
▫ Execution_Time = seconds per program
• A is n times faster than B
▫ A is n times as fast as B
▫ PerformanceA / PerformanceB = n
• If A is n times faster than B, then the execution
time on B is n times longer than it is on A
▫ Execution_TimeB / Execution_TimeA = n
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CPU Execution Time/CPU Time
• The time the CPU spends computing a task
– Does not include time waiting for I/O or running
other programs
• User CPU Time
– CPU time spent in program
• System CPU Time
– CPU time spent in OS performing tasks on behalf
of the program
• Differentiating User and System CPU Time can
be difficult
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The Clock
• Clock Cycle/Clocks/Cycles
– Discrete time intervals that determine when
events take place in the hardware
• Clock Period/Clock Cycle Time
– The time for a complete clock cycle (e.g. 400 ps)
• Clock Rate/Clock Frequency
– Inverse of Clock Period (e.g. 2.5 GHz)
• CPU Execution Time for a program =
– CPU clock cycles for a program × Clock cycle time
– CPU clock cycles for a program / Clock rate
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Clock Cycles per Instruction (CPI)
• Average clock cycles per instruction
• CPU Clock Cycles = Instr. for a program × CPI
• Instruction Count
▫ The number of instructions executed by a program
▫ CPU Time = Instruction count × CPI × Clock cycle
time
▫ CPU Time = Instruction count × CPI / Clock rate
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Performance is impacted by…
• Performance is:
▫ Instruction count
▫ CPI
▫ Clock rate
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Algorithm
Programming language
Compiler
ISA
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Performance using MIPS
• MIPS = Million Instructions per Second
▫ MIPS = Instruction Count / (Execution Time × 106)
• Problems
▫ Cannot compare computers with different
instruction sets
▫ MIPS varies between programs on the same
computer
▫ MIPS can vary independently of performance
 If a computer executes more instructions, but each
instruction is faster
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Amdahl’s Law
• The performance enhancement possible with a
given improvement is limited by the amount that
the improved feature is used
▫ Diminishing returns
• Make the common case fast
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Speedup
• Speedup due to enhancement “E”
▫ Speedup (new) = Exec_Time (old) / Exec_Time (new)
Exec_Time (w/o E) / Exec_Time (w/E)
▫ Speedup (new) =
Performance (new) / Performance (old)
Performance (w/E) / Performance (w/o E)