Transcript Reduced Rate Switching in Optical Routers using Prediction Ritesh K. Madan, Yang Jiao EE384Y Course Project.

Reduced Rate Switching in
Optical Routers using Prediction
Ritesh K. Madan, Yang Jiao
EE384Y Course Project
Outline
• Motivation for reduced rate switching
• A generalized architecture in optical switching
• Delay analysis for the architecture
Motivate the choice of architecture and prediction
• Prediction using Least Mean Square Algorithm
• Convergence of prediction algorithm and stability
• Effectiveness of prediction through simulation results
Reduced Rate Switching Architectures
• Why?
Using a optical switching element could use less power, simplify
architecture
But it takes a while to reconfigure (~ sec)
Reduced Rate Switching Architectures
• A switching element takes multiple time slots to change between
configurations.
• During the transition, the switch can not transfer packets.
time
Decision
Time
MWM schedule based on
current VOQ sizes
Switch transfer packets
based the schedule
Reduced Rate Switching Architectures
• A switching element takes multiple time slots to change between
configurations.
• During the transition, the switch can not transfer packets.
• Multiple switches can be time multiplexed, so that for any time
slot, one of switches can transfer packets.
time
Decision
Time
Reduced Rate Switching Architectures
• A switching element takes multiple time slots to change between
configurations.
• During the transition, the switch can not transfer packets.
• Multiple switches can be time multiplexed, so that for any time
slot, one of switches can transfer packets.
• Or, keep a switching element in a configuration for more than
one time slot,
time
Decision
Time
Burst
Length
Reduced Rate Switching Architectures
• A switching element takes multiple time slots to change between
configurations.
• During the transition, the switch can not transfer packets.
• Multiple switches can be time multiplexed, so that for any time
slot, one of switches can transfer packets.
• Or, keep a switching element in a configuration for more than
one time slot, so a less number of switches can be used.
time
Decision
Time
Burst
Length
Architecture Choice
• Decision time = m
• Burst Length = k
• Number of switches needed = m/k+1
• Example
m=8, k=4, need 3 switches:
time
Burst
Length
Decision
Time
t
t+m
t+m+k
• How many switches should we use?
Effect of Burst Length
Reduced Rate Switching Performances
6X6
Uniform Traffic
Decision Time=32
35
30
MWM
Burst Length=2 (17 switches pipelined)
Burst Length=8 (5 switches pipelined)
Burst Length=32 (2 switches pipelined)
average queue length
25
20
15
10
5
0
0.00
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
load
• Rapidly diminishing benefit of increasing the number of switches
Effect of Burst Length
Reduced Rate Switching Performances
6X6
Uniform Traffic
Decision Time=32
35
30
average queue length
25
MWM
Burst Length=2 (17 switches pipelined)
Burst Length=8 (5 switches pipelined)
Burst Length=32 (2 switches pipelined)
Burst Length=32 Speedup = 2
Burst Length=32 Speedup = 8
Burst Length=32 Speedup = 32
20
15
10
5
0
0.00
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
load
• Rapidly diminishing benefit of increasing the number of switches
• Speedup does not help much
• Where is the delay coming from?
Where is the delay from?
• Bound on average delay can be obtained:
– by method proposed by Devavrat et. al. 02.
– Or by the drift analysis method proposed by Leonardi et. al. 01.
• For uniform i.i.d. traffic, the bound is:
( N   2 )N
N

N (m  k )
1 
2(1   )
 is the load at a input, N is the number of inputs
• Does the average queue size really have a linear dependency
on m + k ?
time
Burst
Length
Decision
Time
t
t+m
t+m+k
Key observation
• Decision time = m and Burst length = k has the accumulative
effect of increasing the delay by ~ m + k :
Decision time:
VOQ’s that should be served m time slots ago are served
now.
Burst length:
Effect of arrivals from t-k to t will not show up until time t.
arrivals
time
Burst
Length
Decision
Time
t-k
t
t+m
t+m+k
Key observation
• Decision time = m and Burst length = k has the accumulative
effect of increasing the delay by ~ m + k
• How do we reduce the delay caused by the decision time and
burst length, while using only 2 switches?
arrivals
time
Burst
Length
Decision
Time
t-k
t
t+m
t+m+k
Key observation
• Decision time = m and Burst length = k has the accumulative
effect of increasing the delay by ~ m + k
• How do we reduce the delay caused by the decision time and
burst length, while using only 2 switches?
– Prediction!
– Intuition:
• at time = t, correctly guessing the VOQ sizes at t + m eliminates the
delay caused by the Decision Time
arrivals
time
Burst
Length
Decision
Time
t-k
t
t+m
t+m+k
Effect of prediction
Reduced Rate Switching Performances
6X6
Uniform Traffic
Decision Time=32
35
30
average queue length
25
MWM
Burst Length=2 (17 switches pipelined)
Burst Length=8 (5 switches pipelined)
Burst Length=32 (2 switches pipelined)
Burst Length=32 With Perfect Prediction
20
15
10
5
0
0.00
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
load
• Prediction reduces the wait time for the queue that should be
served.
Scheduling Scheme
• To decide schedule for burst (n+1)
– observe VOQ at beginning of burst n (decision
instant)
– predict arrivals during burst n
– know departures during burst n
– do MWM on
lij (n 1)pred  lij (n)  dij (n)  aij (n)pred
time
Decision
Time
burst n
Burst
Length
burst (n+1)
Adaptive Linear Prediction
L
apred [n  1]   wi [n]a[n  i ]
i 0
 WnT A n
• wi[n] are the weights at beginning of burst n
• a[n] are the arrivals to a single VOQ during burst n
• weights are adapted with time
Prediction Scheme
a[n]
apred[n]
a[n-1]
Adaptive linear combiner
with (L+1) weights
z-1
a[n]
+
e[n]
copy
weights
error signal for adaptation
Adaptive Linear Combiner
with (L+1) weights
apred[n+1]
Adaptation of weights using LMS
a[n-1]
a[n-2]
a[n-L-1]
z-1
z-1
w0[n-1]
w1[n-1]
…
z-1
wL [n-1]
…
a[n]
(true value)
Error
e[n]
apred[n]
Wn  Wn1  2 e[n]An1
(predicted
value)
Convergence of LMS
For second order stationary arrivals,
•Convergence is guaranteed if
1
0 
( L  1)E{a 2 [n]}
• Rate of convergence

1

Stability of Scheduling Algorithm
• Theorem 1:
Under Bernoulli i.i.d. arrivals, MWM on predicted
queue lengths gives 100% throughput for any
decision time and burst length
• Proof:
Decision time + burst length = m + k < infinity
=> Number of arrivals in m + k time slots is finite
=> For stationary arrivals the weight vector
converges
=> Error in guessing the queue length is bounded
=> WMWM - Wpred < C
=> 100% throughput
Simulation (6X6 Switch)
R[m]  a
m
with =1333, a=0.5
decision time = burst length =64