Radiation Effects on the Aeroflex RadHard Eclipse FPGA Ronald Lake Aeroflex Colorado Springs Lake C3 / MAPLD2004
Download ReportTranscript Radiation Effects on the Aeroflex RadHard Eclipse FPGA Ronald Lake Aeroflex Colorado Springs Lake C3 / MAPLD2004
Radiation Effects on the Aeroflex RadHard Eclipse FPGA Ronald Lake Aeroflex Colorado Springs Lake 1 C3 / MAPLD2004 RadHard Eclipse Radiation Effects Overview • Test Techniques • Single Event Effects Results – Single Event Upset – Single Event Latch-up • Total Ionizing Dose – DC Characteristics – AC Characteristics • TMR Effects on SEU • Summary Lake 2 C3 / MAPLD2004 Hardness Testing Conditions - SEE • SEU - 25oC, 2.25V core and 3.0V I/O, in accordance with EIA/JESD57 • SEU - FPGA programmed (configured) with three data storage components – Dynamic Shift Registers - Two at 560 bits – Static Register File - 64 x 16 bits – Static RAM - 55,296 bits • SEL - 125oC, 2.7V core and 3.6V I/O, in accordance with EIA/JESD57 • 208-lead ceramic quad flat-pack (CQFP) Lake 3 C3 / MAPLD2004 Hardness Testing Conditions - SEU • Alternating ones and zeros data used for all three storage components of the FPGA • National Instruments tester at 1MHz frequency – Write/read shift register – Read only register file and RAM – After a cell upsets, the correct data is re-written to the cell • Texas A&M University Cyclotron Institute – Au, Kr, and Ar from 0o (normal incidence) to 60o Lake 4 C3 / MAPLD2004 Heavy Ion Beam For SEU Analysis Lake 5 C3 / MAPLD2004 Hardness Testing Conditions - SEL • Devices statically biased during irradiation – Supply currents monitored for latch-up • Lawrence Berkeley National Laboratory – Au at 41o – Effective fluence at 1E7 ions/cm2 – Effective LET = 120 MeV-cm2/mg • Devices functionally re-verified after irradiation Lake 6 C3 / MAPLD2004 Heavy Ion Chamber for SEL Analysis Lake 7 C3 / MAPLD2004 Hardness Testing Conditions - TID • Irradiated under worst case temperature (25oC) and static bias conditions (max VDD) per MIL-STD-883E Method 1019 • FPGA programmed with 60 AC paths • J.L. Shepherd model 81-22 Cobalt 60 gamma cell Lake 8 C3 / MAPLD2004 Cobalt 60 Total Ionizing Dose System Lake 9 C3 / MAPLD2004 Single Event Upset Data Plot 1.0E-07 2 Cross-section (cm /bit) 1.0E-06 1.0E-08 Register File RegF Weibull Shift Reg ShiftR Weibull RAM RAM Weibull 1.0E-09 1.0E-10 0 20 40 60 80 100 2 LET (MeV-cm /mg) Lake 10 C3 / MAPLD2004 Hardness Results - SEE SEU - Error-rates - GEO orbit, Adam’s 90% WC FPGA Component Temp (C) RegF ShiftR RAM 25 25 25 Saturated VDD Number Onset LET Weibull Weibull Error-rate X-section Core & I/O of storage 2 Shape Width MeV-cm /mg (errors/bit-day) (V) cells (cm2/bit) 2.25/3.00 1,024 1.4 90 2.0E-07 20 4.7E-09 2.25/3.00 1,120 1.4 55 4.0E-07 14 3.6E-08 2.25/3.00 55,296 1.95 125 9.0E-08 17.5 6.3E-10 SEL - No latch-up to 120 MeV-cm2/mg Conditions VDD I/O, VDD Core, Temp Fluence Effective Flux Normal LET, Angle Effective LET SN Ion Latchup (normal) Fluence 2 MeV-cm²/mg degrees ions/cm -s 2 2 MeV-cm²/mg ions/cm ions/cm 3.6, 2.7, 125C 24 Au 3.6, 2.7, 125C 10 Au 3.6, 2.7, 125C 22 Au 3.6, 2.7, 125C 2 Au 90.3 90.3 90.3 90.3 41 41 41 41 7.8E+04 6.9E+04 6.0E+04 6.3E+04 0 0 0 0 1.3E+7 1.3E+8 1.3E+7 1.3E+7 1.0E+7 1.0E+8 1.0E+7 1.0E+7 120 120 120 120 TID - 113 rads(Si)/s FPGA meets datasheet ACs and DCs post 300 krad(Si) Lake 11 C3 / MAPLD2004 Hardness Results - TID - Supply Current DCs Most Shifted DCs - Post radiation minus Pre-rad Temp (C) 25 25 25 25 25 25 25 Test Condition QIDD AIDD AIDD AIDD AIDD AIDD AIDD 1 MHz 5 MHz 10 MHz 20 MHz 50 MHz 100 MHz Lake VDD VDD Core (V) I/O (V) 2.7 3.6 2.7 3.6 2.7 3.6 2.7 3.6 2.7 3.6 2.7 3.6 2.7 3.6 Units Pre-rad mA mA mA mA mA mA mA 0.19 198 304 437 688 1393 1660 12 Post Post Delta Delta 100k rad 300k rad 100k - Pre 300k - Pre 0.2 3.5 0.01 3.31 203 631 5 433 309 732 5 428 442 860 5 423 688 1110 0 422 1402 1770 9 377 1643 1813 -17 153 C3 / MAPLD2004 Hardness Results - 100 krad(Si) TID - ACs 5 most shifted ACs on each of 2 devices Post 100 krad(Si) minus Pre irradiation SN Temp 25 25 25 25 25 26 26 26 26 26 25 25 25 25 25 25 25 25 25 25 Test TPLH_sr_16_2_a21 TPHL_sr_16_2_a21 TPLH_sr_16_2_f21 TPHL_sr_16_2_qb2 TPHL_sr_16_2_qa2 TPHL_sr_16_2_qa2 TPHL_sr_16_2_a21 TPHL_sr_16_2_f21 TPHL_sr_16_2_qb2 TPHL_sr_16_2_qa2 Lake VDD VDD Post % Units Pre-rad Post-Pre Core (V) I/O (V) 100 krad Change 2.5 3 ns 7.73 7.66 -0.07 -0.96 2.5 3 ns 9.08 8.98 -0.09 -1.02 2.5 3 ns 7.47 7.38 -0.09 -1.24 2.5 3 ns 5.62 5.54 -0.07 -1.32 2.5 3 ns 5.57 5.50 -0.07 -1.33 2.7 3.6 ns 5.14 5.13 -0.07 -1.25 2.5 3 ns 9.08 9.17 -0.12 -1.30 2.5 3 ns 8.55 8.71 -0.14 -1.57 2.5 3 ns 5.62 5.67 -0.10 -1.77 2.5 3 ns 5.57 5.56 -0.10 -1.80 13 C3 / MAPLD2004 Hardness Results - 300 krad(Si) TID - ACs 5 most shifted ACs on 2 devices Post 300 krad(Si) minus Pre irradiation SN Temp 25 25 25 25 25 26 26 26 26 26 25 25 25 25 25 25 25 25 25 25 Test TPLH_inv_ch_i3_t TPLH_inv_ch_i2_t TPHL_inv_ch_i1_t TPHL_nand16_o2 TPHL_nand16_o0 TPLH_inv_ch_i2_t TPHL_inv_ch_i1_t TPHL_sr_d_so TPLH_inv_ch_i3_t TPLH_inv_ch_i2_t Lake VDD VDD Post % Units Pre-rad Post-Pre Core (V) I/O (V) 300 krad Change 2.5 3 ns 152.1 160.8 8.7 5.7 2.5 3 ns 155.4 164.3 8.9 5.7 2.5 3 ns 154.6 163.4 8.8 5.7 2.5 3 ns 52.8 55.7 2.9 5.5 2.5 3 ns 52.2 55.1 2.9 5.5 2.5 3 ns 156.7 163.8 7.1 4.5 2.5 3 ns 155.8 162.8 7.0 4.5 2.5 3 ns 5.9 6.1 0.3 4.4 2.5 3 ns 153.3 160.0 6.7 4.4 2.7 3.6 ns 144.4 150.0 5.7 3.9 14 C3 / MAPLD2004 RadHard Eclipse Single Voter TMR w_set w_reset w_set w_reset I71 PRE CLR N_1 D w_set w_reset I715 PRE CLR Q D DFFPC w_dedclk w_set w_reset w_dedclk w_set w_reset I61 PRE CLR N_1 D w_dedclk w_set w_reset I714 PRE CLR S1 S0 Q D DFFPC MUX4x0 w_dedclk w_set w_reset I51 PRE CLR D w_dedclk w_set w_reset I713 PRE CLR Q D DFFPC Q DFFPC w_dedclk Lake Q DFFPC w_dedclk w_set w_reset N_1 Q DFFPC w_dedclk 15 w_dedclk C3 / MAPLD2004 RadHard Eclipse Single Voter Data 1E-5 No TMR Shift Register No TMR Weibull TMR Single Voter 1E-6 Cross Section (cm 2 / bit) TMR SV Weibull 1E-7 1E-8 No errors at LET of 64 MeV-cm 2/mg. Not tested between LET of 64 and 90 MeV-cm2/mg 1E-9 1E-10 0 20 40 60 80 100 2 LET (MeV-cm /m g) Saturated VDD Onset LET Temp Weibull Weibull Error-rate X-section Core & I/O 2 (C) Shape Width MeV-cm /mg (errors/bit-day) (V) (cm2/bit) No TMR 25 2.25/3.00 1.4 55 4.0E-07 14 3.6E-08 TMR Single Voter 25 2.25/3.00 1.8 25 7.0E-08 64 2.3E-10 TMR Triple Voter * 25 2.25/3.00 1.8 25 7.0E-09 100 5.3E-15 FPGA Component Error-rates based on SpaceRadiation 4.0 Weibull analysis, Geo orbit, Adam’s 90% WC environment * Estimate based on assumed onset LET of 100 and saturated x-section of 7E-9 Lake 16 C3 / MAPLD2004 RadHard Eclipse Single Voter Data Cross Section (cm 2 / bit) 1E-5 030927 BNL 1E-6 Weibull 030927 QL BNL 031106 LBNL 1E-7 031212 LBNL BNL QL FPGA 040629 SN A 1E-8 040629 SN B 040629 SN C 040629 SN D 1E-9 040219 BNL 1E-10 0 20 40 60 80 100 120 LET (MeV-cm 2/m g) 8/17/4 TMR2 Data : TAMU Lake 17 C3 / MAPLD2004 Summary • Completed RadHard Eclipse FPGA pre-qualification evaluation of radiation performance – Low Single Event Upset error rate (geosynchronous orbit, Adams 90% worst case environment) – Single Event Latch-up immune to > 108 MeV-cm2/mg – Passes datasheet parameters to > 300 krad(Si) Total Ionizing Dose – TMR design maps well to logic cell architecture • Offered as a flight qualified QML Q & V RadHard Standard Microcircuit Drawing device Lake 18 C3 / MAPLD2004