Transcript Lecture #34 OUTLINE The MOS Capacitor: • MOS non-idealities (cont.) • VT adjustment Reading: Chapter 18.3 Spring 2007 EE130 Lecture 34, Slide 1

Lecture #34
OUTLINE
The MOS Capacitor:
• MOS non-idealities (cont.)
• VT adjustment
Reading: Chapter 18.3
Spring 2007
EE130 Lecture 34, Slide 1
Poly-Si Gate Depletion
• A heavily doped film of polycrystalline silicon (poly-Si)
is typically employed as the gate-electrode material in
modern MOS devices.
NMOS
PMOS
N+ poly-Si
P+ poly-Si
P-type Si
n-type Si
– There are practical limits to the electrically active dopant
concentration (usually less than 1x1020 cm-3)
 The gate must be considered as a semiconductor, rather
than a metal
Spring 2007
EE130 Lecture 34, Slide 2
MOS Band Diagram with Gate Depletion
Si biased to inversion:
WT
Ec
qVpoly
qfS
EFS
Ev
Qinv  Cox (VG Vpoly VT )
qVG
Ec
Ev
VG is effectively reduced:
W poly 
2 SiV poly
qN poly
Wpoly
N+ poly-Si gate
Spring 2007
P-type Si
EE130 Lecture 34, Slide 3
How can gate depletion
be minimized?
Gate Depletion Effect
Gauss’s Law dictates
Wpoly   oxEox / qN poly
xo is effectively increased:
1
N+ poly-Si
Cpoly
+ + + + + + + +
Cox
N+
- - - - - - - - -
p-type Si
 xo
 1
W poly 
1 



C



C

  SiO

C

ox
poly
Si


2



 SiO
2
xo  (W poly / 3)
Qinv  (VG  VT ) 
Spring 2007
EE130 Lecture 34, Slide 4
 SiO
2
xo  (Wpoly / 3)
1
Example: GDE
Vox , the voltage across a 2 nm thin oxide, is 1 V. The n+
poly-Si gate active dopant concentration Npoly is 8 1019 cm-3
and the Si substrate doping concentration NA is 1017cm-3.
Find (a) Wpoly , (b) Vpoly , and (c) VT .
Solution:
(a)
Wpoly   oxEox / qN poly   oxVox / x o qN poly

3.9  8.85 10 14 (F/cm) 1 V

7
19
3
19





2 10 cm 1.6 10 C 8 10 cm
 1.3 nm
Spring 2007
EE130 Lecture 34, Slide 5
(b)
W poly 
2 SiV poly
qN poly
2
Vpoly  qNpolyWpoly
/ 2 Si  0.11V
(c)
VT  VFB  2fF  Vox  V poly
 EG kT  N A 
  0.98 V
VFB   

ln
 2q q  ni 
VT  0.98 V  0.84 V  1 V  0.11 V  0.97 V
Is the loss of 0.11V significant?
Spring 2007
EE130 Lecture 34, Slide 6
Inversion-Layer Thickness Tinv
The average inversion-layer location below the Si/SiO2 interface
is called the inversion-layer thickness, Tinv .
poly-Si gate
SiO2
Si
Electron Density
Quantum
mechanical theory
-50 -40 -30 -20 -10
Spring 2007
0
10
20
EE130 Lecture 34, Slide 7
30
40
50
Å
Effective Oxide Thickness, Toxe
Toxe
Wpoly
Tinv
 xo 

3
3
at VG=Vdd
(VG + VT)/Toxe can be shown to be the average electric field in the
inversion layer. Tinv of holes is larger than that of electrons because
of the difference in effective masses.
Spring 2007
EE130 Lecture 34, Slide 8
Effective Oxide Capacitance, Coxe
Tox  xo  Wpoly / 3  Tinv / 3
Qinv 
 ox
Toxe
(VG  VT )  Coxe (VG  VT )
C
Cox
Basic LF C-V
with gate-depletion
with gate-depletion and
charge-layer thickness
data
VG
Spring 2007
EE130 Lecture 34, Slide 9
VT Adjustment by Ion Implantation
• In modern IC fabrication processes, the threshold
voltages of MOS transistors are adjusted by ion
implantation:
– A relatively small dose NI (units: ions/cm2) of dopant atoms is
implanted into the near-surface region of the semiconductor
– When the MOS device is biased in depletion or inversion,
the implanted dopants add to the dopant-ion charge near the
oxide-semiconductor interface.
qNI
VT  
Cox
Spring 2007
N I  0 for donor atoms
N I  0 for acceptor atoms
EE130 Lecture 34, Slide 10