design and implementation of transformerless

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Transcript design and implementation of transformerless

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DESIGN AND IMPLEMENTATION OF TRANSFORMERLESS INVERTER WITH DC CURRENT ELIMINATION

Guided By Dr. Sasidharan Sreedharan Presented By, SUDHIN P.K

PGEE02012

CONTENTS

 OBJECTIVE      MOTIVATION LITERATURE REVIEW PROPOSED CONVERTER COMPLETE MODEL – BLOCK DIAGRAM EXPECTED OUTCOME   GANTT CHART REFERENCES

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OBJECTIVE

 Phase I : i.

ii.

Simulation : Transformerless Inverter Model Hardware implementation of Transformerless inverter (Off Grid Model)  Phase II : i.

PLL Design ii.

Grid Integration of Developed Model

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MOTIVATION

 Increasing demand of PV system   Development of Cost Effective system Complete elimination of CM leakage current

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WHY ‘LESS’ TOPOLOGY?

    Most Commercial PV inverters employ either line frequency or high-frequency isolation transformers . Increases – Size,Cost,Losses Transformerless Topology – Reduced Size, weight, cost and installation complexity Increases efficiency by 2%  produces Common Mode Leakage Current

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T

HE COMMON MODE LEAKAGE CURRENT

,

 increases the system losses  reduces the grid connected current quality  induces severe conducted and radiated electromagnetic interference  causes personal safety problems.

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Literature Review

Full H Bridge Topology [5] Half H Bridge Topology [5]

I. Simple Structure II. High EMI III. High Common mode Leakage Current I. Simple Structure II. High EMI III. High Common mode Leakage Current IV. High Voltage Stress across switches

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HERIC Topology [6] H5 Topology [7]

I. Large number of Switches II. Low EMI III. Low Common mode Leakage Current I. Less number of Switches II. Low EMI III. Low Common mode Leakage Current

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P

ROPOSED TOPOLOGY

: C

ONCEPT

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P

ROPOSED TOPOLOGY

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C

OMPARISON WITH

P

ATENTED

T

OPOLOGIES

Input Capacitors Input Capacitance Switches Diodes No of output voltage Levels Leakage Current HERIC (Sunways)

1 low 6 2 3 Very Low

H5 Topology (SMA)

1 low 5 0 3 Very Low

Proposed Topology

1 (but one additional switched capacitor) low 5 0 3 Nil

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C

OMPLETE MODEL 12/24 V (DC) DC-DC CONVERTER (MPPT) 400 V (DC) Triggering Pulses MICRO CONTROLLER V pv ,I pv

TRANSFORMER LESS INVERTER

220 V (AC) LOAD/ GRID Triggering Pulses (SPWM) MICRO CONTROLLER

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EXPECTED OUTCOME

  Simulation and Hardware implementation of Transformerless Inverter with complete DC current elimination.

Less voltage and current stress on switches in comparison with HERIC and H5 Topology

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GANTT CHART

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REFERENCES

[1] Gu, Yunjie, Wuhua Li, Yi Zhao, Bo Yang, Chushan Li, and Xiangning He.

"Transformerless Inverter with Virtual DC Bus Concept for Cost Effective Grid connected PV Power Systems." (2013): 1-1.

[2] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, “A review of single-phase grid connected inverters for photovoltaic modules,”

IEEE Trans. Ind.Appl.

, vol. 41, no. 5, pp. 1292–1306, Sep./Oct. 2005.

[3] T. Kerekes, R. Teodorescu, P. Rodr´ıguez, G. V´azquez, and E. Aldabas, “A new high-efficiency single-phase transformerless PV inverter topology,”

IEEE Trans. Ind.

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Electron.

, vol. 58, no. 1, pp. 184–191, Jan. 2011.

REFERENCES

[4] Yang, Bo, Wuhua Li, Yunjie Gu, Wenfeng Cui, and Xiangning He. "Improved transformerless inverter with common-mode leakage current elimination for a photovoltaic grid-connected power system."

Power Electronics, IEEE Transactions on

27, no. 2 (2012): 752-762.

[5] Patrao, Iván, Emilio Figueres, Fran González-Espín, and Gabriel Garcerá.

"Transformerless topologies for grid-connected single-phase photovoltaic inverters."

Renewable and Sustainable Energy Reviews

15, no. 7 (2011): 3423-3431.

[6] S. Heribert, S. Christoph, and K. Juergen, German Patent HERIC Topology,DE 10221592 A1, Apr. 2003.

[7] V. Matthias, G. Frank, B. Sven, and H. Uwe, German Patent H5 Topology,DE 102004030912 B3, Jan. 2006.

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