Transcript Thumb Programmers Model and Thumb Instruction Set By: Venkata Sai Manoj Pasupuleti Sathya Narasimman Jagannath Narasimhan.

Thumb Programmers
Model and Thumb
Instruction Set
By:
Venkata Sai Manoj Pasupuleti
Sathya Narasimman
Jagannath Narasimhan
Overview
Motivation for Thumb Instruction Set.
□ Example for ARM vs Thumb Code
□ Thumb Programmers Model
□ Thumb Inst. Set formats
□ Thumb ARM Instruction Mapping.
□ Disadvantages
□
Motivation to use Thumb Instructions
□ Cost-sensitive embedded control applications.
□ The Thumb (T32) instruction set provides a subset of the most
commonly used 32-bit ARM instructions
□ Thumb code is of smaller the size of ARM code, and provides
higher performance.
□ What Thumb Offers Designers:
Excellent code-density for minimal system memory size and cost
o 32-bit performance from 8- or 16-bit memory on an 8- or
16-bit data bus which allows for low system cost.
o
Plus the established ARM features
o Small die size for integration and minimum chip cost
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ARM VS THUMB CODES
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Programmers Model:
Registers in ARM and THUMB States
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Thumb Arm Instruction Mapping
Entering and Leaving Thumb
□ There are several ways to enter or leave the
Thumb state properly.
□ Branch and Exchange (BX) instruction.
□ Branch, Link, and Exchange (BLX)l.
□ LSB of Rm (Destination Address) (BX Rm)
□ 1 in ARM State → Thumb
□ 0 in Thumb State → ARM
Examples of BX and BLX
□ Bx Rm
■ Thumb version branch exchange
■ PC = Rm & 0xfffffffe, T = Rm[0]
□ BLX Rm
■ Thumb version branch exchange with link
■ pc = Rm & 0xfffffffe, T = Rm[0]
■ lr = address of next instruction after BLX+1
■ Again Conditional branch
Examples of BX and BLX
□ Handle unexpected situations, such as interrupts or memory
faults, also cover software interrupts, undefined instruction
traps, and the system reset
■ Exceptions generated as the direct effect of execution an
instruction
□ Software interrupts, undefined instructions, and
prefetch abort
■ Exceptions generated as a side effect of an instruction
□ Data aborts, Exceptions generated externally
□ Reset, IRQ and FIQ
Instruction Set- Format
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Move shifted register
Instructions:
1.LSL Rd,Rs, #Offset5
2.LSR Rd,Rs, #Offset5
3.ASR Rd,Rs, #Offset5
Ex:
LSR R2, R5, #27
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Add / Subtract
Instructions:
1.ADD Rd, Rs, Rn
2.ADD Rd, Rs, #Offset3
3.SUB Rd, Rs, Rn
4.SUB Rd, Rs, #Offset3
Examples:
1.ADD R0, R3, R4
2.SUB R0, R3, R4
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Move/Compare/Add/Subtract Immediate
Instruction:
1.MOV Rd, #Offset8
2.CMP Rd, #Offset8
3.ADD Rd, #Offset8
4.SUB Rd, #Offset8
Examples:
1.MOV R0, #128
2.CMP R2, #62
3.ADD R1, #255
4.SUB R6, #145
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ALU operations
1.AND Rd, Rs ->Rd:= Rd AND Rs
2.EOR Rd, Rs->Rd:= Rd EOR Rs
3.ADC Rd, Rs->Rd := Rd + Rs + C-bit
4.SBC Rd, Rs->Rd := Rd - Rs - NOT Cbit
5. ROR Rd, Rs->Rd := Rd ROR Rs
6.TST Rd, Rs->Set condition codes on Rd
AND Rs
7.NEG Rd, Rs->Rd = -Rs
8.CMP Rd, Rs->Set condition codes on Rd
- Rs
9. CMN Rd, Rs->Set condition codes on Rd
+ Rs
10.ORR Rd, Rs->Rd := Rd OR Rs
11. MUL Rd, Rs-> Rd := Rs * Rd
12.BIC Rd, Rs->Rd := Rd AND NOT Rs
13.MVN Rd, Rs-> Rd := NOT Rs
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Examples
1.EOR R3, R4 ;
2.ROR R1, R0 ;
3.NEG R5, R3 ;
4.CMP R2, R6 ;
5.MUL R0, R7 ;
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Thank You!!!
□ H