Transcript Recitation #9, Section F, 15-213, Sp 06 TA: Jernej Barbic Virtual memory Reminders:  Quiz today: virtual memory  Shell Lab due Thursday Modified from: Kun Gao’s and Minglong.

Recitation #9, Section F, 15-213, Sp 06
TA: Jernej Barbic
Virtual memory
Reminders:
 Quiz today: virtual memory
 Shell Lab due Thursday
Modified from:
Kun Gao’s
and
Minglong Shao’s
recitations,
Spring 2005,
Fall 2004
1
Virtual memory
 One of the most important concepts in CS
 Benefits of virtual memory (VM):





Use RAM as a cache for disk
Easier memory management
Simplifies linking and loading
Access protection
Share memory efficiently
2
Virtual memory
Memory
Per Process:
0:
1:
Page Table
Virtual
Addresses
0:
1:
Physical
Addresses
CPU
P-1:
N-1:
Disk
 Page hit: page is in memory
 Page fault: page is on disk
3
Virtual and physical addresses
p p–1
n–1
virtual page number (VPN)
page offset
0
virtual address
address translation
m–1
p p–1
physical page number (PPN)
0
page offset
physical address
Virtual Memory: up to 2n -1 bytes
Physical Memory: up to 2m -1 bytes
4
Page Table translates VPN to PPN
 Separate page table per each process
 VPN is the index into the page table
page table base register
VPN acts
as
table index
if valid=0
then page
not in memory
virtual address
n–1
p p–1
virtual page number (VPN)
page offset
0
valid access physical page number (PPN)
m–1
p p–1
physical page number (PPN)
page offset
physical address
0
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Translation Lookaside Buffer (TLB)
 Page table is in memory or even on disk
(slow access)
 TLB keeps things manageable
1. VA
CPU
4. PA
MMU/
Translation
2. VPN
3. PTE
Cache/Memory
TLB
5. Data
6
TLB and the L1-Cache
n–1
p p–1
0
virtual page number
page offset
valid
.
virtual address
tag physical page number
.
TLB
.
=
TLB hit
physical address
tag
index
valid tag
byte offset
data
L1-Cache
=
cache hit
data
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Worst case? (most delay)?
 TLB miss, page fault on page table, then page
fault on memory read
3. PTEA (PTBR + VPN)
1. VA
CPU
MMU/
Translation
2. VPN
5. PA
4. PTE
Cache/Memory
TLB
Page Fault/ Page Fault/
Page Table Mem Read
6. Data
DISK
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Example
 20-bit virtual addresses
 18-bit physical addresses
 Page size is 1024 bytes
 TLB is 2-way associative with 16 total entries
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Part 1
 A. Virtual address
TLBT
19
18
17
16
TLBI
15
14
13
12
11
10
9
8
7
6
VPN
5
4
3
2
1
0
3
2
1
0
VPO
 B. Physical address
17
16
15
14
13
PPN
12
11
10
9
8
7
6
5
4
PPO
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Example: TLB and page table
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Part 2
Virtual address 0x78E6
 A. 078E6 = 0000 0111 1000 1110 0110
 B. Address translation
parameter
VPN
TLB Index
Value
0x01E
0x6
Parameter
TLB hit?
Page fault?
Value
N
N
TLB Tag
0x03
PPN
0x57
 C. Physical address
01 0101 1100 1110 0110
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Part 2
Virtual address 0x04AA4
 A. 04AA4 = 0000 0100 1010 1010 0100
 B. Address translation
parameter
VPN
TLB Index
Value
0x012
0x2
Parameter
TLB hit?
Page fault?
Value
Y
N
TLB Tag
0x02
PPN
0x68
 C. Physical address
01 1010 0010 1010 0100
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Further material
 Section 10.6.4: a concrete example
 Read carefully and solve practice problem 10.4
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