Design and Scaling of SiGe BiCMOS VCOs Above 100GHz S. T. Nicolson1, K.H.K Yau1, K.A.
Download ReportTranscript Design and Scaling of SiGe BiCMOS VCOs Above 100GHz S. T. Nicolson1, K.H.K Yau1, K.A.
Design and Scaling of SiGe BiCMOS VCOs Above 100GHz S. T. Nicolson1, K.H.K Yau1, K.A. Tang1, P. Chevalier2, A. Chantre2 B. Sautreuil2, and S. P. Voinigescu1 1) Edward S. Rogers Sr. Dept. of Elec. & Comp. Eng., Univ. of Toronto 2) STMicroelectronics © Sean Nicolson, BCTM 2006 Outline • • • • • Motivation for W-band SiGe integrated circuits VCO design methodology for low phase noise in W-band Layout considerations Measurement results Conclusions and future work © Sean Nicolson, BCTM 2006 Motivation for W-band SiGe ICs • Typical applications: 77GHz auto radar, 94GHz weather radar, imaging – Central to these applications is the low phase noise VCO • Process development: NFmin, Rn & Ysopt difficult to measure in W-band – Use VCO as a process monitor for the noise performance of SiGe technologies • Explore VCO scaling/yield in SiGe © Sean Nicolson, BCTM 2006 VCO Topology • No cascode 2.5 V VCC LC CM – lower phase noise, lower supply voltage • Colpitts topology – maximize fosc relative to other topologies • Augment Cbe with Cext LB Q1 CextVBB 24mA VTUNE+ Cvar – Reduces phase noise VTUNE- LEE • Add negative Miller capacitors REE – Increases fosc by cancelling Cm CEE VTUNE • Differential tuning – reduces supply induced noise B bib RB cp rp E © Sean Nicolson, BCTM 2006 C Cext W-Band VCO Design Methodology • Use smallest realizable LB with adequate Q • Given fosc, maximize tuning range using large Cext f osc 1 Ceq 2p LB Ceq Cext Cp C var Cext Cp C var Cm • Negative resistance Rneg RB I C VT 2 Cext F I C VT Cvar Max. Rneg occurs at peak fT/fMAX bias • Phase noise formula S out 2 In 2 Vtank 1 2 1 2 2 C C Cext Cp 2 ext p 1 C var • Phase noise trade-off when HBT pushed to limit – Minimize HBT noise bias at NFmin current density – Maximize Vtank and Cext bias at peak fT current density © Sean Nicolson, BCTM 2006 VCO Fabrication • Fabricated in three technology splits: BiC9 fT = 150GHz fMAX = 160GHz BipX fT = 230GHz fMAX = 300GHz BipX1 fT = 270GHz fMAX = 260GHz emitter 4×5mm×0.17mm emitter 4×5mm×0.13mm emitter 4×5mm×0.13mm • All VCO layouts and bias currents are identical – no redesign • Directly compare VCOs fabricated in different processes • Use the VCO to optimize HBT profile – Noise parameters from phase noise – fMAX from VCO output power © Sean Nicolson, BCTM 2006 VCO Layout • VCO core area: 100mm × 100mm • Spiral inductors where necessary to reduce area • Plenty of supply decoupling (MiM and metal-metal) 70mm 100mm © Sean Nicolson, BCTM 2006 Technology Overview – fT/fMAX Scaling • Peak fT/fMAX current density increases at each technology node – 0.17mm SiGe JpeakfT = 7mA/mm2 where fT = 150GHz – 0.13mm SiGe JpeakfT = 14mA/mm2 where fT = 230GHz (or 250GHz) • Contrast with CMOS… – JpfT = 0.3mA/mm, JpfMAX = 0.2mA/mm, JNFmin = 0.15mA/mm for 180-65nm nodes © Sean Nicolson, BCTM 2006 Measurement Results • • • • VCO performance comparison in 3 SiGe technologies Phase noise performance Temperature testing Wafer mapping © Sean Nicolson, BCTM 2006 Performance Comparison Across Technology BiCMOS9 MOS var. BiCMOS9 HBT var. BipX HBT var. BipX1 HBT var. 150/160 150/160 230/300 250/260 Differential Pout (dBm) +0.7 -1.3 +2.7 +2.5 SSB PN @ 1MHz (dBc/Hz) -101.6 -80 -98 -101.3 Osc. Freq. (GHz) 96 100 106 104 Tech. fT/fMAX (GHz) • • • • LC-oscillator frequency insensitive to technology fT/fMAX MOS varactors give less phase noise than HBT (CBC) varactors Higher fMAX more output power, higher frequency BipX1 results in lowest phase noise © Sean Nicolson, BCTM 2006 Phase Noise Performance • Oscillation frequency of 104GHz • Phase noise of 101.3dBc/Hz @ 1MHz offset Phase Noise in W-Band SiGe VCOs FMCW modulation Averaged Spectral Plot Phase noise at 1MHz offset (dBc/Hz) -80 -85 fT=155 fmax =155 -90 -95 fT=175 fmax =275 -100 130nm CMOS fT=175 fmax =275 fT=205 fmax =290 fT=230 fmax =300 90nm CMOS fT=150 fT=270 fmax =160 fmax =260 fT=200GHz fmax =275GHz -105 fT=206 fmax =197 -110 65 70 75 80 85 90 95 100 105 110 Oscillation frequency (GHz) **References provided in abstract** © Sean Nicolson, BCTM 2006 Biasing W-Band VCOs for Low Noise • NFmin current density scales with technology and fosc – Emitter width JNFmin (scales with JpeakfT) – Frequency JNFmin (gets closer to JpeakfT) – Noise correlation further increases JNFmin [K. Yau, SiRF, 2006] B RB <inB> bib cp C <inC> E The B and C shot noise currents are correlated * inB inC 2qIC exp j n 1 © Sean Nicolson, BCTM 2006 Phase Noise Performance Across Bias • What is the minimum phase noise current density in W-band VCOs? • Measure output power and phase noise w.r.t current density (vary VBB) • Looks like phase noise is minimum at peak fT current density 2.5 V VCC output power LC CM LB phase noise JNFMIN increases with frequency Q1 CextVBB VTUNE+ Cvar VTUNE- LEE REE © Sean Nicolson, BCTM 2006 CEE W-Band Manufacturability Challenges • Manufacturability specifications for automotive radar are stringent – Outdoors wide temperature variations – Must last for car’s lifetime – Low cost per part requires high yield • Is SiGe on the way to meeting such challenges? Output power (dBm) . 2 25ºC 25ºC 0 25ºC 70ºC 70ºC 125ºC -2 BiC9 -4 MOS var. BiC9 HBT var. 50ºC BipX -6 92 96 100 104 Center frequency (GHz) 108 © Sean Nicolson, BCTM 2006 Wafer Mapping – BiCMOS9 • Tested 120 VCOs on 4 wafers • Summary of BiC9 VCOs with MOS varactors (60 dice averaged) Wafer 1 2 3 4 Center freq. (GHz) 94.7 94.9 94.9 95.0 Tuning range (GHz) 4.6 4.6 4.6 4.6 Output power (dBm) 0.2 0.7 0.6 0.8 DC power (mW) 133.8 133.2 137.3 132.6 • Summary of BiC9 VCOs with HBT varactors (60 dice averaged) Wafer 1 2 3 4 Center freq. (GHz) 99.6 100.5 100.1 100.5 Tuning range (GHz) 3.4 3.6 3.6 3.7 Output power (dBm) -1.1 -1 -1.4 -0.9 DC power (mW) 133.0 133.0 136.2 132.8 • 4 VCOs had significantly below average performance (outliers) • 2 of the 4 outlier VCOs failed to oscillate entirely © Sean Nicolson, BCTM 2006 Wafer Mapping – BipX Oscillation Frequency Phase Noise at 1MHz offset Wafer flat Location of VCO in reticule VCO not present Die not tested 104.5-105.0 GHz 104.0-104.5 GHz 103.5-104.0 GHz 103.0-103.5 GHz © Sean Nicolson, BCTM 2006 VCO not present Die not tested < -98 dBc/Hz -95 – -98 dBc/Hz -92 – -95 dBc/Hz > -92 dBc/Hz Figures of Merit • Comparison of our work to other state of the art W-Band VCOs References [1] Huang P. et al, ISSCC 2006 [2] Kobayashi K. W. et al, JSSC 1999 [3] Tang K. W. et al. CSICS 2006 [4] Huang P. et al, ISSCC 2006 © Sean Nicolson, BCTM 2006 Conclusions • Demonstrated a design methodology for low phase noise in W-Band VCOs – Biasing at JpeakfT minimizes phase noise in W-band VCOs • Performed a direct comparison of identical VCOs fabricated in different technologies – LC-oscillator frequency is insensitive to technology scaling – Higher fT technology yielded VCO with lower phase noise – Higher fMAX technology yielded VCO with improved output power • Future work is required to fully support these conclusions – Noise figure measurements in the W-Band (correlate to Y-parameter method) – Verify JNFmin in the W-Band and support biasing near JpeakfT for min. phase noise © Sean Nicolson, BCTM 2006 Technology Overview – fT/fMAX Scaling • Improvement in peak fT/fMAX has two contributions – Layout stripe contact, decreased emitter width 0.17mm to 0.13m – Vertical profile and processing doping, materials, epitaxy, etc. • How much of the speed improvement is due to each contribution? – Measure the 0.13mm HBT layouts fabricated in the 0.17mm process © Sean Nicolson, BCTM 2006