ARM INSTRUCTION BASICS By: Kieffer Gray, Eric Werner, and Yemane Abebe Topics Instruction Basics and rules Types of operands Condition Codes and flags.
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ARM INSTRUCTION BASICS
By: Kieffer Gray, Eric Werner, and Yemane Abebe
Topics Instruction Basics and rules Types of operands Condition Codes and flags
Instructions An ARM instruction is 32 bits long.
About 4 billion different machine instructions.
Assembler handles most of the detail.
Some ARM processors support 16-bit Thumb’ instructions.
Viewed as a compressed form of a subset of the ARM instruction set.
www.arm.com
Programmer Abilities • • • • Data processing instruction.
Arithmetic and logical operations on data values in registers.
Only instructions which modify values.
Two operands, single result Ex. Add two values to produce single result.
Move data around Control sequence of program
ARM data processing rules All operands are 32 bits wide and come from registers or are specified as literals in the instruction itself.
The result, if there is one, is 32 bits wide and is placed in a register.
Each of the operand registers and the result registers are independently specified in the instruction. ‘3-address’ format used.
Simple Register Operands General format: Op-code operand1, operand2, operand3 ; comment Arithmetic Bit-wise Register movement Comparison http://www.cs.uregina.ca/Links/class-info/301/ARM-arithmetic/lecture.html
Arithmetic
Bit-wise
Register movement
Comparison
Topics Instruction Basics and rules Types of operands Condition Codes and flags
Immediate Operands An immediate value can replace the second source operand Value is a constant preceded by ‘#’ Hexadecimal may be used by also adding ‘&’ ADD r3, r3, #1 ; r3 := r3 + 1 ADD r3, r3, #&f ; r3 := r3 + 15
Immediate Operands
Shifted Register Operands
Shifted Register Operands Shift operations: LSL: logical shift left 0 - 31 places; pad with 0s LSR: logical shift right 0 - 31 places; pad with 0s ASR: arithmetic shift right 0 - 31 places: pad with 0s if operand was positive, 1s in negative ROR: rotate right by 0 - 32 places; pad with bits that fall off RRX: rotate right extended by 1 place; shifts one place to the right and fills vacated bit with old C flag
Shifted Register Operands
Topics Instruction Basics and rules Types of operands Condition Codes and flags
Setting The Condition Codes
The Flags
N: Negative Z: Zero C: Carry V: Overflow
What Do They Mean?
N: The N flag is set by an instruction if the result is negative Z: The Z flag is set if the result of the instruction is 0 C: The C flag is set if the result of an instruction overflows the 32-bit result register V: The same as the C flag but for signed operations
How Are the Flags Set?
Comparison operations always set the condition codes No option available when using comparison operations Data processing instructions can set codes if explicitly done
How are the Flags Explicitly Raised?
Flags are explicitly raised by adding an ‘s’ to the op code (data processing instructions) ‘s’ stands for “set condition codes” Gives programmer more control ADDS r2, r2 ,r0 ; set condition codes ADD r2,r2,r0; don’t set condition codes
Multiplication Multiplication instruction has important differences from other arithmetic instructions Negative and Zero flags are more important if ‘s’ is appended to opcode Immediate second operand not supported Result register can’t be the same as the sources register
Comparison of MUL and ADD
ADDS r2, r2, #5; r2:=r2+5
MULS r4, r3, r2; r4:= (r3 x r2)
Use of the Condition Codes Most important use of condition codes is for branching Controls program flow
Example
Table of Branch Conditions