Critical Design Review (CDR) •Requirements: • Prepare your CDR presentation in PowerPoint form and provide a copy of the presentation and any supporting.
Download ReportTranscript Critical Design Review (CDR) •Requirements: • Prepare your CDR presentation in PowerPoint form and provide a copy of the presentation and any supporting.
Critical Design Review (CDR) •Requirements: • Prepare your CDR presentation in PowerPoint form and provide a copy of the presentation and any supporting data/information on a Readable only CD (CD-R). This should be provided to the instructor at the time of your presentation. Should you not have access to CD-Rs or facilities, please see the course instructor. • Bring hard copies of the Presentation to the meeting. Make copies for the instructor, as well as both TA's. • All members of the team are expected to take an active role in the presentation. • The presentation should not take more than 30 minutes and is expected to be professional, and rehearsed. •CDR presentation: • The main objective of the CDR is to present the complete design of the system and to describe how the system is going to be implemented. Therefore, the CDR Presentation will include: • A system block diagram with a functional description of parts and interfaces • Complete specifications and detailed design of each subassembly, including circuit and logic diagrams, labeled parts, interfaces and pinouts, timing diagrams and waveforms • Description of software processes with their inputs and outputs • Test results and demo of completed parts of the system (if any) • Parts list • Updated detailed schedule with planned deliverables for Milestone 1, Milestone 2, and the final Open-Lab Expo. • Updated division of labor and responsibilities: who is going to do what? 11/6/2015 1 Contents 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. Project Description/Overview System Block Diagram Power Calculations Functionality System Calculations Individual Components Programing Flowchart and Data Parts List Risk Matrix Updated Schedule Work Breakdown Division of Labor Project Status Questions? Thanks 11/6/2015 2 Project IceSAR CDR Presentation February 25th, 2010 Andrew Brownfield Cameron Chapman Nicholas Mans Jon Wehling Professor Albin Gasiewski Project Description/Overview Study Synthetic Aperture Radar (SAR) Create a forward looking SAR Create a 3D image of the terrain in front of the antennae array 11/6/2015 Cameron 4 System Block Diagram 11/6/2015 Cameron 5 Power Calculations Constant Variable Pulse generator power output Pulse generator power output Tx PIN Diode insertion loss Tx Pin Diode isolation Transmitter amplifier dB Circulator insertion loss Circulator isolation Rx PIN Diode insertion loss Rx Pin Diode isolation Digital attenuator insertion loss Low Noise Amp dB (2) BPF Passband Mixer conversion loss LPF Resistor LPF Capacitor LPF time constant Power transmitted Result 10dBm 0.01W -1.1dB -70dB 31.5dB -0.4dB -20dB -1.1dB -70dB -1dB 40dB 50MHz -8dB 50ohms 6.00E+02pF 3.00E+01nsec 40dBm 10W 11/6/2015 Cameron 6 Functionality Transmitter ◦ 30 dB amplification – High signal to noise ratio of received signal significant to see objects. ◦ 580 MHz – close to ice’s transparent frequency (500MHz) ◦ 20 dB isolation to receiver from transmitter via circulator ◦ Wave generation -> windowed -> amplifier -> circulator Antenna ◦ Antenna must transmit the transmission and receive the returns from objects ◦ >30 Watts out of Antenna ◦ Resonant to chosen transmission frequency Receiver ◦ Receiver must intercept signals returning from objects and move it to the analog processing ◦ Signal to noise ratio > 1.5 or 2 for longest range gate ◦ Due to wave propagation, SNR for close objects ~60dB minimum 3dB Mixing ◦ Return signals will be mixed with a quadrature hybrid split to create useful signals for phase and magnitude information ◦ Quadrature Hybrid -> Mixers -> integrator -> video amplifier A/D ◦ I and Q integrations must then be acquired for SAR algorithms to be run Program Routine ◦ Get the data off the DAQ ◦ Once data is obtained, run SAR algorithm 11/6/2015 Cameron 7 System Calculations Speed of Light (c) Boltzmann's constant (k) Max Range Min Range Center Frequency Wavelength Gain Pulse length Max Return Time (s) Min Return Time (s) cT/2 Max # of Range Gates Min # of Windows Effective Power at Transmitter Noise at the receiver Pulse width RF bandwidth Antenna Temperature Receiver noise figure Receiver noise temperature System noise temperature Input noise power (kTB) 3.00E+08m/s 1.38E-23J/K 1000m 10m 580MHz 0.517m 6dB 30nsec 6.67E-06s 6.67E-08s 4.50E+00 2.22E+02# 2.22E+00# 10W 2.11E-12W 3.00E+01ns 3.33E+01MHz 2.90E+02K 2.00E+00dB 1.70E+02K 4.60E+02K 2.11E-13W 11/6/2015 Cameron 8 Signal Generator HP 8648B Synthesized Generator ◦ 9kHz- 2GHz ◦ ~21dBm Max ◦ $3,500 11/6/2015 Nicholas 9 PIN Diode Switches (2) Narda SS213DHS ◦ ◦ ◦ ◦ ◦ 15ns Switching time 1.1dB insertion loss 70dB Isolation Minimize pulse width to 30ns $1,200 each 11/6/2015 Nicholas 10 Power amplifier Mini-Circuits LZY-2+ ◦ ◦ ◦ ◦ 500-1000 MHz 32W 47dB $2200 11/6/2015 Nicholas 11 Circulator 00550CAS SMA Coaxial Circulator ◦ 0.4 dB Insertion loss dB ◦ 20dB Isolation ◦ $250 11/6/2015 Nicholas 12 Micro-strip Patch Antenna Transmits at 500MHz ◦ ◦ ◦ ◦ Width: 23.7cm Length: 20.15cm Dielectric: 2.2 Substrate Height: 0.1588cm Built in house(ITLL) using RT/Duriod (Rogers) 11/6/2015 Nicholas 13 Digital Attenuator Mini-Circuits ZX76-31R5-PN+ ◦ 31.5dB attenuation with 0.5dB steps 6bit ◦ Need large dB range to deal with the 60dB range from the first and last range gates ◦ Cost $105 11/6/2015 Nicholas 14 Low noise amplifiers (2) Mini-Circuits ZFL-1000LN+ ◦ 0.1-1000MHz ◦ 20dBGain ◦ $90 each 11/6/2015 Nicholas 15 Band Pass Filters (2) K and L Filters ◦ 30-50 MHz bandwidth ◦ ~$500 each 11/6/2015 Nicholas 16 Quadrature Hybrid Mini-Circuits ZX10Q-2-7 ◦ 425 – 675MHz ◦ 2 way 90 degree ◦ $25 11/6/2015 Nicholas 17 Mixers (2) Mini-Circuits ZX05-10L+ ◦ 10-1000MHz ◦ $40 each 11/6/2015 Nicholas 18 Low-Pass Filter No part thus far Required Specs ◦ Resistor: 50 Ohms ◦ Capacitor: 600 pF ◦ Time Constant: 30ns Can make if we can’t buy 11/6/2015 Nicholas 19 Video Amplifiers TBD Depends on: ◦ Output Voltage ◦ A/D Input Signal ◦ Frequency 11/6/2015 Nicholas 20 A/D requirements Front End ◦ A/D resolution < 306 nanowatts/bit ◦ Sampling rate > 60MHz Back End ◦ Driving – Power, FPGA control signals ◦ Data delivery – data into an FPGA buffer 11/6/2015 Jon 21 A/D choice and backups Solution 1 – Virtex chip Cons Pros ◦ Very fast ◦ Large signal resolution ◦ Already have ◦ Xilinx programming environment ◦ Overpowered Solution 2 – TI ADS62P44 Pros Cons ◦ Within sample and resolution specs ◦ Can sample free ◦ Need to acquire ◦ Resolution may cut close for far range gates 11/6/2015 Jon 22 Program Flowchart 11/6/2015 Jon 23 Data Collection Code Structure – 3 modules ◦ Data In - maintains input data from DAQ ◦ Packaging – interprets and formats data ◦ Data Out – print to m-file Inputs – 14 bits Outputs – m-file (arrays of magnitude and phase data points) 11/6/2015 Jon 24 Data Processing Code Structure ◦ Choice – SAR or End-fire SAR ◦ Algorithm module ◦ Image Output Inputs – Matlab m-file (arrays of magnitude and phase data) Outputs – Matlab image 11/6/2015 Jon 25 Control Signals PIN diode ◦ 2 FPGA controlled D/A’s for digital attenuator ◦ control by computer FPGA timing resolution ◦ 20 ns Driving circuits ◦ voltage corrections 11/6/2015 Jon 26 Parts List Part Qty. Price Total HP 8648B Synthesized Generator PIN Switches Company/Model 3,250 CF 550-650 2 1200 2,400 Narda SS212DHS Power amplifier 2,200 Mini-Circuits (LZY-2+) Nova Microwave (0055CAS SMA 250 connector) Circulator 3-dB Quadrature Hybrid 1 25 25 Mini-Circuits (ZX10Q-2-7) 3-dB splitter 2 60 120 Mini Circuits (ZFSC-2-2-S+) Mixers 2 40 80 Mini-Circuits (ZX05-10L+) PCBs A/Ds (Maxim MAX 19588ETN+D), Op amps, electronics 2 100 200 Advanced Circuits 2 100 150 Amplifiers Band pass filter 2 2 90 180 Mini-Circuits (ZFL-1000LN+) 500 1,000 K&L Filter Digital attenuators 3 105 315 Mini-Circuits (ZX76-31R5-PN+ , ZX76-CP+) Materials (cables, enclosures, hardware) FPGA DAQ card 150 1 2000 2000 Custom Virtex Board 11/6/2015 Andrew 27 Risk Matrix 11/6/2015 Andrew 28 Updated Schedule 11/6/2015 Andrew 29 Work Breakdown Project IceSAR Milestone 1 March 16th Antenna Design Hardware Acquisition Milestone 2 April 15th Software Hardware Construction and Integration Expo April 29th Hardware Construction and Integration Software Software Finalize Frequency Specs Purchase and Obtain Majority of Hardware Data Acquisition Code Transmitter and Receiver Side Looking SAR Tested All Components Tested and Verified Completed End-fire SAR Algorithms Finalize Antenna Specs Test Hardware to Specs Control Signals and Timing Integrate Tested Parts toward Complete System End-fire Code Analyzed and Coded Integrated Fully Functional System Completed Side looking SAR Algorithms Antenna Fabrication Reports Module Functionality Technical Documents Side Looking and Endfire User Manuals Each Module Tested Demonstrated with Test Data Side Looking SAR Code (Potential) 11/6/2015 Andrew 30 Updated Division of Labor Tasks Matlab Theory Data Image Acquisition Algorithm Hardware Hardware Test Design Build Andrew X X X X X Nick X X X X X Cameron X X X Jon X X X 11/6/2015 Andrew 31 Project Status Performance spreadsheet Microstrip patch antenna spreadsheet Amplifier and PIN switches selected and purchased Receiver design nearing completion 11/6/2015 Andrew 32 Questions? Special thanks to: Prof Albin Gasiewski Stone Aerospace NASA UROP Northrop Grumman Presenter Order 1. Cameron 2. Nick 3. Jon 4. Andrew 11/6/2015 Andrew 33