Transcript INDEX - At the University - Scholarship and first contact with work

INDEX
- At the University
- Scholarship and first contact with
work
- Philips
- Last year
Universita' degli studi di Padova
Facolta' di Scienze MM.FF.NN.
Istituto di Fisica 'G.Galilei'
TESI DI LAUREA:
CATENA DI AMPLIFICAZIONE
DI UN RIVELATORE
PER USO MEDICALE
RELATORE : CH.MO PROF. SANDRO CENTRO
LAUREANDO : LEONARDO DELLA PIETRA
ANNO ACCADEMICO 1996 - 1997
1) Choose the technology, define topology and basic blocks
We go for a switched capacitor shaper
Switches have parasitic resistance and capacity
Some tricks help reducing problems
2) Details and schematic capture
Once chosen shaper topology (top left),
we derive constraints for amplifiers
3) Simulations
All blocks have to be simulated,
alone and connected with the others,
in time and frequency domains.
Technology dependent process variations give
variations in circuit performances.
We need to simulate the circuit under the various
process/temperature specs.
4) Realize layout
Importance of simmetries,
geometry and isolating wells
From layout extract parasitic elements (due to geometry)
and simulate again blocks. If they behave like expected =>
TO FOUNDRY
Scholarship project:
big noise issues
Single MOS feedback gives THD > 40%/V
Novel MOS topology performs better
(THD < 3%/V) => tradeoff with noise
Extensive noise analysis; traditionally only
input MOS considered: BIG inaccuracy
Chips from foundry behave as expected
2nd project: Σ Δ AD converter
-Radiation resistant
-Typical library block
-16 bit converter + clock
-Non-linear blocks
-Complex design
=> particular technology
=> document all steps for future uses
=> accurate study and layout, against digital noises
=> simulate at different hierarchy levels with different tools
=> Design For Testability
Various noise patterns arise and depend both on frequency and amplitude
Matlab/Octave help addressing nonidealities
fs=8e6;
fu=linspace(10e6,40e6,50);
cs=1
cd=1
cf=2
cd1=0
perc=0.01 %
for k1=1:50
gerr(k1)=gainerror(cs,cf,cd,fs,fu(k1));
gerr1(k1)=gainerror(cs,cf,cd1,fs,fu(k1));
end
%loglog(fu,gerr,fu,perc*ones(50,1))
semilogy(fu,gerr,fu,perc*ones(50,1),fu,gerr1)
“Quantization” error considered as white
high sampling frequency spreads its power in an extended frequency range
Integrators in converter further shift
noise to high frequency
1-bit output is then processed by
digital circuitry
Relevant new issues:
-Fully symmetric circuitry to avoid noise coupling from clock lines
-Amplifiers need extra common mode fixing feedback; possible only switched
=> frequency domain analysis not possible with Electronic CAD tools
-Unknown amplitude of idle channel noise (idle tones)
Strong design guidelines gave expected result: chip from foundry respects specs
DECT cordless chip
32 sq.mm +FLASH
0.25 µm 5 metal
- Very high complexity
- Integrated microprocessor
- Digital/analog interferences
- Competencies segmentated
- Design For Testability
+ flexibility
- Time constraints
- International group
Reduce unavoidable noises consequences,
modelling with Matlab/Octave.
Analize other unexplained behaviours with
extensive: - schematics simulation
- lab investigation
Importance of lab
environment
#include "nidaqex.h"
#include "formatio.h"
...
i16 iPort2= 2;
i16 iLine0 = 0; // TCK
i16 iLine1 = 1; // TMS
i16 iLine7 = 7; // if_en_da
...
int CVICALLBACK write_register(int panel,
int control, int event, void...)
{
unsigned short int i, val, reg_address_tmp, reg_data_tmp;
reg_address_tmp = reg_address << 1;
reg_data_tmp = reg_data;
if (event == EVENT_COMMIT) {
//printf ("value is %i \n", reg_data);
iStatus = DIG_Out_Line(iDevice, iPort, iLine5, iStateOFF);
iStatus = DIG_Out_Line(iDevice, iPort, iLine6, iStateOFF);
iStatus = DIG_Out_Line(iDevice, iPort, iLine7, iStateOFF);
// send data
for (i=0;i<8;i++) {
//val= (reg_data_tmp>>(7-i))&1;
val = reg_data_tmp / (pow(2,7-i));
...
Programming gives:
- automatizable access to instruments
- clear view of the situation with graphic
interfaces
- standard setup,also for occasional
lab users
In some cases direct chip inspection is necessary:
- Focused Ion Beam (FIB) machine to make cuttings/connections
- Microprobes for unaccessible signals
- Microscopy techniques, also for working chip
RESULTS:
- Chip ready for customers
- Reliable platform for next
generations
02/02-09/02 Back at the UNI
Desire to acquire a 'bird-view' on quantum mechanics foundations:
- Physics beyond standard model classes
- Wave-packet reduction, EPR problem, Bell disequality, empty waves
- Contact with people directly working on such issues
Possibility of deepening my knowledge also in other fields:
- General elativity classes
- Conferences on various subjects
NOW
Research in quantum mechanics:
-Theory ?
- Lab ?
- Both ?