Slide 1

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

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Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
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BLOCK DIAGRAM

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Cpu core

Two cores sharing one bus interface
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Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

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What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
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Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
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Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
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Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

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11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
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The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

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The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

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Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

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Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

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Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
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Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

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Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
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Registers…

are temporary storage
areas for data or
instructions.

Registers
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Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

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Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

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Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
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Memory
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Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
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Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
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Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
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Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
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Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
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Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

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Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
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Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

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Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
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Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

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Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

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Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

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on

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Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
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The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

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The Byte
A group of 8 bits is called a byte.

0

1

0

0

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1

0

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1

0

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One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

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0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

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Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

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Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
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The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

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Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
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Quad-core CPU
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 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

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 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

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• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

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Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

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Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

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MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

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Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

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FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

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Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

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Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

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Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

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Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

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Types of Processors

PGA

SECC
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Intel Dual core

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Celeron DUAL CORE

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LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

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Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

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IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
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Socket
 Known as the LGA 1366 or Socket B
 Contact points

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FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
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Thank for your time and
patience

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Slide 2

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
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BLOCK DIAGRAM

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Cpu core

Two cores sharing one bus interface
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Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

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What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
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Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
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Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

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Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
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Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

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21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
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Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
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Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
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Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
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Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
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Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

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Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
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64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 3

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

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0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 4

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 5

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

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Slide 6

ARCHITECTURE OF DUAL CORE

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INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
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BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
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Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

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What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
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Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
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Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
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Processing

Secondary
Storage

Input

Processing

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

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11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
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12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

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The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

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Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

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Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

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Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
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Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
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Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

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21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
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Memory
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Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
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Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
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Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
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Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
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Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
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Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

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Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
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Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

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Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

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Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

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Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
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The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

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The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

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One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

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Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

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Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
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The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

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Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
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44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

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 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

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• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

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Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

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Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

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MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

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Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

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FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

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Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

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Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

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Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

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Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

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Types of Processors

PGA

SECC
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Intel Dual core

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Celeron DUAL CORE

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LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

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Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

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IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
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Socket
 Known as the LGA 1366 or Socket B
 Contact points

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FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
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64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 7

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 8

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 9

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 10

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 11

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

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 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

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• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

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FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

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Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 12

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 13

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 14

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 15

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 16

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

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 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

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• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

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FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

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Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
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57

Intel Dual core

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58

Celeron DUAL CORE

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 17

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 18

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 19

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 20

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 21

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

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• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 22

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
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64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 23

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

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21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

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1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

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0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 24

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 25

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 26

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

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 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

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• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 27

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
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64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 28

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 29

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 30

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 31

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
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44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

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 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

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• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

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Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
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57

Intel Dual core

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58

Celeron DUAL CORE

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 32

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
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64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 33

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

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1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

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0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 34

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 35

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 36

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
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44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

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 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 37

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 38

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 39

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 40

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 41

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 42

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
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64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 43

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

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21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

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1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

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0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 44

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 45

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 46

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 47

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 48

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 49

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 50

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 51

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 52

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 53

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

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1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

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0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 54

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 55

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 56

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 57

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
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64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 58

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

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1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 59

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 60

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 61

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 62

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

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42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

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45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

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47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

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48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

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61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

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63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
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64

Thank for your time and
patience

GAURAV SHRIVASTAVA

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65


Slide 63

ARCHITECTURE OF DUAL CORE

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

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3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

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6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

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7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

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8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

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9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

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Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

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13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

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14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

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15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

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16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

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18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

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19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

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21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
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22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

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23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

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25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

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26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

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27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

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28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

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29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

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30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

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31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

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33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

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34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

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35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

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36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

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37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

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1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

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40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

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41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

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43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

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46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

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49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

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50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

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51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

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52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

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53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

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54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

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55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

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56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

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57

Intel Dual core

GAURAV SHRIVASTAVA

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58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

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59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

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60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

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62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 64

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

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4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

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5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

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17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65


Slide 65

ARCHITECTURE OF DUAL CORE

GAURAV SHRIVASTAVA

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1

INTEL DUAL CORE
1.8-3.0 GHz
32 -64 bit
291 million transistors
45nm process
800 MHz FSB
10-65w TDP
143 mm’2dye size
Socket LGA 775

GAURAV SHRIVASTAVA

BCA-2"C"

2

Intel® Dual-Core Processing Runs two
independent processor cores in one physical
package at the same frequency. Features up to
2 MB of shared L2 cache and 800 MHz Front
Side Bus.

Intel® Wide Dynamic Improves execution speed
and efficiency, delivering more instructions per
clock cycle. Each core can complete up to four
full instructions simultaneously.
Execution
GAURAV SHRIVASTAVA

BCA-2"C"

3

BLOCK DIAGRAM

GAURAV SHRIVASTAVA

BCA-2"C"

4

Cpu core

Two cores sharing one bus interface
GAURAV SHRIVASTAVA

BCA-2"C"

5

Cache
Cache is a relatively small block of very fast memory.
The data and instructions stored in cache are those that
are most recently or most frequently used.
Cache speeds up the internal transfer of data and
software instructions.
Level 1 is fastest, followed by Level 2

GAURAV SHRIVASTAVA

BCA-2"C"

6

What is L1 and L2?
 Level-1 and Level-2 caches
 The cache memories in a computer
 Much faster than RAM

 L1 is built on the microprocessor chip itself.
 L2 is a seperate chip
 L2 cache is much larger than L1 cache
 ALWAYS THE SIZE OF L1 CACHE IS SMALLER DUE

TO MISMATCH OF SPEED BETWEEN L1 AND L2
CACHE
GAURAV SHRIVASTAVA

BCA-2"C"

7

Architecture
The component of CPU include,
CU: Control Unit Directs and manages the activities of

the processor.
ALU: Arithmetic and Logic Unit. Performs Arithmetic
and Logical operations.(+, -, x, /, >,<, =)
FPU: Floating Point Unit. Performs division and large
decimal operations.
Cache Memory: Predicts and anticipates the data that
the processor needs.
I/O Unit: Input Output unit. The gateway for the
processor.
Register : Which hold temporary data for a specific
purpose of function.
GAURAV SHRIVASTAVA

BCA-2"C"

8

Basic Architecture
FPU

ALU

Control
Unit

CPU Bus

Cache
IO Unit
Register

Internal Buses
GAURAV SHRIVASTAVA

BCA-2"C"

9

Processing

Secondary
Storage

Input

Processing

GAURAV SHRIVASTAVA

BCA-2"C"

Output

10

The CPU
The CPU interacts(affects)
closely with memory
(primary storage).

CPU

Memory, however,
is not part of the
CPU.
GAURAV SHRIVASTAVA

Memory

BCA-2"C"

11

Parts of the CPU
The CPU consists of a variety of parts including:

• Control unit
Control
Unit

ALU

Registers
GAURAV SHRIVASTAVA

• Arithmetic/logic
unit (ALU)
• Registers
BCA-2"C"

12

The Control Unit…
Directs the other parts of the computer system to
execute(perform) stored program instructions.

Control
Unit

The control unit
communicates with the
ALU and memory.

GAURAV SHRIVASTAVA

BCA-2"C"

13

The Arithmetic/Logic Unit (ALU)…
performs mathematical operations as well as logical
operations.

ALU

GAURAV SHRIVASTAVA

BCA-2"C"

14

Mathematical Operations

The ALU can perform four kinds of mathematical
calculations:

•
•
•
•

addition
subtraction
multiplication
division

GAURAV SHRIVASTAVA

BCA-2"C"

15

Logical Operations
The ALU can perform logical operations.
Logical operations can test for these
conditions(position):
 Equal-to (=)
 Less-than (<)
 Greater-than (>)

GAURAV SHRIVASTAVA

BCA-2"C"

16

Equal-to Condition
In a test for this condition, the ALU compares two
values to determine if they are equal.

If

=

Then

=
GAURAV SHRIVASTAVA

BCA-2"C"

17

Less-than Condition
In a test for this condition, the ALU compares values to
determine if one value is less than another.

If

=

Then

<

GAURAV SHRIVASTAVA

BCA-2"C"

18

Greater-than Condition
In a test for this condition, the ALU compares values to
determine if one value is greater than another.

If

=

Then

>
GAURAV SHRIVASTAVA

BCA-2"C"

19

Registers…

are temporary storage
areas for data or
instructions.

Registers
GAURAV SHRIVASTAVA

Data held
temporarily in
registers can be
accessed at
greater speeds
than data stored
in memory.

BCA-2"C"

20

Executing Program Instructions
Before the CPU can execute a program,
program instructions and data must be
placed into memory from an input device
or storage device.

Input

GAURAV SHRIVASTAVA

Secondary
Storage

Processing

BCA-2"C"

21

Executing Program Instructions
Once the necessary data and instructions are in
memory, the CPU performs the following steps for
each instruction:

•
•
•
•

CPU

Fetching
Decoding
Executing
Storing
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

22

Fetching Instructions
Control
Unit

ALU

The control unit
fetches (gets) the
instruction from
memory.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

23

Decoding(solve) Instructions
The control unit
decodes the
instruction and
directs that the
necessary data be
moved from memory
to the ALU.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

24

Executing Arithmetic/Logic
Operations
Control
Unit

ALU

The ALU performs the
arithmetic or logical
operation on the data.

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

25

Storing Results
The ALU stores the
result of its
operation on the
data in memory or
in a register.

Control
Unit

ALU

Registers

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

26

Executing Program Instructions
Secondary
Storage

Control
Unit

ALU

Eventually, the control unit
sends the results in
memory to an output
device or secondary
storage.

Registers
Memory
Output
GAURAV SHRIVASTAVA

BCA-2"C"

27

Instruction Time
The time it takes to fetch an instruction and decode it is
called instruction time.

Control
Unit

Control
Unit

ALU

+
Memory

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

28

Execution Time
The time it takes to execute an ALU operation and then
store the result is called execution(perform) time.

ALU

ALU

+

Registers

Memory

GAURAV SHRIVASTAVA

BCA-2"C"

29

Memory Locations and Addresses
The control unit can find
data and instructions
because each location
in memory has an
address.

Control
Unit

Memory
GAURAV SHRIVASTAVA

BCA-2"C"

30

Storage Locations
Each location in memory is
identified by an address.

Memory
Each location has
a unique address.

GAURAV SHRIVASTAVA

BCA-2"C"

31

Symbolic Addresses
The choice of the location
in memory is arbitrary
(determination).

17

$

%
Addresses can
only hold one
number or word.
GAURAV SHRIVASTAVA

Memory
BCA-2"C"

Pat

364

32

Data Representation
The system in which all computer data is
represented(called) and manipulated(used) is called
the binary system.

GAURAV SHRIVASTAVA

BCA-2"C"

33

Binary System
The binary system has only two digits
to represent all values.
This corresponds to the two states of
a computer’s electrical system —on
and off.

GAURAV SHRIVASTAVA

BCA-2"C"

34

Off/On Switches
The computer can represent data by constructing
combinations of off or on switches.

off

or

GAURAV SHRIVASTAVA

on

BCA-2"C"

35

Zero or One?
The binary system can also be represented by the digits
zero and one.

0

or

1

Zero (off) and one (on) make up the
two digits in the binary system.
GAURAV SHRIVASTAVA

BCA-2"C"

36

The Bit

Each 0 or 1 in the
binary system is
called a bit.

one bit
two bits
three bits

GAURAV SHRIVASTAVA

BCA-2"C"

37

The Byte
A group of 8 bits is called a byte.

0

1

0

0

GAURAV SHRIVASTAVA

1

0

BCA-2"C"

1

0

38

One Character of Data
Each byte represents one character of data (a letter, digit,
or special character).

0

1

0

0

1

GAURAV SHRIVASTAVA

0

1

BCA-2"C"

0

= J
39

WORKING DUAL-CORE
Intel DUAL-Core Processor
Intel
Core 1

Intel
Core 2
Shared L2 Cache

Die 1

Die 2

FSB
bottleneck

I/O
Chipset

->GETTING DATA FROM RAM
(MEMORY)
->DATA GOES TO I/Q DEVICES
->DATA SHARED BY TWO CORES
->FSB (FRONT SIDE DATA
BUS)WHICH IS DIRECTLY
CONNECTED TO MEMORY

other I/O links

GAURAV SHRIVASTAVA

BCA-2"C"

40

Hyper threading
A technology developed by Intel that enables
multithreaded(current
of
data)
software
applications to execute threads in parallel on a
single processor instead of processing threads in a
linear fashion. Older systems took advantage of
dual-processing threading in software by
splitting(dividing) instructions into multiple
streams so that more than one processor could act
upon (on)them at once.

GAURAV SHRIVASTAVA

BCA-2"C"

41

Intel® DUAL CORE
core 1

core 2
core 1

Core 2

data

1MB L2

1MB L2

2 MB (Cache)

.

!
GAURAV SHRIVASTAVA

BCA-2"C"

42

The Pentium Dual core will require a new
motherboard, built 945/955 core logic. If
you insert a Pentium Dual core into a
current 915 or 925XE(PGA 495)
motherboard, the system simply won't
boot—neither the CPU or motherboard will
be damaged. It simply won't work.

GAURAV SHRIVASTAVA

BCA-2"C"

43

Why multicore?
 New modern processors are launched
 How to make a use of new technologies?

Dual-core CPU
GAURAV SHRIVASTAVA

Quad-core CPU
BCA-2"C"

44
44

 • Difficult to make single-core
 clock frequencies even higher
 • Deeply pipelined circuits(term):

 – heat problems
 • Many new applications are multithreaded
 • General(common) trend in computer architecture

GAURAV SHRIVASTAVA

BCA-2"C"

45

 • Editing a photo while recording a TV show
 through a digital video recorder
 • Downloading software while running an

 anti-virus program
 • “Anything that can be threaded today will
 map efficiently to multi-core”

GAURAV SHRIVASTAVA

BCA-2"C"

46

• Multi-core chips an
 important new trend in
 computer architecture
 • Several new multi-core
 chips in design phases
 likely to gain importance

GAURAV SHRIVASTAVA

BCA-2"C"

47

Microprocessor Speeds
Microprocessor speeds can be measured in a variety of
ways:
 Megahertz
 MIPS
 Megaflops
 Fsb

GAURAV SHRIVASTAVA

BCA-2"C"

48

Megahertz
One measure of microprocessor speed is megahertz
(MHz) which is one million machine cycles per
second. gigahertz(billions

of cycles per

second).

GAURAV SHRIVASTAVA

BCA-2"C"

49

MIPS
Another measure of microprocessor speed is
MIPS which is one million instructions per
second.

GAURAV SHRIVASTAVA

BCA-2"C"

50

Megaflops
Megaflops, or one million floating-point
operations per second, is still another
measure of microprocessor speed.

GAURAV SHRIVASTAVA

BCA-2"C"

51

FSB
Front Side Bus (FSB(: Measured in megahertz (MHz), the
FSB is the channel that connects the processor with main
memory. The faster this is, the better the performance will be.
􀂄 The Front Side Bus operates at a speed
which is a percentage of the CPU clock
speed.
􀂄 The faster the speed at which the Front Side
Bus allows data transfer, the better the
performance of the CPU.

GAURAV SHRIVASTAVA

BCA-2"C"

52

Bus Lines
A bus line is a set of parallel electrical paths. A bus is
like a mode of transportation for data.
 Bus width (Wide)= the number of wires in the bus over

which data can travel+--

GAURAV SHRIVASTAVA

BCA-2"C"

53

Bus Width(wide)
The amount of data that can be carried at one time is
bus width (wider = more data).

GAURAV SHRIVASTAVA

BCA-2"C"

54

Processor Manufacturers
 Intel (Integrated Electronics)
 AMD (Advanced Micro Devices)
 VIA
 Cyrix

GAURAV SHRIVASTAVA

BCA-2"C"

55

Processor Types
Two types:
1. Socket type
2. Slot type.
 Pin arrangement in the Socket type processor is
known as Pin Grid Array (PGA).
 Slot type processor is also known as Single
Edged Contact Cartridge (SECC).

GAURAV SHRIVASTAVA

BCA-2"C"

56

Types of Processors

PGA

SECC
GAURAV SHRIVASTAVA

BCA-2"C"

57

Intel Dual core

GAURAV SHRIVASTAVA

BCA-2"C"

58

Celeron DUAL CORE

GAURAV SHRIVASTAVA

BCA-2"C"

59

LGA 775 socket
IN LGA 775 YOU CAN INSERT
DUAL CORE, CORE 2
DUO,CORE 2 QUAD.
EACH PROCESSOR HAS THEIR
OWN SOCKET.

GAURAV SHRIVASTAVA

BCA-2"C"

60

Via nano as similar to dual core
VIA IS
GENERALLY
FAMUS FOR HIS
CHIPSET . THE
CHIPSET YOU
CAN FIND IN
ASUS
MOTERBOARD
(SOUTH
BRIDGE)
IN HCL
LAPTOPS
(NORTH
BRIDGE)

GAURAV SHRIVASTAVA

BCA-2"C"

61

IT IS AN HYBRID OF DUAL CORE ,CORE2 DUO AND CORE2 QUAD
IT HAS 16 MB CACHE MEMORY(L2) AND 4 MB (L1)
IT S COST PRICE IN MARKET IS $900
GAURAV SHRIVASTAVA

BCA-2"C"

62

Socket
 Known as the LGA 1366 or Socket B
 Contact points

GAURAV SHRIVASTAVA

BCA-2"C"

63

FOR ANY QUERY CONTACT
[email protected]

GAURAV SHRIVASTAVA
BCA-2"C"

64

Thank for your time and
patience

GAURAV SHRIVASTAVA

BCA-2"C"

65