Ch 9. Memory Management 31-Oct-15 9.1 배경 기억장소의 구성 Real Single User dedicated System Real Virtual( Disk ) Real Storage Multiprogramming System Fixed Partition MP Abso Reloca -lute -table Variable Partition MP Virtual Storage Multiprogramming 페이징 세그먼 테이션 Combined Paging Segment 9.1 Background 기억장소 계층구조 관리 정책 Register cache main memory electronic disk magnetic disk optical disk magnetic tapes Fetch policy :
Download ReportTranscript Ch 9. Memory Management 31-Oct-15 9.1 배경 기억장소의 구성 Real Single User dedicated System Real Virtual( Disk ) Real Storage Multiprogramming System Fixed Partition MP Abso Reloca -lute -table Variable Partition MP Virtual Storage Multiprogramming 페이징 세그먼 테이션 Combined Paging Segment 9.1 Background 기억장소 계층구조 관리 정책 Register cache main memory electronic disk magnetic disk optical disk magnetic tapes Fetch policy :
Ch 9. Memory Management 31-Oct-15 9.1 배경 기억장소의 구성 Real Single User dedicated System Real Virtual( Disk ) Real Storage Multiprogramming System Fixed Partition MP Abso Reloca -lute -table Variable Partition MP Virtual Storage Multiprogramming 페이징 세그먼 테이션 Combined Paging Segment 9.1 Background 기억장소 계층구조 관리 정책 Register cache main memory electronic disk magnetic disk optical disk magnetic tapes Fetch policy : When? ( Program or data Main memory ) • Demand Fetch (요청시 읽음) • Anticipatory Fetch(미리 예측하여 읽음) Placement policy : Where? • First - fit • Best - fit • Worst -fit Replacement policy : What? 9.1 Background 사용자 프로그램의 단계별 처리과정 원본 프로그램 컴파일 시간 컴파일러 / 어셈블러 Linkage editor 다른 객체 모듈 로드 모듈 Load time 시스템 라이브러리 로더 객체 모듈 동적 시스템 라이브러리 동적 링킹 메모리내의 이진메모리 이미지 실행시간 9.1 Background 동적 로딩 루틴은 호출될 때까지 로드 되지 않는다. 모든 루틴은 재배치 가능한 형태로 디스크에 존재한 다. 동적 링킹(dynamic linking) 동적 로딩과 유사하나, 실행 가능한 이미지로 존재한 다. 9.1 배경 중첩(Overlay) User program with storage requirement large then available portion of main storage Operating System Portion of user code and data that must remain in main storage for duration of excute Initialization Phase a Processing Phase b 1 Overlay area 2 3 Load Initialization Phase at b and run Then Load Processing Phase at b and run Then Load Output Phase at b and run Output Phase c 9.1 배경 70K Ex) Overlays for a two-pass assembler Pass 1 Symbol table 20K Common routiness 30K Overlay driver 10K Pass 2 80K 9.2 스와핑(Swapping) Swapping 스와핑 시간 (문맥 교환 시간) 사용자 프로세스 크기 : 1 MB 디스크 • 초당 5MB 전송률 • 회전지연시간 8ms 전송시간 : 8 m sec + (1MB / 5MB) = 8 m sec + 200 ms Swap Time = 208 m sec Total Swap Time 416 m sec 9.3 스와핑 Monitor fence user space main memory Swap out Swap in User 1 User 2 backing store 디스크를 사용한 두 프로세스의 스와핑 9.3 연속 메모리 할당 연속 할당 Single Contiguous Loading Partitioned Loading 불연속 할당 페이징과 세그먼테이션 스와핑 가상 메모리 페이징 세그먼테이션 9. 3 연속 메모리 할당 연속 할당 Fixed Partition Variable Partition < Single-partition Allocation > 0 < Dynamic Relocation > limit register Operating system user CPU logical address < relocation register yes + memory no trap; addressing error 512 K 메모리 분할 재배치와 상한레지스터를 지원하는 하드웨어 9. 3 연속 메모리 할당 다중 분할 할당 고정 분할 가변 분할 0 operating system 400 K 2160 K 2560 K 스케줄링 예 Job queue process memory P1 P2 P3 P4 P5 600 K 1000 K 300 K 700 K 500 K time 10 5 20 8 15 9. 3 연속 메모리 할당 0 0 Operating system 400 K 400 K 1000 K P2 2000 K 할당 P4 종료 2000 K P3 P4 0 Operating system 400 K 400 K 1000 K 900 K 1000 K P1 1000 K P2 0 Operating system 400 K P1 P1 1000 K 0 Operating system terminates P1 P4 allocate P5 1700 K 1700 K 1700 K 2000 K 2000 K 2000 K P3 P3 P3 2300 K 2300 K 2300 K 2300 K 2560 K 2560 K 2560 K 2560 K 2560 K (b) 메모리 할당 과정 (c) (d) P5 P4 P3 2300 K (a) Operating system (e) 9. 3 연속 메모리 할당 외부 단편화 내부 단편화 compaction(garbage collection) 0 가변 분할 할당 operating system P5 P5 2000 K 2300 K 2560 K 900 K 100K P4 1700 K operating system 400 K 400 K 900 K 1000 K Non contiguous : swapping / page , coalescing holes 0 P4 compact 1600 K 300K 1900 K P3 260 K P3 660K 2560 K Compaction 9.4 페이징 가상주소와 실제 주소 외부 단편화 문제의 해결 Noncontiguous logical address CPU F:VR p physical address f d d Physical Memory p f Page table Paging hardware 9.4 페이징 0 1 2 3 a b c d 0 1 2 3 0 1 2 3 a b c d a b c d 0 1 2 3 a b c d 0 1 2 3 5 6 1 2 Page table 0 16 4 i j k l 20 a b c d 8 m n o p 24 e f g h 12 28 logical memory Physical memory 4B 페이지를 가진 32B 기억장치의 페이징 예 9.4 페이징 free-frame list 14 13 18 20 15 13 14 15 16 17 18 19 20 21 page 0 page 1 page 2 page 3 new process free-frame list 15 page 0 page 1 page 2 page 3 new process 0 1 2 3 (a) page 1 page 0 13 14 15 16 17 18 19 20 21 page 2 page 3 14 13 18 20 new-process page table 빈 프레임 (a) 할당전 (b) 할당후 (b) 9.4 페이징 Virtual address V = ( b, d ) b d • block : Division unit of V, M • page : Fixed block size • Paging • segment : No fixed block size • segmentation 각 프로세스는 자신만의 블록 사상표(Block Mapping Table)를 가지고 있다. 9.4 페이징 페이징 주소 변환 by Direct Mapping by Associative Mapping with Combined Associative/Direct < Direct mapping > Base Add. Of PMT Page number or “block” b b + b Virtual Add. V=(p,d) PMT b+p p P´ (PTBR) Page Table Base Register d P p Displacement P´ d Real Address. 9.4 페이징 < TLB를 이용한 페이징 하드웨어 > Page number Displacement P 가상 주소 V=(p,d) d Associative map P P´ P´ Frame number d 실제 주소. Displacement • Use expensive Associative memory • Associative register = Translation lock-aside buffers(TLB) • Page(entry) # : 8 ~ 2048 (TLB) : Translation Look-aside Buffer 9.4 페이징 start Add. Of page map Table b Page number Displacement P + performed only if no match in associative map b+p Try this First Virtual Add. V=(p,d) d Partial Associative map Direct map b (all page) P P´ only if match in associative map p P´ only if no match in associative map Frame number P´ Displacement d Real Add. < Combined Associative/Direct page mapping > 9.5 세그먼테이션 logical unit : possible to divide per page in segment Logical address : segment# , offset Segment map table origin register Base address ‘b’ of segment table Logical address v = s +d b s + b+s Segment number s Segment map table s S# Limit S’ Displacement d Real address r = s’ + d d S’ + S’ + d r Segment Start address of Physical memory < Virtual address translation in a pure segment system > 9.5 세그먼테이션 s limit base Segment table CPU s d Yes < + No 트랩 ; 주소 지정 오류 Physical memory Segmentation hardware 9.5 세그먼테이션 1400 subroutine Segment 0 sqrt stack Segment 3 Symbol table Segment 4 main Segment 1 program Segment 2 Segment 0 2400 limit base 0 1000 1400 1 400 6300 2 400 4300 3 1100 3200 4 1000 4700 세그먼트 테이블 논리적 주소공간 3200 Segment 3 4300 4700 Segment 4 5700 6300 <세그먼테이션 예> Segment 2 6700 Segment 1 물리적 주소 9.5 세그먼테이션 Share and Protection of Segment Share strong point of segmentation must be protected when multi user share the same segment, need protection (Fig 8.25) Segmentation may cause external fragmentation 9.5 세그먼테이션 editor Segment 0 43062 Data 1 Segment 1 Logical memory process P1 0 25286 43062 1 4452 68348 Segment table process P1 editor limit base Segment 0 Data 2 Segment 1 Logical memory process P2 editor limit base 68348 Data 1 72773 90003 0 25286 43062 1 8850 90003 98553 Segment table process P2 Data 2 Physical memory Fig 8.25 Sharing of segment in a segmented memory system 9.6 페이지화된 세그먼테이션 Segment map table origin register Base address , b , of segment table b + b+s b Logical address v = s +d Page number Segment b number S s Segment map table for this process Displacement d Associative storage map s s S’ P’ P Page map table for segments S S’ P P + S’ S’ P P’ Frame Displacement d number P’ Fig 8.26 Virtual address translation with combined associative / direct mapping in a paged and segment system 9.7 페이지화된 세그먼테이션 Paging / Segmentation system too large segment =>> by unit of page V = s, p, d segment fault => control -> O.S -> segment map table page map table page fault alternative of shared page Summary Comparison Paged Memory Management • advantage) • may have some internal fragmentation, but increase system efficiency • need not compaction overhead for relocation partition • drawback) • increase computer cost for address mapping • consume large amounts of memory and increase processor time(overhead) because of many tables Segmented Memory Management • advantage) • eliminate internal fragmentation in page or free table • share segment • (ex) two-pass assembler • drawback) • increase Hardware cost • memory space waste due to table, complexity of O.S