Transcript CS345 02 - Computer Systems

CS 345
Virtual Memory
Chapter 8
Objectives
Topics to Cover…
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Program Execution Patterns
Computer Memory
Virtual Memory
Paging
Segmentation
Performance
Replacement Algorithms
Paging Improvements
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Virtual Memory
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Program Execution
Program Execution
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What are the characteristics of an executing
program?
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Characteristics of an executing program:
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has code that is unused
allocated more memory than is needed
has features that are used rarely
A program’s instructions must be in main memory to
execute, even though…
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the entire program is not always executing
the address space of the program could be broken up across
available frames (paging)
Virtual Memory
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Computer Memory
Computer Memory
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What are the implications of lack of memory?
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Lack of memory has serious implications
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What if a program “grows” while executing?
What about moving to a new machine?
Execution of a program that is not ALL in physical
memory would be advantageous.
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larger address space possible
more programs could be in memory
less I/O needed to get a process going
unused modules would not be loaded
Virtual Memory
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Computer Memory
Early Memory Solutions
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What were early solutions to lack of memory?
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All larger programs had to contain logic for managing
two-level storage.
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The non-volatile hard drive was used to store data and code.
Programs were responsible for moving “overlays” back and
forth from primary to secondary storage.
Multi-programming had to use “base and bounds
registers” to manage, allocate, and reallocate memory.
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Computer Memory
Virtual Memory to the Rescue!
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1961 - First virtual memory machine, Atlas Computer
project at the University of Manchester in the UK.
1962 - First commercial system, Burroughs B5000.
1972 – IBM introduces virtual memory in mainframes
with OS/370.
1979 - Unix uses virtual memory with 3BSD.
1993 - Microsoft introduces virtual memory into
Windows NT 3.
All had challenges
 Specialized, hard to build hardware required
 Too much processor power required to do address
translation
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Virtual Memory
Virtual Memory
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What is the difference between “real” and “virtual”
memory?
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Program addresses only logical addresses
Hardware maps logical addresses to physical addresses
Only part of a process is loaded into memory
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process may be larger than main memory
additional processes allowed in main memory
memory loaded/unloaded as the programs execute
generally implemented using demand paging.
Real Memory – The physical memory occupied by a
program (frames)
Virtual memory – The larger memory space perceived
by the program (pages)
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Virtual Memory
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Virtual Memory
Memory Hierarchy
Cache memory:
provides illusion of
very high speed
Main memory:
reasonable cost,
but slow & small
Virtual memory:
provides illusion of
very large size
Virtu a l
m em o ry
Ma in m e m o ry
C a ch e
R e g is te rs
W o rd s
L in es
( tr ansf err ed
ex plic itly
v ia load/s tor e)
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Pages
( tr ansf err ed
automatic ally
upon c ache mis s )
( tr ansf err ed
automatic ally
upon page f ault)
Virtual Memory
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Virtual Memory
Virtual Memory
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Principle of Locality – A program tends to
reference the same items - even if same item not
used, nearby items will often be referenced
Resident Set – Those parts of the program being
actively used (remaining parts of program on disk)
Thrashing – Constantly needing to get pages off
secondary storage
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happens if the O.S. throws out a piece of memory that
is about to be used
can happen if the program scans a long array –
continuously referencing pages not used recently
O.S. must watch out for this situation!
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Paging
Paging Hardware
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Use page number as a index into the page table, which
then contains the physical frame holding that page
Typical Flag bits: Present, Accessed, Modified, various
protection-related bits
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Paging
More Paging Hardware
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Full page tables can be very large
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4G space with 4K pages = 1M entries
some systems put page tables in virtual address space
Multilevel page tables
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top level page table has a Present bit to indicate entire
range is not valid
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second level table only
used if that part of the
address space is used
second level tables can
also be used for shared
libraries
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Paging
Two-Level Paging System
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Virtual Address
… 11 10
RPTE #
…
UPTE #
65
…
0
Frame Offset
Root Page Table
User Page Table
LC-3 Main Memory
+
Flags / Frame #
Flags / UPT #
RPT
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+
One per process
Frame<<6 Offset
15 …
65 … 0
Physical Address
Virtual Memory
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Paging
MMU’s
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MMU’s used to sit between the CPU and bus
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Page tables
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now they are typically integrated into the CPU
originally implemented in special very fast registers
now they are stored in normal memory
entries are cached in fast registers as they are used
Optional features
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separate page tables for each processor mode
read/write access control, referenced/dirty bits
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Paging
More Paging Hardware
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To minimize the performance penalty of address
translation, most modern CPUs include an onchip memory management unit (MMU) and
maintain a table of recently used virtual-tophysical translations, called a Translation
Lookaside Buffer (TLB).
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Segmentation
Segmentation
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Programmer sees memory as a set of multiple
segments, each with a separate address space
Growing data structures easier to handle
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Can alter the one segment without modifying
other segments
Easy to share a library
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O.S. can expand or shrink segment
share one segment among processes
Easy memory protection
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can set values for the entire segment
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Segmentation
Segmentation (continued…)
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Implementation:
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Combine with paging: No external fragmentation
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have a segment table for each process
similar to one-level paging method
status – present, modified, location, size
easier to manage memory since all items are the same
size
Some processors have both (386)
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each segment broken up into pages
address Translation
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do segment translation
translate that address using paging
some internal fragmentation at the end of each
segment
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So…
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What policy decisions do OS designers
face?
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Support paging, segmentation, or both?
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Windows/Unix/Linux
 Use paging for virtual memory
 Use segments only for privilege level (segment =
address space)
Support virtual memory?
Which memory management algorithm?
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Virtual Memory
Virtual Memory
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Paged memory combined with disk swapping
Processes reside in main/secondary memory
Demand Paging
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could also be termed as lazy swapping
bring pages into memory only when accessed
allows us to over allocate
What about at context switch time?
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could swap out entire process
restore page state as remembered
anticipate which pages are needed
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Decisions about Virtual Memory
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Fetch Policy
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Placement
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How many process pages to keep in memory? Fixed or variable?
Reassign pages to other processes?
Cleaning Policy
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What to unload to make room for a new page?
Resident Set Management
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Where to put it? Unused page?
Replacement
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When to bring a page in? When needed or in anticipation of
need?
When is a page written to disk?
Load Control
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Page Replacement
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Frame replacement – two page transfers
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select a frame (victim)
write the victim frame to disk
read in new frame from disk
update page tables
restart process
Reduce overhead using dirty bit
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dirty bit is set whenever a page is modified
if dirty, write page, else just throw it out
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Page Fault
0
Page 0
0:m1
1
Page 1
1:v0
2
Page 2
2:m3
3
Page 3
3:v1
4
Page 0
Page 1
Page 2
Page 3
5
6
7
Page fault is generated when an invalid page is accessed
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Memory References
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Check internal table
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Find a free frame
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valid or invalid frame (page fault)
new or swapped page
get from frame pool
unload a frame
If page defined, read in from disk
Update the page table
Restart the instruction
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process restarts from exact location
state unchanged (as if not interrupted)
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Paging Implementation
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Extreme case
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What about overhead of paging?
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start a process with no pages in memory
pure demand paging
locality
thrashing
Hardware support
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page table
secondary memory
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Paging Implementation (continued…)
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Must be able to restart a process at any time
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instruction fetch
operand fetch
operand store (any memory reference)
Consider simple instruction (VLIW or CISC)
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Add C,A,B (C = A + B)
All operands on different pages
Instruction not in memory
4 possible page faults )-: slooooow :-(
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Paging Performance
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Paging Time…
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Disk latency
Disk seek
Disk transfer time
Total paging time
8 milliseconds
15 milliseconds
1 millisecond
~25 milliseconds
Could be longer due to
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device queueing time
other paging overhead
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Paging Performance (continued…)
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Effective access time:
EAT = (1 - p)  ma + p  pft
where:
p is probability of page fault
ma is memory access time
pft is page fault time
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Paging Performance (continued…)
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Effective access time with 100 ns memory
access and 25 ms page fault time:
EAT = (1 - p)  ma + p  pft
= (1 - p)  100 + p  25,000,000
= 100 + 24,999,900  p
What is the EAT if p = 0.001 (1 out of 1000)?
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100 + 24999,990  0.001 = 25 microseconds
250 times slowdown!
How do we get less than 10% slowdown?
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100 + 24999,990  p  1.10  100 ns = 110 ns
Less than 1 out of 2,500,000 accesses fault
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Placement Policies
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Where to put the page
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trivial in a paging system – can be placed anywhere
Best-fit, First-Fit, or Next-Fit can be used with
segmentation
is a concern with distributed systems
Frame Locking
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require a page to stay in memory
 O.S. Kernel and Interrupt Handlers
 real-Time processes
 other key data structures
implemented by bit in data structures
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Replacement Algorithms
Replacement Algorithms
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Random (RAND)
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Belady’s Optimal Algorithm
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strictly a straw-man for stack algorithms
Least Recently Used (LRU)
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for the dogs, forget ‘em
Least Frequently Used (LFU)
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best but unrealizable – used for comparison
First-In, First-Out (FIFO)
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choose any page to replace at random
discard pages we have probably lost interest in
Clock – Not Recently Used (NRU)
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efficient software LRU
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Replacement Algorithms
Belady’s Optimal Algorithm
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Belady’s optimal replacement
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“Perfect knowledge” of the page reference stream.
Select the page that will not be referenced for the
longest time in the future.
Rare for a system reference stream for every thread in
every process in advance.
 generally unrealizable
 few special cases: program to predict the weather
Its theoretical behavior is used to compare the
performance of realizable algorithms.
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Replacement Algorithms
Belady’s Optimal
Frame
0 1 2 3 2 3 2 0 4 3 2 1 2 1 0 1
(7)
0
0 0 0 0 0 0 0 0 4 4 4 1 1 1 1 1
1
1 1 3 3 3 3 3 3 3 3 3 3 3 0 0
2
2 2 2 2 2 2 2 2 2 2 2 2 2 2
Least Recently
Used
(10)
Least Frequently
Used
(9)
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Frame
0 1 2 3 2 3 2 0 4 3 2 1 2 1 0 1
0
0 0 0 3 3 3 3 3 4 4 4 1 1 1 1 1
1
1 1 1 1 1 1 0 0 0 2 2 2 2 2 2
2
2 2 2 2 2 2 2 3 3 3 3 3 0 0
Frame
0 1 2 3 2 3 2 0 4 3 2 1 2 1 0 1
0
0 0 0 3 3 3 3 3 4 3 3 3 3 3 0 0
1
1 1 1 1 1 1 0 0 0 0 1 1 1 1 1
2
2 2 2 2 2 2 2 2 2 2 2 2 2 2
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Replacement Algorithms
FIFO page replacement
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Replace oldest page in memory
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Intuition:
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Advantages:
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Fair: All pages receive equal residency
Easy to implement (circular buffer)
Disadvantage:
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First referenced long time ago, done with it now
Some pages may always be needed
Difficult to implement (time stamps)
Can we improve the performance by adding
more frames?
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Replacement Algorithms
FIFO
FIFO/3 Frames
Frame
0 1 2 3 0 1 2 3 0 1 2 3 4 5 6 7
(16)
0
0 0 0 3 3 3 2 2 2 1 1 1 4 4 4 7
1
1 1 1 0 0 0 3 3 3 2 2 2 5 5 5
2
2 2 2 1 1 1 0 0 0 3 3 3 6 6
FIFO/4 Frames
Frame
0 1 2 3 0 1 2 3 0 1 2 3 4 5 6 7
(8)
0
0 0 0 0 0 0 0 0 0 0 0 0 4 4 4 4
1
1 1 1 1 1 1 1 1 1 1 1 1 5 5 5
2
2 2 2 2 2 2 2 2 2 2 2 2 6 6
3
3 3 3 3 3 3 3 3 3 3 3 3 7
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Replacement Algorithms
13 Page
Faults!
FIFO/3 Frames
Frame
0 1 2 3 0 1 4 0 1 2 3 4 0 1 2 3
(13)
0
0 0 0 3 3 3 4 4 4 4 4 4 0 4 4 3
1
1 1 1 0 0 0 0 0 2 2 2 2 1 1 1
2
2 2 2 1 1 1 1 1 3 3 3 3 2 2
FIFO/4 Frames
Frame
0 1 2 3 0 1 4 0 1 2 3 4 0 1 2 3
(14)
0
0 0 0 0 0 0 4 4 4 4 3 3 3 3 2 2
1
1 1 1 1 1 1 0 0 0 0 4 4 4 4 3
2
2 2 2 2 2 2 1 1 1 1 0 0 0 0
3
3 3 3 3 3 3 2 2 2 2 1 1 1
14 Page
Faults!
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Replacement Algorithms
FIFO replacement performance
Page Faults
What is going on here?
Belady’s Anomaly
14
Number of Page Faults
12
10
8
Page Faults
6
4
2
0
0
1
2
3
4
5
6
7
8
Number of Frames
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Replacement Algorithms
Least Recently Used
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Replace page not used for longest time in past
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Intuition: Use past to predict the future
Advantages:
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Disadvantages:
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With locality, LRU approximates OPT (Belady’s algorithm)
harder to implement, must track which pages have been
accessed (time stamp, page stack)
does not handle all workloads well
Updates must occur at every memory access
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huge overhead
few computers offer enough hardware support for LRU.
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Replacement Algorithms
Implementing LRU
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Software Perfect LRU
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Hardware Perfect LRU
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OS maintains ordered list of physical pages by reference time
When page is referenced: Move page to front of list (top)
When need victim: Pick page at back of list (bottom)
Trade-off: Slow on memory reference, fast on replacement
Associate register with each page
When page is referenced: Store system clock in register
When need victim: Scan through registers to find oldest clock
Trade-off: Fast on memory reference, slow on replacement
(especially as size of memory grows)
In practice, do not need to implement perfect LRU
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LRU is an approximation anyway, so approximate more
Goal: Find an old page, but not necessarily the very oldest
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Replacement Algorithms
Implementing LRU
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Can use a reference bit
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Reference time tracking implemented in software
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cleared on loading
set every time the page is referenced
periodically scan page tables
note which pages referenced and modified
reset the reference/modified bits
Clock algorithm – efficient software LRU
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all pages are in a circular list
start scan where the previous scan left off
replace the first un-referenced page you find
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Clock Algorithm
Second-Chance Algorithm
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Often called “clock algorithm”
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If the reference bit is 1
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clear the reference bit
move clock pointer to the next page
If reference bit is 0 and not pinned
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keep circular list of all pages (RPT’s, UPT’s, Memory)
clock pointer refers to next page to consider
swap page out to disk (if dirty)
move clock pointer to next page
return page number
Could cycle through entire list before finding
victim
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Clock Algorithm
Clock/3 Frames
(12)
Clock/4 Frames
(9)
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Frame
7 0 1 2 0 3 0 4 2 3 0 3 2 1 2 0
0
7 7 7 2 2 2 2 4 4 4 4 3 3 3 3 0
1
0 0 0 0 0 0 0 2 2 2 2 2 1 1 1
2
1 1 1 3 3 3 3 3 0 0 0 0 2 2
Frame
7 0 1 2 0 3 0 4 2 3 0 3 2 1 2 0
0
7 7 7 7 7 3 3 3 3 3 3 3 3 3 2 2
1
0 0 0 0 0 0 4 4 4 4 4 4 4 4 4
2
1 1 1 1 1 1 1 1 0 0 0 0 0 0
3
2 2 2 2 2 2 2 2 2 2 1 1 1
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Clock Algorithm
Frame 7 0 1 2 3 4 5 6 7 8 3 4 5 0 1 2 7 8 5 6
0
7 7 7 7 7 7 5 5 5 5 5 5 5 5 5 2 2 2 2 2
1
0 0 0 0 0 0 6 6 6 6 6 6 6 6 6 6 6 5 5
2
1 1 1 1 1 1 7 7 7 7 7 7 7 7 7 7 7 6
3
2 2 2 2 2 2 8 8 8 8 8 8 8 8 8 8 8
4
3 3 3 3 3 3 3 3 3 0 0 0 0 0 0 0
5
4 4 4 4 4 4 4 4 4 1 1 1 1 1 1
14
257
5 0
1 650
30 4
3 2
28
7167
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CS 345 Virtual Memory Project
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Project 4
Project 4 – Virtual Memory
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Student explores the concepts of swap space, main
memory, and virtual memory.
Understand the details of page faulting and page
replacement algorithms, what memory access, hit and
fault counts are, and how to track them.
Student implements a virtual address translation system
(MMU) to project 4 using a two-level hierarchical page
table system.
An LC-3 processor is provided that makes all memory
accesses through one function.
That’s right! You only need to implement one function for
Project 5, namely, getMemAdr().
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Project 4
Virtual Memory
Virtual
Address
f (va)
LC-3
MMU
LC-3
Memory
getMemAdr()
(Hardware)
PC-Relative
Indirect
Base+Offset
IR, TRAP
LD, LDR, LDI
ST, STR, STI
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Physical
Address
216 Words
OS Clock
Replacement
Algorithm
Virtual Memory
Paged
Swap Space
45
Project 4
Project 4 – Virtual Memory
unsigned short int *getMemAdr(int va, int rwFlg)
{
unsigned short int pa;
// turn off virtual addressing for system RAM
if (va < 0x3000) return &memory[va];
// calculate physical from virtual virtual
pa = va;
// return physical memory address
return &memory[pa];
} // end getMemAdr
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Project 4
LC-3 Simulator
MAR access thru
getMemAdr(va, rwflg)
MDR access thru
getMemData(va)
setMemData(va)
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Project 4
Crawler, Memtest
Welcome to OS345 Rev 1.1
0>>crawler
178068>>
Crawler R1.1
Process 1: Move #1 to xE29E
Process 1: Move #2 to x6B3F
…
Process 1: Move #99 to x932E
Process 1: Move #100 to xDA8F
Process #1 Halted at 0x937e
1807827>>memtest
MemTest R1.0a
(1) Round 1, Writing to memory...
(1) Round 1, Verifying...
(1) Round 2, Writing to memory...lt
# TID name
address line prior time semaphore status
0 0/0 CLI
403b61 457 5
1
Running
1 1/0 LC3 MemTest 40190c 0
5
1
Waiting
1911162>>
(1) Round 2, Verifying...
(1) Round 3, Writing to memory...
(1) Round 3, Verifying...
…
(1) Round 10, Writing to memory...
(1) Round 10, Verifying...
Process #1 Halted at 0x305c
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Project 4
Two-Level Paging System
15
Virtual Address
… 11 10
RPTE #
…
UPTE #
65
…
0
Frame Offset
Root Page Table
User Page Table
LC-3 Main Memory
+
Flags / Frame #
Flags / UPT #
tcb[curTask].RPT
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+
One per process
Frame<<6 Offset
15 …
65 … 0
Physical Address
Virtual Memory
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Project 4
Virtual Memory
x0000
System (unmapped)
Virtual Address
All tables in LC-3
memory.
 All memory accesses
thru getMemAdr().
 RPT’s pinned.
 Each process has an
RPT pointer (swapped
on context switch).

x2000
x2400
Frame Table
RPT’s (Pinned)
x3000
UPT’s
(Swappable Frames)
User Frames
Paged
Swap
Space
Memory Limit
(Variable)
xFFFF
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Project 4
#defines…
#define LC3_MAX_MEMORY
#define LC3_FRAME_SIZE
#define LC3_FRAMES
65536
64
1024
#define LC3_FBT
#define LC3_RPT
#define LC3_RPT_END
#define LC3_MEM
#define LC3_MEM_END
0x2000
0x2400
0x2800
0x3000
0x10000
216 Words
26 Words
216 / 26 = 210 Frames
Frame Bit Table
Root Page Tables
Start User Memory
#define LC3_MAX_PAGE
(LC3_FRAMES<<2)
#define LC3_MAX_SWAP_MEMORY (LC3_MAX_PAGE<<6)
#define LC3_FBT_FRAME
#define LC3_RPT_FRAME
#define LC3_RPT_END_FRAME
#define LC3_MEM_FRAME
#define LC3_MEM_END_FRAME
(LC3_FBT>>6)
(LC3_RPT>>6)
(LC3_RPT_END>>6)
(LC3_MEM>>6)
(LC3_MEM_END>>6)
// parts of a virtual address
#define RPTI(va)
#define UPTI(va)
#define FRAMEOFFSET(va)
(((va)&BITS_15_11_MASK)>>10)
(((va)&BITS_10_6_MASK)>>5)
((va)&BITS_5_0_MASK)
BYU CS 345
Virtual Memory
Root Page Table Index
User Page Table Index
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Project 4
#defines…
// definitions within a root or user table page
#define DEFINED(e1)
((e1)&BIT_15_MASK)
#define DIRTY(e1)
((e1)&BIT_14_MASK)
#define REFERENCED(e1)
((e1)&BIT_13_MASK)
#define PINNED(e1)
((e1)&BIT_12_MASK)
#define FRAME(e1)
((e1)&BITS_9_0_MASK)
#define PAGED(e2)
((e2)&BIT_15_MASK)
#define SWAPPAGE(e2)
((e2)&BITS_12_0_MASK)
#define MEMWORD(a)
#define MEMLWORD(a)
(memory[a])
((memory[a]<<16)+memory[(a)+1])
#define SET_DEFINED(e1)
#define SET_DIRTY(e1)
#define SET_REF(e1)
#define SET_PINNED(e1)
#define SET_PAGED(e2)
((e1)|BIT_15_MASK)
((e1)|BIT_14_MASK)
((e1)|BIT_13_MASK)
((e1)|BIT_12_MASK)
((e2)|BIT_15_MASK)
#define CLEAR_DEFINED(e1)
#define CLEAR_DIRTY(e1)
#define CLEAR_REF(e1)
#define CLEAR_PINNED(e1)
((e1)&~BIT_15_MASK)
((e1)&~BIT_14_MASK)
((e1)&~BIT_13_MASK)
((e1)&~BIT_12_MASK)
BYU CS 345
Virtual Memory
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Project 4
Page Table Entry
4 bytes
Page # (0 – 8191)
Frame # (0 – 1023)
F D R P
-
-
f
f
f
f
f
f
f
f
f
f S
-
-
p p p p p p p p p p p p p


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
Frame valid (1 bit): one if referenced frame is in main memory; zero otherwise.
Dirty (1 bit): one if referenced frame has been altered; zero otherwise.
Reference (1 bit): one if frame has been referenced; zero otherwise.
Pinned (1 bit): one if frame is pinned in memory; zero otherwise.
Frame number (10 bits): If referenced page is in memory, this value specifies which
frame it occupies. (1024 frames  64 words = 210  26 = 216 bytes = 65536 words.)
 Swap valid (1 bit): one if referenced page has been allocated in swap space; zero
otherwise.
 Swap page number (13 bits). This specifies where referenced page is stored in swap
space. When you load a page into memory, you should include this value in your frame
table summary. (8,192 pages  128 bytes = 213  27 = 220 bytes = 1,048,576 bytes.)
BYU CS 345
Virtual Memory
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Project 4
Virtual to Physical Address
memory[taskRPT + ((((va)&0xf800)>>11)<<1)]
memory[(rpte1&0x03ff)<<6+((((va)&0x7c0)>>6)<<1)]
&memory[(upte1&0x03ff)<<6+((va)&0x003f)]
rpte1 = MEMWORD(taskRPT + RPTI(va));
upte1 = MEMWORD((FRAME(rpte1)<<6) + UPTI(va));
&memory[(FRAME(upte1)<<6) + FRAMEOFFSET(va)];
BYU CS 345
Virtual Memory
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Project 4
Global Clock
Swap Space
RPTE’s
UPTE’s
BYU CS 345
Virtual Memory
Frame’s
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BYU CS 345
Virtual Memory
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Project 4
Implementation Demo
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Virtual Memory
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Project 4
unsigned short int *getMemAdr(int va, int rwFlg)
unsigned short int *getMemAdr(int va, int rwFlg)
{
if (va < 0x3000) return &memory[va]; // system RAM
int pa = va;
//
return &memory[va];
// return physical address
}
BYU CS 345
Virtual Memory
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Project 4
unsigned short int *getMemAdr(int va, int rwFlg)
unsigned short int *getMemAdr(int va, int rwFlg)
MMU turned off for system access
{
if (va < 0x3000) return &memory[va];
// turn off virtual addressing for system RAM
rpta = tcb[curTask].RPT + RPTI(va); rpte1 = MEMWORD(rpta); rpte2 = MEMWORD(rpta+1);
if (DEFINED(rpte1))
Hit!
{
// rpte defined
}
else // rpte undefined 1. get a UPT frame from memory (may have to free up frame)
{
//
2. if paged out (DEFINED) load swapped page into UPT frame
//
else initialize UPT
Go get a Frame
frame = getFrame(-1);
Page Fault rpte1 = SET_DEFINED(frame);
if (PAGED(rpte2)) // UPT frame paged out - read from SWAPPAGE(rpte2) into frame
{
accessPage(SWAPPAGE(rpte2), frame, PAGE_READ);
}
else // define new upt frame and reference from rpt
UPT Page in swap space
rpte1 = SET_DIRTY(rpte1); rpte2 = 0;
Frame {
// undefine all upte's
New UPT Frame
referenced
}
}
MEMWORD(rpta) = rpte1 = SET_REF(SET_PINNED(rpte1));
// set rpt frame access bit
MEMWORD(rpta+1) = rpte2;
upta = (FRAME(rpte1)<<6) + UPTI(va); upte1 = MEMWORD(upta); upte2 = MEMWORD(upta+1);
if (DEFINED(upte1))
Hit!
Page Fault
{
// upte defined
}
else // upte undefined 1. get a physical frame (may have to free up frame) (x3000 - limit) (192 - 1023)
{
//
2. if paged out (DEFINED) load swapped page into physical frame
//
else new frame
}
return &memory[(FRAME(upte1)<<6) + FRAMEOFFSET(va)];
// return physical address}
}
BYU CS 345
Virtual Memory
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Project 4
Frame Bit Table
0x3000
0x8000
2 Frames
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Virtual Memory
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Project 4
accessPage
// ********************************************************************************************
// read/write to swap space
int accessPage(int pnum, int frame, int rwnFlg)
{
static unsigned short int swapMemory[LC3_MAX_SWAP_MEMORY];
switch(rwnFlg)
{
case PAGE_GET_ADR:
// return page address
{
return (int)(&swapMemory[pnum<<6]);
}
case PAGE_NEW_WRITE:
// new write
{
pnum = nextPage++;
}
case PAGE_OLD_WRITE:
// write
{
memcpy(&swapMemory[pnum<<6], &memory[frame<<6], 1<<7);
return pnum;
}
case PAGE_READ:
// read
{
memcpy(&memory[frame<<6], &swapMemory[pnum<<6], 1<<7);
return pnum;
}
}
return pnum;
}
BYU CS 345
Virtual Memory
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Project 4
vma
2 frames – UPT, Frame
No new frames
Same UPT, new Frame
No swap pages
New UPT, new Frame
Clock did not advance
BYU CS 345
Virtual Memory
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Project 4
Virtual Memory Guidelines

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
Verify a clean compilation of your LC-3 virtual memory
simulator. Validate that “crawler.hex” and “memtest.hex”
programs execute properly.
Modify the getMemAdr() function to handle a 2-level, paging,
virtual memory addressing.
Implement a clock page replacement algorithm to pick
which frame is unloaded, if necessary, on a page fault.
Use the provided 1MB page swap table routine to simulate
paged disk storage (8192 pages) or implement your own
routine.
Use crawler.hex and memtest.hex to validate your virtual
memory implementation. Use other routines (such as im)
to debug you implementation.
BYU CS 345
Virtual Memory
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Project 4
Virtual Memory Guidelines
Use the following CLI commands to verify and validate
your virtual memory system. (Most of these routines are
provided, but may require some adaptation to your
system.)

dfm <#>
dft
dm <sa>,<ea>
dp <#>
dv <sa>,<ea>
Display LC3 memory frame <#>
Display frame allocation table
Display physical LC3 memory from <sa> to <ea>
Display page <#> in swap space
Display virtual LC3 memory <sa> to <ea>

im <#>
Init LC3/Set upper LC3 memory limit
rpt <#>
upt <p><#>
Display task <#> root page table
Display task <p> user page table <#>
vma <a>
vms
Access <a> and display RPTE’s and UPTE’s
Display LC3 statistics
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BYU CS 345
Virtual Memory
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Project 4
Virtual Memory Guidelines
Demonstrate that LC-3 tasks run correctly. Be able to dynamically
change LC-3 memory size (im command) and chart resulting changes
in page hits/faults. Memory accesses, hits and faults are defined as
follows:
Memory access (memAccess) = sum of memory hits (memHits) and memory faults (memPageFaults).
Hit (memHits) = access to task RPT, UPT, or data frame. (Exclude accesses below 0x3000.)
Fault (memPageFaults) = access to a task page that is undefined or not currently in a memory frame.
Page Reads (pageReads) = # pages read from swap space into memory.
Page Writes (pageWrites) = # pages written from memory to swap space.
Swap Page (nextPage) = # of swap space pages currently allocated to swapped pages.
Crawler
Frames:
320
16
Memtest
2
320
16
2
Accesses:
Hits:
Faults:
Page Reads:
Page Writes:
Swap Pages:
BYU CS 345
Virtual Memory
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Project 4
Project 4 Grading Criteria
REQUIRED:
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
8 pts – Successfully execute crawler and memtest in 20k words (320 frames).
6 pts – Successfully execute crawler and memtest in 1k words (16 frames).
2 pts – Successfully execute 5 or more LC-3 tasks simultaneously in 16 frames of LC-3
memory.
2 pts – Correctly use the dirty bit to only write altered or new memory frames to swap
space.
2 pts – Chart and submit the resulting memory access, hit, fault, and swap page statistics
after executing crawler (and then memtest) in 320 and 16 frames.
BONUS:
+2 points – early pass-off (at least one day before due date.)
+2 points – Add a per/task frame/swap page recovery mechanism of a terminated task.
+1 point – Implement the advanced clock algorithm (Stallings, pp. 372-373).
+1 point – Implement an additional replacement policy and chart the results.
+2 points – Join the 2-frame club. (Successfully execute 5 or more LC-3 tasks
simultaneously in 2 frames of LC-3 memory. Chart the memory accesses, hits, and
faults.)
 –2 points penalty for each school day late.
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

BYU CS 345
Virtual Memory
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Project 4
So…
1.
2.
3.
4.
5.
6.
Read and comprehend Stallings, Section 8.1.
Comprehend the lab specs. Discuss questions with classmates, the
TA’s and/or the professor. Make sure you understand what the
requirements are! It's a tragedy to code for 20 hours and then
realize you're doing everything wrong.
Validate that the demo LC-3 simulator works for a single task with
pass-through addressing (virtual equals physical) for the LC-3 by
executing the commands “crawler” and “memtest”.
Design your MMU. Break the problem down into manageable parts.
Create and validate a “clock” mechanism that accesses all global
root page tables, user page tables, and data frames.
Implement dirty bit last – use “write-through” for all swapping of a
data frame to swap space.
BYU CS 345
Virtual Memory
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Project 4
So…
7.
Incrementally add support for the actual translation of virtual
addresses to physical addresses with page fault detection as
follows:
a. Implement page fault frame replacement using available
memory frames only. This should allow you to execute any test
program in a full address space.
b. Implement clock page replacement algorithm to unload data
frames to swap pages and reload with a new frame or an existing
frame from swap space. This should allow you to execute all the
test programs in a 32k word address space (20k of paging frames).
c. Implement clock page replacement algorithm to unload User
Page Tables when there are no physical data frame references in
the UPT. This will be necessary when running in a small physical
space (16k words) with multiple tasks.
d. Implement dirty bit to minimize writing frames to swap space.
BYU CS 345
Virtual Memory
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Project 4
So…
8.
Remember to always increment your clock after finding a
replacement frame.
9. Use the vma function to access a single virtual memory
location and then display any non-zero RPT and UPT
entries. Implement various levels of debug trace to watch
what is going on in your MMU. You may use the provided
display functions.
10. When swapping a user page table to swap space, add some
debug “sanity check” code to validate that the UPT does not
have any entries with the frame bit set.
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Virtual Memory
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Virtual Memory
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Paging Problems?

Recent revival in page replacement research.
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Size of primary storage has increased - algorithms
that require a periodic check of each and every
memory frame are becoming less and less practical.
Memory hierarchies have grown taller - the cost of a
CPU cache miss is far more expensive. This
exacerbates the previous problem.
Object-oriented programming techniques have
weakened locality of reference.
Sophisticated data structures like trees and hash
tables and the advent of garbage collection have
drastically changed the memory access behavior of
applications.
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Virtual Memory
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Paging Improvements?

Disk access techniques
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Demand paging
Better Working Set model


use larger blocks
separate swap space - no file table lookup
binary boundaries
load several consecutive sectors/pages rather than individual
sectors due to seek, rotational latency
Monitor program execution – minimize number of pages per
process are needed for execution (locality)
Pre-paging


bring in pages that are likely to be used in the near future
easier to guess at program startup, but may load unnecessary
pages
BYU CS 345
Virtual Memory
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Clock Algorithm Enhancements?


Consider reference bit and dirty bit
4 possible cases (Macintosh scheme)
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(0,0) neither modified or referenced
(0,1) not recently used but modified
(1,0) recently used but clean
(1,1) recently used and modified
Still use “clock algorithm”
 clear only reference bit upon consideration
Add additional reference bits - 3rd, 4th,… chance
At regular intervals, clear all reference bits
A process can be in RAM if and only if all of the pages
that it is currently using can be in RAM.
BYU CS 345
Virtual Memory
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Frame Allocation

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Demand allocation
Options
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Minimum number of frames

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keep 3 empty frames, write out in background
what is the least number of frames to allocate
Allocation Algorithms
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equal allocation
proportional to storage for executable
priority
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Virtual Memory
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Global vs Local Allocation

Global Allocation
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Local Allocation
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replacement page is selected from among all pages
in system
replacement page is selected only from the pages
owned by the process
Process controls its own page fault rate
Number of pages for a process won’t grow
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Virtual Memory
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Virtual Memory
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