Transcript IPRM 2005

Observation of an anomalous minority
carrier trap in n-type InGaAs
Tim Gfroerer and Kiril Simov
Davidson College, USA
Mark Wanlass
National Renewable Energy Lab, USA
~ Supported by Bechtel Bettis, Inc. and the American
Chemical Society – Petroleum Research Fund ~
Defect characterization via DLTS
+
+
+
+ + + + + + + +
+ + P+ + + + + +
+
+
+ + +
+
+ -
+
+
+
-
+
-
-
+
-
N+ -
Depletion
Temporary
Layer With Bias
Reduced Bias
+
Typical DLTS Measurements
0
e
T = 200K
T = 180K
T = 160K
T = 140K
-1
Capacitance Change (a.u.)
e
-2
e
Pulse
toward
zero
bias
free carriers
-3
e
Return to steady-state reverse bias
-4
e
-5
e
trapped carriers
-6
e
0.0
0.1
0.2
0.3
Time (ms)
0.4
0.5
Experimental Setup
Computer with LabVIEW
(5)
Digital Scope
(Tektronix)
Capacitance
meter (Boonton)
(4)
Cryostat with sample
(1)
(2)
77K
(3)
Oxford
Agilent
Temp Controller
Pulse Generator
Device Structure and Band
Diagram
0.05m (Zn) In0.53Ga 0.47As
19
-3
NA = 1x10 cm
0.05m (Zn) InP
18
-3
N A = 2x10 cm
0.05m (Zn) In0.53Ga 0.47As
19
-3
NA = 1x10 cm
0.5m (S) In 0.53Ga0.47As
16
-3
ND = 3x10 cm
0.1m (S) InP
19
-3
ND = 1x10 cm
W
Energy
Depletion
region
Quasi EF,p
++++
-----
Quasi E F,n
Position
p+/n Junction
m (S) InP
18
-3
ND = 3x10 cm
Conduction band
Valence band
Transient Capacitance: Escape
-2
T = 130K
T = 140K
T = 145K
T = 150K
T = 160K
10
e
-4
Steady-State Bias = -1.1V
Pulse = +0.1V
-6
e
esc = 110 s
-1
e
Average Ea = 0.29 eV
12
e
Escape Rate (s )
Capacitance Change (a.u.)
e
8
e
6
e
4
e
-8
e
Pulse = +0.1V relative to SS
and
and
and
SS Bias = -0.1V
SS Bias = -1.1V
SS Bias = -2.1V
2
e
0.0
0.1
0.2
0.3
0.4
0.5
70
80
90
-1
Time (ms)
1 / kT (eV )
100
Filling Pulse Dependence: Capture
-2
e
-1
e
e
-3
-3
e
C0 - Ctraps (a.u.)
-2
Capacitance Change (a.u.)
T = 77K
Pulse Length:
10 s
30 s
100 s
200 s
e
T = 77K
-4
e
-5
e
cap = 113 +/- 2 s
-4
e
-5
e
-6
e
-6
e
-7
e
Steady-State bias = -0.3V
Pulse: +0.2V (relative to SS)
-7
e
-8
-200
0
200
400
Time (s)
600
800
e
0
200
400
Pulse Length (s)
600
Proposed Model
W
Energy
Depletion
region
Quasi EF,p
++++
Conduction band
-----
Traps
d
Quasi E F,n
Position
p+/n Junction
Valence band
Testing the Model
3
e
Bias = -0.1V
Bias = -1.1V
Bias = -2.1V
Bias = -3.1V
-2
2
e
Pulse = +0.1V
T = 77K
-4
e
Thickness (nm)
Capacitance change C0 (a.u.)
e
-6
e
1
e
0
e
-8
e
d
W
 C0 (a.u.)
-1
e
-10
e
0.0
0.2
Time (ms)
0.4
0.6
0
1
2
Reverse Bias (V)
3
Conclusions
• 0.29eV hole trap is observed in
n-type InGaAs under reverse bias
• Temperature-dependent capture
and escape rates are symmetrical
• Rates level off at cold
temperatures due to tunneling
• Device modeling points to defect
states near the p+/n junction