Transcript Temperature-Dependent Transient Capacitance in InGaAs

Temperature-Dependent
Transient Capacitance in
InGaAs/InP-based Diodes
Kiril Simov and Tim Gfroerer
Davidson College
Mark Wanlass
NREL
Supported by the American Chemical Society
– Petroleum Research Fund
Motivation: Thermophotovoltaics
Thermal
Radiation
Heat
Source
Blackbody
Radiator
Blackbody
Radiation
Photovoltaic
Cell
Experimental Setup
Computer with LabVIEW
(5)
Digital Scope
(Tektronix)
Capacitance
meter (Boonton)
(4)
Cryostat with sample
(1)
(2)
77K
(3)
Oxford
Agilent
Temp Controller
Pulse Generator
P-N Junction Depletion Layer with Bias
Depletion Layer
+
+
+
+
+
+
+
+
+
+
+ +
+
+ +
+
+
P
+
+
-
+
+
+
+
+
+
-
+
+
Depletion Layer
- -
N
-
-
-
With Bias
Capacitance Change (a.u.)
Typical Capture Data –
Dependence on Pulse Length
Temp: 77K
Pulse Length:
10 s
30 s
100 s
200 s
0.1
0.01
1E-3
-200
0
200
400
Time (s)
600
800
Ln (Amplitude of Transient) (a.u.)
Capture Analysis
-3
Capture cross-section
blue = 109 s
1
-4

avg=111 +/- 2 s
  vN D
-5
red=113 s
-6
-7
Holes:  = 2.5 x 10-20 cm2
T = 77K, Bias:
-0.1V steady state
-0.3V reverse bias
Electrons:  = 7.5 x 10-21 cm2
-8
0
200
400
Pulse Length (us)
600
Capacitance Change (a.u.)
Number of Traps
0.4
Temp: 77K
700s pulse
Exp Fit
0.3
Cfree
0.2
0.1
Ctrapped
0.0
-400
CT
NT 
ND
C F
0
400
~ 7 x 1015 cm-3
800
Time (s)
1200
1600
Typical Escape data – Dependence
on Temperature
Ln( C ) (a.u.)
0
-3
-6
 = 123 s
 = 33 s
77K
146K
156K
 = 51 s
-9
-100
0
100 200 300 400 500 600 700 800
Time(s)
Escape Analysis
Escape Rate ~ A * e
-1
Ln (Escape Rate) (s )
12
-Ea / kT
10
~ trap depth
Avg Ea: 0.30 +/- 0.02 eV
8
Bias ~
0V
-1V
-2V
6
4
75
80
85
90
-1
Energy 1/kT (eV )
95
Conclusions






A deep level has been detected
The effective trap cross-section is ~10-20 cm2
The trap concentration is ~ 1016 cm-3
The depth of the level is ~ 0.30 eV
Our results are consistent with sub-bandgap PL from
similar structures.
Web links:
This talk: http://webphysics.davidson.edu/faculty/thg/talksposters/MAR-04.ppt
PL poster: http://webphysics.davidson.edu/faculty/thg/talksposters/SESAPS-03.ppt
Device Structure
p+ layer
junction
n layer