Chapter 20 - Audio Daughtercard

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Transcript Chapter 20 - Audio Daughtercard

Chapter 20
This chapter provides a series of
applications.
Part 1: Applications using the PCM3003 AUDIO
DAUGHTER CARD TMDX326040A)
by Richard Sikora
Part 2: USB Daughter Board.
by ATE Communications
Part 3: PCI ‘C6711 DSP Educational Board.
by ATE Communications
Introduction
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Some audio applications for the
TMS320C6711 DSK with Audio Daughter
Card have been provided.
These include:
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Chapter 20, Slide 2
Alien Voices: Changing voices using ring
modulation. Widely used in science- fiction
films for alien voices.
Delays and Echo: Using buffers to delay a
signal up to 4 seconds to simulate echo from
a valley / cavern.
Electronic Crossover: Dividing audio signal
into bass and treble using Finite Impulse
Response (FIR) filters.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Introduction
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These include:
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Chapter 20, Slide 3
Guitar Effects: Changing sound of an electric
guitar by adding reverberation, treble boost
and distortion.
Guitar Tuner: Tuning the strings of an electric
guitar using an adaptive filter. Display of
accuracy of tuning on LEDs.
Playback and Record: Using buffers to record
and playback sounds. Half speed and double
speed playback. Introduces concepts of
decimation and interpolation.
Reverberation: Simulation of reflections from
walls to make a small room sound like an
auditorium.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Introduction
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These include:
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Chapter 20, Slide 4
Signal Generator: Generating test waveforms –
sine and triangle, continuous, burst and sweep
between 60 Hz and 12 kHz.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Code Location
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The CCS projects are in the following location:
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See the following for more information:
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Chapter 20, Slide 5
\Code\Chapter 20 – Other Applications\Audio
Daugtercard…
\Links\Using the Applications.pdf
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Chapter 20, Part 2
USB Daughter Board
by ATE Communications
(www.ate.co.uk)
Chapter 20, Slide 6
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Overview
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Combined signal acquisition/generation
and USB interface card:
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Chapter 20, Slide 7
Data acquisition/generation via 1 audio
CODEC, 2 ADCs and 2 DACs. (See
Chapter 8 for applications).
PC interface to DSK via USB chipset.
USB chipset to DSP on DSK via EMIF.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Audio CODEC: CS4218
(see Chapter 8)
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Chapter 20, Slide 8
High quality stereo audio input and
output.
Sampling rate of 48 kHz.
16 bit output (same resolution as audio
CD).
Interface to DSP via serial ports.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
ADCs and DACs: AD9220 and AD768
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Chapter 20, Slide 9
Two ADCs for digital to analogue
conversion of high frequency signals.
Two DACs for arbitrary waveform
generation of high frequency signals.
Interface between DSP and converters
via DSP's EMIF.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
USB Interface Chipset
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Chapter 20, Slide 10
USB revision 1.1 full speed device.
16 bit interface to DSP via EMIF.
Data transfer rates between DSP and
PC of up to 7M bits per second.
Internal FIFOs with programmable
empty and full flags connected to DSP's
timer input pins.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Using the Audio CODEC (1)
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Chapter 20, Slide 11
Set up transmit and receive serial ports'
pins. Serial ports should be set up to use
external frame synch and clock signals.
Rising edges are used to clock
transmit/receive data and frame synchs
are active high.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Using the Audio CODEC (2)
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Chapter 20, Slide 12
Set up the serial ports to use 32 bit
words, the data are delayed by one clock
edge, no companding is used.
The sample data are in the upper 16 bit
words of each 32 bit word. The lower 16
bits are used for control information.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Using the DACs and ADCs (1)
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Chapter 20, Slide 13
The DACs and ADCs are connected to
the DSP's EMIF.
DACs and ADCs can be accessed by
reading from and writing to the DSP's
CE3 memory space.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Using the DACs and ADCs (2)
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Chapter 20, Slide 14
A 32 bit read from the CE3 memory
space reads packed data, two 16 bit
words per 32 bit word. The ADCs have
12 bit resolution and should be
converted to 2's complement signed
values.
A 32 bit write to the CE3 memory space
writes data to both DACs. The data are
packed, two 16 bit words per 32 bit
word. The DACs have 16 bit resolution.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Using the USB interface (1)
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Using the USB interface from the PC
requires software to communicate with
the device driver.
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The USB chipset is connected to the DSP
via the EMIF.
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The USB chip is mapped to the DSP's
CE2 memory space.
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The CE2 memory space should be set up
using the following value for the CE2
control register: 0x7136C424.
Chapter 20, Slide 15
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Using the USB interface (2)
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Chapter 20, Slide 16
Reading and writing to USB
accomplished by accessing CE2 memory
space.
FIFO flags connected to DSP’s timer
inputs provide information on USB
chip’s FIFO status.
DSP should monitor FIFO flags to avoid
under or overruns.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
PC - USB daughter board communication
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Chapter 20, Slide 17
Communicating with the board from
the PC requires code to interface to the
USB device driver.
Lower level details of communicating
with the device are handled by the
device driver.
Code running on a built-in micro
controller on the USB chip is used to
move the data between the USB buffers
and external port FIFOs.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
PC - USB daughter board communication
Application: FFT processed on the DSK,
results sent to the PC via the USB interface
and the spectrum is display on the PC.
Files location:
\Chapters\Usb
Chapter 20, Slide 18
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Chapter 20, Part 3
PCI ‘C6711 DSP Educational Board,
PCIC67AT
by ATE Communications
(www.ate.co.uk)
Datasheet
Block Diagram
Chapter 20, Slide 19
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Overview (1)
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Chapter 20, Slide 20
C6711 based PCI card with a variety of
signal acquisition and generation
peripherals.
Video encoder for acquisition of video
data.
Video decoder for generation of video
signals.
Stereo audio CODECs for acquisition
and generating audio signals.
High frequency ADCs and DACS for
high frequency signal acquisition and
generation.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Overview (2)
Additional features:
 PC has access to DSP via PCI interface.
 JTAG controller for tight integration
with CCS.
 Bus matching FIFOs for managing high
bandwidth of video data on video
encoder and decoder.
 Large amount of SDRAM for program
and data storage.
Chapter 20, Slide 21
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Video encoder
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Chapter 20, Slide 22
DSP has access to video encoder output
data via memory mapped FIFO.
FIFO flag connected to DSP's external
interrupt to facilitate using EDMA to
move data from FIFO to other memory
locations.
Video encoder set up using I2C bus.
Video encoder should write framing
codes to FIFO to facilitate synchronising
to data stream.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Video decoder
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Chapter 20, Slide 23
DSP has access to video decoder input
port via memory mapped FIFO.
Video decoder data input format
compatible with output format of
encoder.
Video encoder internal registers set up
via I2C bus.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Audio CODECs: CS4218
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Chapter 20, Slide 24
Connected to DSP's serial ports.
Two stereo audio CODECs available
providing four input and four output
channels.
Audio CODECs use 16 bit data at 48
kHz sampling rate.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
ADCs and DACs: AD9220, AD768
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Chapter 20, Slide 25
High frequency ADCS for capturing of
high frequency signals
ADCs memory mapped in DSP for high
bandwidth parallel interface
DACs useful for outputting processed
waveforms or arbitrary waveform
generation
DACs memory mapped in DSP for high
bandwidth parallel interface
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Programming the DSP
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Use of JTAG emulator connected to
JTAG header on board.
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Directly in CCS via on board JTAG
controller.
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Single step debugging of DSP possible
when using CCS .
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Access to all internal memory locations
of DSP via HPI connected to PCI
interface.
Chapter 20, Slide 26
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Accessing data on DSP from PC
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Chapter 20, Slide 27
Using PCI device driver.
PCI devices are plug and play, set up of
devices in PC straightforward.
PCI device connected to DSP's HPI.
Via DSP's EMIF programmer has
access to all peripherals connected to
EMIF.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Stand alone operation
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Chapter 20, Slide 28
External power connector for stand
alone operation.
Programming DSP via JTAG header
using JTAG interface board such as
XDS510.
Less complex than PCI set up, no
operating system trouble or need for
device drivers.
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002
Chapter 20
- End -
Chapter 20, Slide 29
Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2002