Design, Fabrication, and Testing a Four- Quadrant Silicon Photosensor

Student: Tho T. Snow Advisor: Prof. Mustafa G. Guvench Electrical Engineering Department - University of Southern Maine A four-quadrant Si photosensor is designed to fabricate on a 4-in n-type wafer manufactured by Fairchild Semiconductor Top view of 3 masks designed for a four-quadrant Si photosensor Mask # 1 Mask #2 Mask #3 Top view of Structural cross sectional view of a quadrant of Si photosensor device p++ active layer Metal contact Metallization three masks aligned to active layer pattern on top of each other The goal of this project is to design and fabricate a Si photosensor consisting of four identical photodiodes placing in a square pattern on a Si chip. The photosensor will be used to sense the 2 dimension position of the chip with respect to the spot defined by Red 632.8 nm He-Ne laser beam. -20.0

Capacitance versus Bias Voltage

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Inverse-Capacitance-Squared Curve

slope = 90 This is the Curve Tracer used in the I V curve plotting and testing of the photodiode.

Picture on the left hand side is the control unit of the furnace, and the one on the right is a hot furnace tube in which the wafer is placed for oxide growth and dopant diffusion. The photo above is the vacuum chamber used in the metal deposition on the surface of the Si wafer. The metal layer on the wafer shown in the picture above was processed using this vacuum chamber Cmax = 330 pF 400 300 200 100 0 0.0

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Bias voltage (V)

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Bias Voltage (V)

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The oxide thickness and the doping concentration of the Si layer underneath the oxide can be determined using capacitance versus bias voltage measurements as shown. And the deposited metal thickness can be determined using the four point resistance probe test