Transcript Slide 1

Design and Implementation of VLSI Systems
(EN0160)
Sherief Reda
Division of Engineering, Brown University
Spring 2007
[sources: Weste/Addison Wesley – Rabaey Pearson]
Lecture05: MOS transistor theory
• Last time
– Gate layouts and stick diagrams
• This time
– MOS transistor theory (ideal case)
gate-oxide-body sandwich = capacitor
Operating modes
• Accumulation
• Depletion
• Inversion
polysilicon gate
silicon dioxide insulator
Vg < 0
+
-
p-type body
(a)
0 < V g < Vt
+
-
depletion region
(b)
• The charge accumulated
V >V
is proportional to the
excess gate-channel
voltage (Vgc-Vt)
g
(c)
t
+
-
inversion region
depletion region
The MOS transistor has three regions of
operation
• Cut off
Vgs < Vt
• Linear (resistor):
Vgs > Vt & Vds < Vgs-Vt
Current α Vds
• Saturation:
Vgs > Vt and Vds ≥ Vgs-Vt
Current is independent of Vds
NMOS transistor, 0.25um, Ld = 10um, W/L = 1.5,
VDD = 2.5V, VT = 0.4V
How to calculate the current value?
• MOS structure looks like parallel plate
capacitor while operating in inversion
– Gate – oxide – channel
• Qchannel = CV
• C = εoxWL/tox = CoxWL (where Cox=εox/tox)
• V = Vgc – Vt = (Vgs – Vds/2) – Vt
gate
Vg
polysilicon
gate
W
tox
n+
L
p-type body
n+
SiO2 gate oxide
(good insulator, ox = 3.9)
+
+
Cg Vgd drain
source Vgs
Vs
Vd
channel
+
n+
n+
Vds
p-type body
Carrier velocity is a factor in determining the
current
• Charge is carried by electrons
• Carrier velocity v proportional to lateral E-field
between source and drain
• v = μE
μ called mobility
• E = Vds/L
• Time for carrier to cross channel:
t=L/v
I=Q/t
• Now we know
– How much charge Qchannel is in the channel
– How much time t each carrier takes to cross
Qchannel
I ds 
t
W
 Cox
L
V  V  Vds
 gs t
2

Vds 

  Vgs  Vt 
Vds
2


V
 ds

In linear mode (Vgs > Vt & Vds < Vgs-Vt)
Qchannel
I ds 
t
W
 Cox
L
V  V  Vds
 gs t
2

V
  Vgs  Vt  ds Vds
2

V
 ds

Can be ignored for small Vds
For a given Vgs, Ids is proportional (linear) to Vds
In saturation mode (Vgs > Vt and Vds ≥ Vgs-Vt)
Qchannel
I ds 
t
W
 Cox
L
V  V  Vds
 gs t
2

V
  Vgs  Vt  ds Vds
2

Vdsat

I ds   Vgs  Vt 
2



V

2
gs
 Vt 
V
 ds

V
 dsat

2
Now drain voltage no longer increases current
Operation modes summary


0


V
I ds    Vgs  Vt  ds
2


2


Vgs  Vt 


2
Vgs  Vt
cutoff
V V  V
 ds
ds
dsat

Vds  Vdsat
linear
saturation
2.5
2
Ids (mA)
– 0.6 micron process
– tox = 100 Å
–  = 350 cm2/V*s
– Vt = 0.7 V
– W/L = 4/2 l
Vgs = 5
1.5
Vgs = 4
1
Vgs = 3
0.5
0
0
Vgs = 2
Vgs = 1
1
2
3
Vds
4
5
PMOS is similar
What happens when we construct a INV
(PMOS+NMOS)?
Inverter voltage transfer function
A
B
C
D
E
Summary
• This lecture
– Ideal transistor modeling
• Next lecture
– Non ideal transistor modeling
Inverter current transfer function