Transcript 投影片 1 - Nanoelectronic Fabrication Facility, HKUST

Nanoelectronics Fabrication Facility
Workshop for
Electron Beam Lithography System
JBX-6300FS
By Nelson LI
13 November 2009
Page 1
1. System specifications
2. Importance of chip feature on writing
result
3. Requirements of overlay writing
4. Photoresist provide
5. Requirements of pattern design
6. Exposure result
7. Charging scheme
Page 2
1. System specifications
•System model
•Basic specifications
•Substrates supported by system
Page 3
System specifications
Manufacturer : JEOL
Model No
: JBX-6300FS
SYSTEM MODEL
Page 4
System specification
Specifications
Writing mode
High speed or high precision
Beam Current
30pA to 20nA
Scanning Speed
12M to 250 Hz
Accelerate
Voltage
Max. Field Size
(um2)
20, 50 or 100 kV
High speed mode:
2000 (20kV), 1000(50kV)
or 500 (100kV)
High precision mode:
250 (20kV), 125(50kV)
or 62.5 (100kV)
BASIC SPECIFICATIONS
Page 5
System specifications
Substrates
Size
Mask
5”x5”x0.09”
Wafer
4”, 3” or 2”
Nano-imprint mask
65mm x 65mm x 6.35mm
Chip sample
2cm x 2cm, 1.5cm x 1.5cm
or 1cm x 1cm
SUBSTRATES SUPPORTED BY SYSTEM
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2. Importance of chip feature on writing result
• Cassette to mount chip
• Cases of improper chip feature
i, chip with rough edge
ii, chip with incorrect size
• Requirements of chip feature
Page 7
Importance of chip feature on writing result
Back of cassette
Front of cassette (writing side)
Exposure
window
Grounding pins
Chip backside
Positioning pins
Chip surface with PR
Cassette to mount chip: Picture of cassette
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Cases of improper chip feature
Cassette back
Problem:
Cassette front (writing side)
i, Grounding pin cannot touch on sample surface
ii, May cause rotation error
Chip with rough edges
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Cases of improper chip feature
Cassette back
(for 15mm x15mm)
chip)
Cassette front (writing side)
Exposure window
Chip center
18mm x 18mm chip
Exposure window
Exposure window center
Problem:
Exposure area shift from center of chip
Chip with incorrect size
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Importance of chip feature on writing result
• Straight and smooth cutting edge
• Square shape with orthogonal angles
• For overlay writing, patterns of
previous layer should be located at the center
of chip
Requirements of chip feature
Page 11
3. Requirements of overlay writing
• Feature of Global and Chip alignment marks
• Positions of Global and Chip alignment marks
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Requirements of overlay writing
Global Mark:
L
L= 1500 μm
W = 3 μm
W
Chip Mark:
L= 20 μm
W = 3 μm
Etch depth of
Mark:
Feature of Global and Chip alignment marks
≧1 μm
Page 13
Requirements of overlay writing
•For 4” wafer, L≦40.5mm
•For 2” wafer, L≦19mm
L
Wafer
Positions of Global alignment marks on wafer
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Requirements of overlay writing
Four chip alignment marks
located at 4 corners of writing
chip M1, M2, M3 and M4
respectively.
Positions of Chip alignment marks on wafer
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4. Photoresist Provide
• Positive photoresist
i,
ZEP-520A
(thickness ～400 to 100nm)
ii,
ZEP-7000
(for mask, thickness ～400 to 150nm)
iii,
PMMA950-A2 (thickness ～180 to 80nm)
• Negative photoresist
i,
AR-N7520.18 (thickness ～400nm)
ii,
AR-N7520.073 (thickness ～100nm)
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5. Requirements of pattern design
• File format, pattern sizes and pattern area
• Pattern samples
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Requirements of pattern
• File format: GDSII
• Total number of vertex point per polygon ≦600
• Pattern sizes(line width or gap size) ≧ 100nm
• Pattern Complexity ↑, file conversion time ↑
Pattern sizes and file format
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Requirements of pattern
• Problems of larger exposure area
i, long writing time
ii, high risk of field stitching error due to
laboratory temperature fluctuation
Stitching error
Pattern sizes and file format
Page 19
Requirements of pattern
iii, Proximity error
Correct expose
100 μm
120 μm
Over expose
Pattern sizes and file format
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Requirements of pattern
1500 μm
Chip area:
1500um2
Exposure area:
11.51% of Chip area
Exposure time:
10.4mins
1500 μm
Pattern sample 1
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Requirements of pattern
500 μm
0.2 μm line width
500 μm
Chip area:
500um2
Exposure area:
11.51% of Chip area
Exposure time:
1min
Pattern sample 2
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Requirements of pattern
500 μm
100 μm
0.1 μm x 0.2 μm polygon
500 μm
Pattern conversion fail!
Pattern sample 3
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6. Exposure result
• Pattern sample 1
• Pattern sample 2
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Exposure result
80nm line width
100nm line width
ZEP-520A (+)
Pattern sample 1:
ma-N2403 (-)
Shot bar pattern
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Exposure result
100nm line width
100nm2 square
pattern
ZEP-520A (+)
ma-N2403 (-)
Pattern sample 1
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Exposure result
Zigzag patterns with 100nm line width
50nm line patterns with 0.3 ° rotation angle
ZEP-520A (+)
Pattern sample 1
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Exposure result
ZEP-520A (+)
ma-N2403 (-)
Pattern sample 2
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7. Charging Scheme
• Definitions of Short and Long jobs
• Charging for internal users
• Charging for other HK Institutions
• Charging for external users
• Job submission procedure
Page 28
Charging Scheme
•Short job:
Exposure time ≦ 3hrs
•Long job:
Exposure time ﹥ 3hrs
Charging Scheme: Definition of Short and Long jobs
Page 29
Charging Scheme
Long Job(HK$)
Short Job(HK$)
5”x5” soda lime mask
2244
1494
5”x5” quartz mask
2814
2064
Wafer or chip sample
2232
1482
Nano-imprint mask
2746
1996
Charging Scheme: Charging for internal users
Page 30
Charging Scheme
Other HK Institutions
External Users
Long Job(HK$) Short Job(HK$) Long Job(HK$) Short Job(HK$)
5”x5” soda
lime mask
5”x5” quartz
mask
Wafer or chip
sample
Nano-imprint
mask
5074
4204
11376
7355
5735
4865
12037
8016
5060
4190
11362
7341
8127
7257
14429
10408
Remark: Price includes 16% administration fee
Charging Scheme: Charging for external users and other HK Institutions Page 31
Charging Scheme
The price list of substrates will post on website on coming Monday!
Job submission procedure: internal users
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Charging Scheme
1. Go to www.nff.ust.hk
2.
3.
4.
Job submission procedure: for external users and other HK Institutions Page33
Nanoelectronics Fabrication Facility
Thankyou
Contact Information :
Name: Nelson LI
Email : [email protected]
Job submission procedure
Page 34