Transcript MicroProcessors and Microconltrollers

University of Kashan
Department of Computer Engineering
MicroProcessors
&
MicroControlers
H. Sabaghian B.
Spring 2006
hsabaghianb @ kashanu.ac.ir
Microprocessors
Text Books
 Microcontroller 8051
Author: Mohammad ali Mazidi
Translator: Dr. Sepidnam
 The 8051 Microcontroller
Author: Iscott Makenzi
Translator: Dr. Seyed Razi
Edition : 3
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Microprocessors
Introduction
Lec note 1
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Microprocessors
outline
Microprocessor
Micro-computer
Microcontroller
3_Bus (Data, Address, Control)
I/O
Memory
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Microprocessors
Microprocessor (µP)(MPU)
µP = CPU on a single chip
Components of CPU
Registers: Temporary storage locations for
program instruction or data.
The Arithmetic Logic unit (ALU): performs both
arithmetic and logical operations
Timing and Control Circuits: keeps all working
together in the right time sequence
Bus: n_bit (internal) path for data exchange
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Microprocessors
Microprocessor
 Microprocessor=µP=MPU
 Tasks
 processing data
 controlling all components make µP the µComputer system
 µP executes instructions in memory
 Fetch, Decode, Execute
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Microprocessors
Microcomputers



Micro-computer (µ-Computer)
small computer
specifically for data acquisition and control applications
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Microprocessors
Microcomputers
 All Microcomputers consist of (at least) :






Microprocessor Unit (µP)
Program Memory (ROM)
Data Memory (RAM)
Input / Output ports (IO)
Bus System (External)
(and Software)
 MPU is the brain of microcomputer
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Microprocessors
The Input/Output (I/O) System
 I/O links MPU to outside world.
 Input port : a circuit through which an external device
can send signals (data?) to the MPU.
 Output port is a circuit that allows the MPU to send
signals (data?) to external devices.
 I/O ports connect both digital and analogue devices by
DAC and ADC
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Microprocessors
Bus
 A common communications pathway that carry
information between the various elements of system
 The term BUS refers to
 a group of wires
 or conduction tracks on a printed circuit board (PCB)
though which binary information is transferred
 Subsystems are connected through BUS together
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Microprocessors
3_Bus
There are three main bus grouPs
 ADDRESS BUS
 DATA BUS
 CONTROL BUS
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Microprocessors
Data Bus
 The Data Bus carries the data which is transferred
throughout the system. ( bi-directional)
 Examples of data transfers
 Program instructions being read from memory into MPU.
 Data being sent from MPU to I/O port
 Data being read from I/O port going to MPU
 Results from MPU sent to Memory
 These are called read and write operations
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Microprocessors
Address Bus
Address = binary number that identifies a
specific memory storage location or I/O
port involved in a data transfer
Address Bus = pathway transmit address to
memory or I/O port.
Address Bus is unidirectional (one way):
addresses are always issued by the MPU
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Microprocessors
Control Bus
Control Bus = grouP of control signals
Control signals are unidirectional, and are
mainly outputs from the MPU.
 provide synchronization (timing control)
between MPU and other components.
Example
RD: (read signal) read data into MPU
WR: (write signal) write data from MPU
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Microprocessors
Main memory
 Memory
 Stores programs
 Provides data to the MPU
 Accepts result from the MPU for storage
 Main memory Types
 ROM : read only memory. Contains program
(Firmware). does not lose its contents when
power is removed (Non-volatile)
 RAM: random access memory (read/write
memory) used as variable data, loses contents
when power is removed volatile. When power up
will contain random data values
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Microprocessors
Read-Only Memory
 µP can read instructions from ROM quickly
 Cannot write new data to the ROM
 ROM remembers the data, even after power cycled
 When power is turned on, the microprocessor will
start fetching instructions from ROM (bootstrap )
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Microprocessors
Available ROMs
 Masked ROM or just ROM
 PROM or programmable ROM(once only)
 EPROM (erasable via ultraviolet light) =UVROM
 Flash
 re-writable about 10000 times
 usually must write a whole block not just 1 or 2 bytes,
 slow writing fast reading
 EEPROM (electrically erasable ROM)
 fast writing slow reading
 can program millions of times
 useless for storing a program
 good for save configuration information.
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Microprocessors
ROM
m+1 bit
Address
Capacity :
2
m 1
A0
A1
D0
D1
A2
D2
Am
2
OE : Output Enable
m 1
 ( n  1)
Dn
ROM
PROM
EEPROM
connect to RD of µP
CE (CS ) : Chip Enable
to Address decoder
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CE
OE
Microprocessors
n+1 bit
Data
ROM Read Timing
A0-Am
D0-Dn
CE
OE
OE falls to data valid
Addr valid to data valid
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Microprocessors
27XX EPROM
U3
U1
8
7
6
5
4
3
2
1
23
22
19
20
18
21
10
9
8
7
6
5
4
3
25
24
21
23
2
U2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
O0
O1
O2
O3
O4
O5
O6
O7
9
10
11
13
14
15
16
17
OE
CE
8
7
6
5
4
3
2
1
23
22
19
21
20
18
VP P
2716
16 kbit
2 kbyte
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
O0
O1
O2
O3
O4
O5
O6
O7
9
10
11
13
14
15
16
17
22
27
20
OE/V PP
CE
1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
O0
O1
O2
O3
O4
O5
O6
O7
11
12
13
15
16
17
18
19
OE
PGM
CE
VP P
2732
2764
32 kbit
4 kbyte
64 kbit
8 kbyte
PGM and VPP are used to programming
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Microprocessors
27XXX EPROM
U7
U6
U4
10
9
8
7
6
5
4
3
25
24
21
23
2
26
22
27
20
1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
U5
D0
D1
D2
D3
D4
D5
D6
D7
11
12
13
15
16
17
18
19
OE
PGM
CE
10
9
8
7
6
5
4
3
25
24
21
23
2
26
27
22
20
1
VP P
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
D0
D1
D2
D3
D4
D5
D6
D7
11
12
13
15
16
17
18
19
10
9
8
7
6
5
4
3
25
24
21
23
2
26
27
1
OE
CE
22
20
VP P
28
27128
27256
128 kbit
16 kbyte
256 kbit
32 kbyte
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A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
O0
O1
O2
O3
O4
O5
O6
O7
11
12
13
15
16
17
18
19
12
11
10
9
8
7
6
5
27
26
23
25
4
28
29
3
2
24
31
22
OE/V PP
CE
1
VC C
27512
512 kbit
64 kbyte
Microprocessors
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
D0
D1
D2
D3
D4
D5
D6
D7
13
14
15
17
18
19
20
21
OE
PGM
CE
VP P
27010
1024 kbit
128 kbyte
28XX E2PROM
8
7
6
5
4
3
2
1
23
22
19
20
21
18
24
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
9
10
11
13
14
15
16
17
10
9
8
7
6
5
4
3
25
24
21
23
2
OE
WE
CE
22
27
20
VC C
28
2816
16 kbit
2 kbyte
A0
I/O0
A1
I/O1
A2
I/O2
A3
I/O3
A4
I/O4
A5
I/O5
A6
I/O6
A7
I/O7
A8
A 9 R D Y /B U S Y
A10
A11
A12
OE
WE
CE
VC C
11
12
13
15
16
17
18
19
1
10
9
8
7
6
5
4
3
25
24
21
23
2
26
1
22
27
20
28
2864
64 kbit
8 kbyte
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A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
D0
D1
D2
D3
D4
D5
D6
D7
11
12
13
15
16
17
18
19
OE
WE
CE
12
11
10
9
8
7
6
5
27
26
23
25
4
28
29
3
2
24
31
22
32
VC C
28256
256 kbit
32 kbyte
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
D0
D1
D2
D3
D4
D5
D6
D7
13
14
15
17
18
19
20
21
OE
WE
CE
12
11
10
9
8
7
6
5
27
26
23
25
4
28
29
3
2
30
1
24
31
22
32
VC C
28010
1026 kbit
128 kbyte
Microprocessors
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
D0
D1
D2
D3
D4
D5
D6
D7
13
14
15
17
18
19
20
21
OE
WE
CE
VC C
28040
4096 kbit
512 kbyte
RAM (Random Access Memory)
µP can read the data from RAM quickly
µP can write new data to RAM quickly
RAM forgets its data if power is turned off
Two type is available :
Static RAM(SRAM): ff base, fast, expensive, low
cap/vol, applied for cache , no refresh
Dynamic RAM (DRAM): cap base, slow , low cost high
capacity/volume , applied for main memory(pc) need
refresh.
hsabaghianb @ kashanu.ac.ir
Microprocessors
RAM(Static)
m+1 bit
Address
Capacity :
RD
WR
CS
2
m 1
A0
A1
D0
D1
A2
D2
Am
2
m 1
 ( n  1)
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CS
WR
Dn
Data bus is
Bidirectional
RAM
: Read signal
connect to MemRD of µP
: Write signal
connect to MemWR of µP
: Chip Select
to Address decoder
n+1 bit
Data
RD
Microprocessors
Static RAM
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Microprocessors
Dynamic RAM
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Microprocessors
Dynamic RAM
Write : Charge bitline HIGH or LOW and set wordline HIGH
Read : Bit line is precharged to a voltage halfway between HIGH
and LOW and then the word line is set HIGH.
Sense Amp Detects change
Reads are destructive (Must follow with a write)
Address Buffer
hsabaghianb @ kashanu.ac.ir
Microprocessors