Transcript Document

ICSOC Workshop (Chengdu) Guest Speech
Dr. Jeremy Wang
Asia Pacific Executive Director, FSA
August 16, 2005
Overview

About the FSA

The superiority of the fabless business model

The global semiconductor environment

Challenging the successful innovation model

Future trends
FSA MISSION
Accelerate the growth and increase the return on
invested capital of the global fabless business model by
promoting an environment for innovation.

Provide a platform for meaningful global collaboration
between fabless companies and their partners

Identify and articulate opportunities and challenges to
enable solutions

Provide members with research, resources, publications
and survey information

Promote the fabless business model
A Global Community of Leaders
Dr. Chintay Shih
Special Advisor
Bob Bailey
PMC-Sierra
Woody Yang
Silicon7
David French
Cirrus Logic
Chia Song Hwee
Chartered
Robert Tsao
UMC
500 corporate
members worldwide
Jensen Huang
NVIDIA
Jimmy S.M. Lee
ISSI
Dwight Decker
Conexant
Sanjay Jha
Qualcomm
Ming Kai Tsai
MediaTek
Wim Roelandts
Xilinx
Dr. Morris Chang
TSMC
Richard Chang
ASE
KY Ho
ATI
Dr. Nicky Lu
Etron
FSA’s BOARD
Fabless Seat
Fabless Seat
Fabless Seat
Foundry Seat
EDA Seat
Special Director
Fabless Seat
Fabless Seat
Fabless Seat
Foundry Seat
IDM Seat
Director Emeritus
Fabless Seat
Fabless Seat
Fabless Seat
Foundry Seat
Fabless Seat
Fabless Seat
Fabless Seat
Back-end Seat
Jodi Shelton
Executive Director
FSA
Special Director
12 Fabless, 3 Foundry, 1 IDM, 1 EDA, 1 Backend, 1 FSA = 19 total 1 Director Emeritus, 2 Special Directors
FSA BOD Members
Sanjay Jha
Qualcomm
David
French
Cirrus Logic
Vahid Manian
Broadcom
Corporation
Dwight Decker
Conexant
Gina Gloski
Formerly with
FyreStorm,
Inc.
Michael Rekuc
Chartered
Jodi Shelton
Colin Harris
PMC-Sierra,
Inc.
Dennis Segers
Matrix
Semiconductor
Ron Boyd
Freescale
Semiconductor
Almost 500
corporate
members
worldwide
Jim Seto
ATI
Technologies
Rick Cassidy
TSMC North
America
Dr. Jackson
Hu
UMC
Ron Torten
Agilent
Technologies
Aart de Geus
Synopsys, Inc.
Jeorge Hurtarte
TranSwitch
Corporation
Dr. Tien Wu
ASE, Inc.
FABLESS INFRASTRUCTURE/ECOSYSTEM
Photomask
Foundry
Partners
Wafer Fabs
Almost 500
corporate
members
worldwide
EDA/IP
Design
Services
Over 1,100 Fabless Semiconductor Cos
OEM and ODM
Customers
Testing and subsystems
Packaging
Assembly
The Global Fabless Model
1,300+ Fabless Companies Worldwide
Europe
150
North America
600
China &
Taiwan
500
Israel
100
Growth of global membership—nearly
500 global members!
Fabless Leaders
The Fabless “Billion-Dollar Club”

In 2004, nine fabless companies achieved $1B+ in sales.
Rank
Billion-Dollar Club Companies
2004 CY Revenue
($000)
1
QUALCOMM (QCT Division)
$3,224,000
2
Broadcom
$2,400,610
3
ATI Technologies
$2,140,871
4
NVIDIA Corporation
$2,010,033
5
SanDisk Corporation
$1,777,055
6
Xilinx, Inc.
$1,588,700
7
MediaTek Incorporation
$1,252,470
8
Marvell Semiconductor, Inc.
$1,224,580
9
Altera
$1,016,364
Source: FSA
ASIA-PACIFIC LEADERSHIP COUNCIL
Chairman
Dr. Nicky Lu
Etron
Gordon Gau
Holtek
Dr. Chintay Shih
Special Advisor
Ming Kai Tsai
MediaTek
Chou-Chye
Huang
Sunplus
Wen-Chi
Chen
VIA
H.P. Lin
Faraday
Dr. Woodward
Yang
Silicon7
Qin-Sheng Wang
Huada Electronic
Design Co., Ltd.
Dr. Dr.
Zhonghan
(John) Deng
Vimicro
K.C. Shih
Global Unichip
Dr. Shaojun Wei
Datang
Microelectronic
Technology, Co.
Ltd.
EUROPEAN LEADERSHIP
COUNCIL
David Baillie
Cambridge
Semiconductor
David Milne
Wolfson
Microelectronics
John Hodgson
Cambridge
Silicon Radio
Roland Pudelko
Dialog
Semiconductor
Svenn Tore Larsen
Nordic Semiconductor
Anthony Sethill
Frontier Silicon
The Superiority of the Fabless Model
Fabless vs. Overall Semi Revenue
$250,000
Overall Semi Revenue
WW Fabless Industry
$33.2B
$213B
$35,000
$30,000
$200,000
$25,000
$100,000
$20,000
($M)
($M)
$150,000
$102B
$15,000
$10,000
$50,000
$5,000
$3.6B
$0
$0
19941995 199619971998 1999 200020012002 2003 2004
Fabless CAGR=22%
vs.
Overall Semiconductor Growth at 7%
 Fabless
companies have
a higher gross
margin than
IDMs (47.3%
vs 44.5%)
 Fabless
companies have
significantly
higher R&D
expenditure
than IDMs 23.7%
vs.15.2% of
sales
The Rising Cost of Manufacturing
$3.0
Fab Cost Growth 7x
Semi Industry Revenue Growth 5x
600
$1.9
$2.0
($B)
450
300
$1.0
$0.7
$0.4
$0.0
150
0
0.80um, 6- 0.50um, 6/8- 0.18um, 80.13um,
inch 1990
inch 1994
inch 2001 300mm 2003
Source: Goldman Sachs
750
% Growth Industry Revenue
$2.5 - $3.0
Who Can Afford a 300mm Fab?
“A company must have the long-term endurance for maintaining its
technology leadership or risk falling behind foundries.”
Top 20 Semiconductor Companies by 2004 Revenue
$30,000
$25,000
A company must have revenue $5B - $7B to
support 300mm expansion
$20,000
($M)
$15,000
$10,000
Source: Goldman Sachs; FSA
Sanyo
ADI
Sharp
Matsushita
Hynix
Sony
IBM
Fujitsu
AMD
Micron
Motorola
NEC
Toshiba
Infineon
STMicro
Renesas
TI
Samsung
Intel
$0
Philips
$5,000
Recent Hybrid and
Partnership Models
STMicro
Freescale
Philips
Partnered with TSMC to achieve
process alignment for 90-nm
Samsung
IBM
Infineon
Partnered with Chartered for 65-nm
down to 45-nm technology development
AMD
Takes 50% investment in UMC
Infineon
Makes 30% investment in UMC
Philips
Announced “capital-efficient” manufacturing strategy”;
Halted current plans to build a new fab;
Goal is 50% outsourcing on advanced CMOS processing
TI
To outsource 40-50%+
The Proliferation of the Foundry
50+ Foundries
Worldwide
Cost of Implementing
Designs Increasing
30
25
Prototype
Cost ($M)
20
Validation
15
Physical
10
Verification
5
0
0.35µm
Source: IBS (2005)
Architecture
0.25µm
0.18µm
0.13µm
90nm
Probablility of Designs not Operating
as Expected
Probability of Re-spin Increasing
40
38
35
30
25
20
16
15
10
7
5
2
4
0
0.35µm
Source: IBS (2005)
0.25µm
0.18µm
0.13µm
90nm
Design Composition (Typical)
0.18µm
(5M gates)
Design
engineering
head count
0.13µm
(10M gates)
EDA
tool
exp
Design
engineering
head count
EDA
tool
exp
90nm
(20M gates)
Design
engineering
head count
EDA
tool
exp
65nm*
(40M gates)
Design
engineering
head count
EDA
tool
exp
No.
%
%
No.
%
%
No.
%
%
No.
%
%
Architecture &
project mgmt
3
10.0
2.0
8
13.3
3.0
29
20.4
4.0
66
21.2
?
Specification to RTL
3
10.0
3.0
9
15.0
5.0
26
18.3
7.0
58
18.7
?
13
43.3
52.0
22
36.7
50.0
42
29.6
47.0
88
28.4
?
Physical design
9
30.0
42.0
16
26.7
39.0
28
19.7
36.0
58
18.5
?
Post-GDSII
2
6.7
1.0
5
8.3
3.0
17
12.0
6.0
41
13.2
?
Subtotal hardware
30
100.0
100.0
60
100.0
100.0
142
100.0
100.0
311
100.0
?
Software
18
37.5
54
47.4
170
54.5
390
55.6
TOTAL
48
100.0
114
100.0
312
100.0
701
100.0
Functional
verification
* Estimate
HEAD COUNT WITHIN DESIGN TEAMS
IS INCREASING RAPIDLY
Future Trends & Challenges

Standard Setting is the key

PC (Intel), Multimedia, DVD (Media Tek),

Wi-Fi (WAPI), Wimax, 3G (Qualcomm), Digital TV,

Leverage collaboration and integration of supply chain partners into
a cohesive unit--designers, EDA and IP vendors & foundries

SiP vs. SOC (Hybrid model)

Heterogeneous Integration for SiP

3rd party IPs for SOC

Consumer and communication applications

System and software knowledge
Thank you!
Dr. Jeremy Wang王智立博士
Asia Pacific Executive Director
e-mail: [email protected]
全球IC設計與委外代工協會
FSA (Fabless Semiconductor Association )
www.fsa.org