Transcript Diapositive 1

MAPS for Particles Physics
Christine Hu-Guo (IPHC)
Trends for Pixel Sensor Development
CCD (Charge Coupled Device)

Future subatomic physics experiments need
detectors  beyond the state of the art

MAPS provide an attractive trade-off between
granularity, material budget, readout speed,
radiation tolerance and power dissipation
Power consumption
Limited for all experiments


3T pixel
Analogue RO MAPS

Digital RO MAPS


3DIT
High resistivity EPI

October 2010
USTC
2D & 3D MAPS
Hybrid Pixel Detector
IPHC [email protected]
2
Development of MAPS for Charged Particle Tracking

In 1999, the IPHC CMOS sensor group proposed the first CMOS pixel sensor (MAPS) for
future vertex detectors (ILC)
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
Numerous other applications of MAPS have emerged since then
~10-15 HEP groups in the USA & Europe are presently active in MAPS R&D
Original aspect: integrated sensitive volume (EPI layer) and front-end readout electronics
on the same substrate

Charge created in EPI, excess carriers propagate
thermally, collected by NWELL/PEPI , with help of reflection
on boundaries with P-well and substrate (high doping)



Compact, flexible
EPI layer ~10–15 µm thick



thinning to ~30–40 µm permitted
Standard fabrication technology


Q = 80 e-h / µm  signal < 1000 e-
Cheap, fast turn-around
Room temperature operation
R.T.
Attractive balance between granularity, material budget, radiation tolerance, read out
speed and power dissipation

BUT
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October 2010
Very thin sensitive volume  impact on signal magnitude (mV!)
Sensitive volume almost un-depleted  impact on radiation tolerance & speed
Commercial fabrication (parameters)  impact on sensing performances & radiation tolerance
NWELL used for charge collection  restricted use of PMOS transistors
USTC
IPHC [email protected]
3
Achieved Performances with Analogue Readout

MAPS provide excellent tracking performances

Detection efficiency ~100%


ENC ~10-15 eS/N > 20-30 (MPV) at room temperature
MIMOTEL

Single point resolution ~ µm, a function of pixel pitch

~ 1 µm (10 µm pitch), ~ 3 µm (40 µm pitch)
M18
MAPS: Final chips:

MIMOTEL (2006): ~66 mm², 65k pixels, 30 µm pitch
MIMOSTAR
EUDET Beam Telescope (BT) demonstrator

MIMOSA18 (2006): ~37 mm², 262k pixels, 10 µm pitch
Chip dimension: ~2 cm²
High resolution EUDET BT demonstrator

MIMOSTAR (2006): ~2 cm², 204k pixels, 30 µm pitch

LUSIPHER (2007): ~40 mm², 320k pixels, 10 µm pitch
Test sensor for STAR Vx detector upgrade
LUSIPHER
Electron-Bombarded CMOS for photon and radiation imaging detectors
October 2010
USTC
IPHC [email protected]
4
Radiation tolerance (preliminary)

Ionising radiation tolerance:

O(1 M Rad) (MIMOSA15, test cond. 5 GeV e-, T = -20°C, tint~180 µs)
Integ. Dose
0
1 Mrad


Noise
S/N (MPV)
Detection Efficiency
9.0 ± 1.1
10.7 ± 0.9
27.8 ± 0.5
19.5 ± 0.2
100 %
99.96 % ± 0.04 %
tint << 1 ms, crucial at room temperature
Non ionising radiation tolerance: depends on pixel pitch:

20 µm pitch: 2x1012 neq /cm2 , (Mimosa15, tested on DESY e- beams, T = - 20°C, tint ~700 μs)
Fluence (1012neq/cm²)
S/N (MPV)
Det. Efficiency (%)


2.1
5.8 (5/2)
5.8 (4/2)
27.8 ± 0.5
100.
21.8 ± 0.5
99.9 ± 0.1
14.7 ± 0.3
99.3 ± 0.2
8.7 ± 2.
77. ± 2.
7.5 ± 2.
84. ± 2.
10 µm pitch: 1013 neq /cm2 , (MIMOSA18, tested at CERN-SPS , T = - 20°C, tint ~ 3 ms)

0
6
10
1026
28.5 ± 0.2
99.93 ± 0.03
680
20.4 ± 0.2
99.85 ± 0.05
560
14.7 ± 0.2
99.5 ± 0.1
parasitic 1–2 kGy gas  N ↑
Further studies needed :

October 2010
0.47
5.8·1012neq/cm² values derived with standard and with soft cuts
Fluence (1012neq/cm²)
Q cluster (e-)
S/N (MPV)
Det. Efficiency (%)

0
Tolerance vs diode size, Readout speed, Digital output, ... , Annealing ??
USTC
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System integration

Industrial thinning (via STAR collaboration at LBNL)

~50 µm, expected to ~30-40 µm
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Ex. MIMOSA18 (5.5×5.5 mm² thinned to 50 μm)
Development of ladder equipped with MIMOSA chips (coll. with LBNL)

STAR ladder (~< 0.3 % X0 )  ILC (<0.2 % X0 )
LVDS drivers
PIXEL Ladder
10 MAPS Detectors
low mass / stiffness
cables
to motherboard
40 LVDS Sensor output pairs
clock, control, JTAG, power,
ground.
% radiation length
MIMOSA detector
0.0534
Adhesive
0.0143
Cable assembly
0.090
Adhesive
0.0143
CF / RVC carrier
0.11
0.282
Total
Now 0.37 % Xo

Edgeless dicing / stitching  alleviate material budget of flex cable
October 2010
18-21/05/2009
USTC
IPHC [email protected]
FEE09
IRFU - IPHC [email protected]
6
Analogue Readout Sensors  Digital Readout Sensors

Analogue readout sensors : excellent performance
BUT: moderate readout speed for larger sensors with smaller pitch!

For many applications: high granularity and fast readout required
simultaneously
Integrating signal processing: ADC, Data sparsification, …
 Digital Readout Sensors

 R&D on high readout speed, low noise, low power dissipation, highly
integrated signal processing architecture with radiation tolerance
October 2010
USTC
IPHC [email protected]
7
Development of CMOS Pixel Sensors for Charged Particle Tracking

Design according to 3 issues:

Increasing S/N at pixel-level
 A to D Conversion at column-level
 Zero suppression at chip edge level
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Pixel Array
Rolling shutter mode
Power v.s. speed:

Power  Readout in a rolling shutter mode
Speed  1 row pixels are read out //
ADC

Zero suppression
MIMOSA26 is a reticule size MAPS with
binary output, 10 k images / s
Pixel array: 1152 x 576, 18.4 µm pitch
 Hit density: ~ 106 particles/cm²/s
 Architecture:
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October 2010
Pixel (Amp+CDS) array organised in // columns r.o.
in the rolling shutter mode
1152 ADC, a 1-bit ADC (discriminator) / column
Integrated zero suppression logic
Remote and programmable
USTC
13.7 mm

MIMOSA26
Active area: ~10.6 x 21.2 mm2
IPHC [email protected]
21.5 mm
8
MIMOSA26: 1st MAPS with Integrated Ø
CMOS 0.35 µm OPTO technology, Chip size : 13.7 x 21.5 mm2
Integration time: ~ 100 µs
 R.O. speed: 10 k frames/s
 Hit density: ~ 106 particles/cm²/s
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
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Testability: several test points
implemented all along readout
path
 Pixels out (analogue)
 Discriminators
 Zero suppression
 Signal transmission
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Pixel array: 576 x 1152, pitch: 18.4 µm
Active area: ~10.6 x 21.2 mm2
In each pixel:
 Amplification
 CDS (Correlated Double Sampling)
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Row sequencer
Width: ~350 µm
1152 column-level discriminators
 offset compensated high
gain preamplifier followed
by latch
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Zero suppression logic
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Reference Voltages
Buffering for 1152
discriminators
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I/O Pads
Power supply Pads
Circuit control Pads
LVDS Tx & Rx
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Current Ref.
Bias DACs
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
October 2010
USTC
Readout
controller
JTAG controller
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Memory
management
Memory IP blocks
IPHC [email protected]

PLL, 8b/10b
optional
9
Radiation Tolerance Improvement

Non ionising radiation tolerance
High resistivity sensitive volume  faster charge collection

Exploration of a VDSM technology with depleted (partially ~30 µm) substrate:


Project "LePix" driven by CERN for SLHC trackers (attractive for CBM, ILC and CLIC Vx Det.)
Exploration of a technology with high resistivity thin epitaxial layer

XFAB 0.6 µm techno: ~15 µm EPI ( ~ O(103).cm), Vdd = 5 V (MIMOSA25)
 Benefit from the need of industry for improvement of the photo-sensing
elements embedded into CMOS chip
TCAD Simulation
15 µm high resistivity (1000 Ω . cm) EPI compared to 15 µm standard EPI (10 Ω . cm)
For comparison: standard CMOS
technology, low resistivity P-epi
high resistivity P-epi: size of depletion
zone size is comparable to the P-epi
thickness!
October 2010
USTC
IPHC [email protected]
10
MIMOSA25 in a high resistivity epitaxial layer
Landau MP (in electrons) versus cluster size
EPI: (1000 Ω . Cm)
0 neq/cm²
0.3 x 1013 neq/cm²
1.3 x 1013 neq/cm²
3
MIMOSA25
saturation -> >90 % of charge is collected
is 3 pixels -> very low charge spread for
depleted substrate
16x96
Pitch 20µm




x 1013 neq/cm²
To compare: «standard» non-depleted EPI
substrate: MIMOSA15 Pitch=20µm, before and
after 5.8x1012 neq/cm2
20 μm pitch, + 20°C, self-bias diode @ 4.5 V, 160 μs read-out time
Fluence ~ (0.3 / 1.3 / 3·)1013 neq/cm2
Tolerance improved by > 2 order of mag.
Need to confirm det (uniformity !) with beam tests
October 2010
USTC
IPHC [email protected]
11
MIMOSA26 Test Results

Laboratory tests:

ENC ~ 11-13 e-
Seed
CCE
source)
(55Fe

0.64 mV
Standard (~10 .cm) 14 µm
EPI layer
~21%
2x2
3x3
~ 54 %
~ 71 %
0.31 mV
High resistivity
(~400 .cm)
EPI
thickness
seed
2x2
3x3
10 µm
~ 36 %
~ 85 %
~ 95 %
15 µm
~ 31 %
~ 78 %
~ 91 %
20 irradiation
µm
~ and
22 %after exposure
~ 57 %
Signal to noise ratio for the seed pixel before
to ~a 76 %
fluence of 6 x 1012 neq / cm²
(a)
Standard (~10 .cm) 14 µm
EPI layer
Before irradiation
S/N at seed
pixel
(106Ru source)
~ 20
(230 e-/11.6 e-)
After 6x1012 neq/cm²
10.7
High resistivity (~400 .cm)
EPI
thick
Before irradiation
After 6x1012 neq/cm²
10 µm
~ 35
22
15 µm
~ 41
28
20 µm
~ 36
--------
(b)
October 2010
USTC
IPHC [email protected]
12
High-Resistivity CMOS Pixel Sensors

Preliminary conclusions:

Detection efficiency ~100% (SNR ~40) for very low fake rate: Plateau until fake rate of few 10-6

Single point resolution <~4 µm

Detection efficiency ~100% after exposure to fluence of 1x1013 neq/cm²
 Excellent detection performances with high-resistivity epitaxial layer despite moderate
resistivity (400 Ω.cm) and poor depletion voltage (<1V)
 Tolerance to >~ O(1014) neq/cm² seems within reach (study under way)
 MIMOSA26: design base line for STAR Vx upgrade, CBM MVD. Its performances
are close to the ILD vertex detector specifications
October 2010
USTC
IPHC [email protected]
13
Summary of MIMOSA26 Main Characteristics

More than 80 sensors tested

Yield ~90%


(75% fully functional sensors thinned to 120 µm + 15% (showing one bad row or column)
Thinning yield to 50 µm ~90%

Readout time tr.o.~100 µs (10 4 frames/s)  suited to > 10 6 particules/cm²/s

Detection efficiency ~100% (S/N ~ 40) for very low fake rate

Plateau until fake rate of few 10-6
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Single point resolution <~ 4 µm

Detection efficiency still ~100% after exposure to:

Fluence of 1x1013 neq / cm²
 Tolerance to >~O(1014) neq /cm² seems within reach (study under way)

TID: ~ several 10² KRad at room temperature
 Expected to reach ~O(1) MRad tolerance at negative temperature
October 2010
USTC
IPHC [email protected]
14
STAR Heavy Flavor Tracker (HFT) Upgrade

Physics Goals:
Identification of mid rapidity Charm and Beauty mesons and
baryons through direct reconstruction and measurement of the
displaced vertex with excellent pointing resolution
courtesy of M. Szelezniak / Vertex-2010

TPC – Time Projection Chamber
(main detector in STAR)
HFT – Heavy Flavor Tracker

SSD – Silicon Strip Detector

IST – Inner Silicon Tracker

PXL – Pixel Detector (PIXEL)
Goal: Increasing pointing
resolution from the outside in
TPC
October 2010
~1 mm
USTC
SSD
~300 µm
IST
~250 µm
PXL
<30 µm
IPHC [email protected]
vertex
15
STAR PIXEL Detector
Total: 40 ladders
Ladder = 10 MAPS sensors (~2x2 cm² each)
Sensors Requirements

Multiple scattering minimisation:
Sensors thinned to 50 um, mounted on a flex
kapton/aluminum cable
 X/X0 = 0.37% per layer


Sufficient resolution to resolve the
secondary decay vertices from the primary
vertex


Luminosity = 8 x 1027 / cm² / s at RHIC_II



~200-300 (600) hits / sensor (~4 cm2) in the
integration time window
Shot integration time ~< 200 µs
8 cm radius
Outer layer
Low mass in the sensitive area of the
detector  airflow based system cooling



< 10 um
Work at ambient (~ 35 °C ) temperature
Power consumption ~ 100 mW / cm²
End view
Sensors positioned close (2.5 - 8 cm radii)
to the interaction region


~ 150 kRad / year
few 1012 Neq / cm² / year
October 2010
USTC
2.5 cm
Inner layer
Centre of the
beam pipe
courtesy of M. Szelezniak / Vertex-2010
IPHC [email protected]
16
STAR PIXEL Detector

3 steps evolution:

2007: A MimoSTAR-2 sensors based
telescope has been constructed and
performed measurements of the detector
environment at STAR
MimoSTAR-2: sensor with analogue output
3 plans telescope with MImoSATR-2 sensors

2012: The engineering prototype
detector with limited coverage (1/3 of
the complete detector surface), equipped
with PHASE-1 sensors will be installed
PHASE-1: sensor with binary output without
zero suppression
Prototype detector composed of 3 sectors
with PHASE-1 sensors

2013: The pixel detector composed with
2 layers of ULTIMATE sensors will be
installed
ULTIMATE: sensor with binary output and with
zero suppression logic
PIXEL detector composed of 2 MAPS layers
October 2010
USTC
IPHC [email protected]
17
13780 µm
MIMOSA26
Optimisation
ULTIMATE
22710 µm
ULTIMATE: Extension of MIMOSA26
3280 µm
21560 µm

Reduction of power dissipation

Pixel adjustment & optimisation for a 20.7 µm pixel pitch

Discriminator timing diagram optimisation
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Integration of on-chip voltage regulators
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Zero Suppression circuit (SuZe) adapted to STAR condition

Minimisation of digital to analogue coupling

Enhance testability

In future chip :Latch up free memory may be integrated
20240 µm
 ULTIMATE sensors are planned to be delivered to LBL in Q1 2011
October 2010
USTC
IPHC [email protected]
18
Direct Applications of MIMOSA26

FP6 project EUDET: Provide to the scientific community an infrastructure
Pixel Sensor
aiming to support the detector R&D for the ILC

JRA1: High resolution pixel beam telescope

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Telescope features:

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Two arms each equipped with 3 MIMOSA26 (50 µm)
DUT between these arms and moveable via X-Y table
High extrapolated resolution < 2 µm
Large sensor area ~ 2 cm2
High read-out speed ~ 10 k frame/s
(DUT)
EUDET telescope is available to use it for tests at test beams, mainly at DESY or CERN
Spin-offs

Several BT copies: foreseen for detector R&D

BT for channelling studies, mass spectroscopy, etc

CBM (FAIR): demonstrator for CBM-MVD


CBM (Compressed Baryonic Matter)
FIRST (GSI): VD for hadrontherapy  measurements

October 2010
FIRST (Fragmentation of Ions Relevant for Space and
Therapy)
USTC
IPHC [email protected]
19
Extension of MIMOSA26 to Other Projects

STAR HFT (Heavy Flavour Tracker) - PIXEL sensor : (see following slides)

Micro Vertex Detector (MVD) of the CBM :
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Vertex detector of the ILC:
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2 double-sided stations equipped with MIMOSA sensors
0.3-0.5% Xo per station
~< 5 µm single point resolution
Several MRad & > 1013neq /cm²/s
Sensor with double-sided read-out r.o. speed !
Start of physics >~ 2016
Geometry: 3 double-sided or 5 single sided layers
~0.2% Xo total material budget per layer
2 μm (4-bit ADC ) < sp < 3 μm (discri.) (~16 µm pitch)
tint. ~ 25 μs (innermost layer)  double-sided readout
tint. ~ 100 μs (outer layer)  Single-sided readout
Pdiss < (0.1–1 W/cm²)× 1/50 duty cycle
Candidate for other experiments:

(VD) EIC, (ITS upgrade, FOCAL) ALICE, (SVT) SuperB, (VD) CLIC …
October 2010
USTC
IPHC [email protected]
20
R&D Directions: Sensor Integration in Ultra Light Devices

PLUME (Pixelated Ladder with Ultra-low Material Embedding) Project

Study a double-sided detector ladder
motivated by the R&D for ILD VD
 Targeted material budget: <~0.3%XO
 Correlated hits reconstruct minivector


Time resolution
Sensors with different functionalities on each side

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Better resolution / easier alignment
Spatial resolution
Square pixels for single point resolution
Elongated pixels for time resolution
SERWIETE (SEnsor Raw Wrapped In an Extra Thin Envelope) Project

Motivated by HadronPhysics2, FP7
 30 µm thin sensors mounted on a thin flex cable and
wrapped in polymerised film
 Expected material budget <~ 0.15 % Xo
 Unsupported & flexible detector layer ?


October 2010
to evaluate the possibility of mounting a supportless
18-20/10/2010
ATHIC 2010
[email protected]
ladder on a cylindrical surface likeIPHC
a beam
pipe (used
as mechanical support).
Proof of principle expected in 2012
Collaboration with IMEC
USTC
IPHC
22
Fully functional microprocessor chip in flexible
plastic envelope. Courtesy of Piet De Moor,
[email protected]
IMEC company, Belgium
21
R&D Directions: Large Area Sensors (LAS)

Large surface detector  minimize dead zone

AIDA, CBM, EIC, biomedical imaging: sensor well beyond the reticle size

Maximum size of a CMOS chip in modern deep submicron technology is limited by
its reticle size (2x2 cm²)
TOP
TOP
TOP
TOP
Reticle size is a maximum size that can
be realised in a single lithography step
768x768
768x768
768x768
768x768
2


3
1
Pitch ~16 µm
Pitch ~16 µm
Pitch ~16 µm
Pitch ~16 µm
1
2
768x768
Pitch ~16 µm
768x768
Pitch ~16 µm
768x768
Pitch ~16 µm
768x768
Pitch ~16 µm
2
3
768x768
Pitch ~16 µm
768x768
Pitch ~16 µm
768x768
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3
4
768x768
Pitch ~16 µm
768x768
Pitch ~16 µm
768x768
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768x768
Pitch ~16 µm
4
1
BOTTOM
BOTTOM
BOTTOM
BOTTOM
4
Fabrication using stitching technique

Large CMOS sensor is divided into smaller
sub-blocks
 These blocks have to be small enough that
they all fit into the limited reticle space
Reticule 2 x 2 cm²
 The complete sensor chips
TOP
are being stitched together
from the building blocks in
BOTTOM
the reticle.
~ 5 cm
Stitching technique:
768x768
Pitch ~16 µm
1234 1234
October 2010
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IPHC [email protected]
~ 5 cm
22
R&D Directions: Using 3DIT to Achieve Ultimate MAPS Performances

3DIT: stack thin (~10 µm) IC chips (wafers), interconnections between chips by TSV

3DIT are expected to be particularly beneficial for MAPS



Combine different fabrication processes
Resorb most limitations specific to 2D MAPS
Split signal collection and processing functionalities, use best suited technology for each Tier
:



Pixel Controller, CDS

Tier-1: charge collection system  Epitaxy (depleted or not), deep N-well ?  ultra thin layer X0 
Tier-2: analogue signal processing analogue, low Ileak, process (number of metal layers)
Tier-3: mixed and digital signal processing
Tier-4: data formatting (electro-optical conversion ?)
Diode
Diode
Analog Readout Analog Readout
Circuit
Circuit
Diode
Sensor
Analog
~ 50 µm
Diode
Analog Readout Analog Readout
Circuit
Circuit
Pixel Controller,
A/D conversion
2D - MAPS
October 2010
digital process (number of metal layers)
feature size fast laser driver, etc.
USTC
Digital
~ 20 µm
TSV
Through Silicon Vias
The First 3D Multiproject Run for HEP
International Collaboration
IPHC [email protected] USA, France, Italy, Germany, …
23
3D - MAPS
IPHC 3D MAPS: Self Triggering Pixel Strip-like Tracker (STriPSeT)

Combination of 2 processes: Tezzaron/Chartered 2-tiers with a high resistivity EPI tier
Tier-1
Tier-2
Cf~10fF
Tier-3
off <10 mV
G~1
Digital RD
Cc=100fF
Vth
Cd~10fF
Ziptronix
(Direct Bond Interconnect, DBI®*)

Tezzaron
(metal-metal (Cu) thermocompression)
DBI® – Direct Bond Interconnect, low temperature CMOS compatible direct oxide bonding with
scalable interconnect for highest density 3D interconnections (< 1 µm Pitch, > 10 8/cm /cm² Possible)

Tier-1: Thin, depleted (high resistivity EPI) detection tier  ultra thin sensor!!!





Tier-2: Shaperless front-end:



Fully depleted  Fast charge collection (~5ns)  should be radiation tolerant
For small pitch, charge contained in less than two pixels
Sufficient (rather good) S/N ratio defined by the first stage
“charge amplification” ( >x10) by capacitive coupling to the second stage
Single stage, high gain, folded cascode based charge amplifier, with a current source in the feedback loop
 Shaping time of ~200 ns very convenient: good time resolution
Low offset, continuous discriminator
Tier-3: Digital: Data driven (self-triggering), sparsified binary readout, X and Y projection of hit
pixels pattern

October 2010
Matrix 256x256  2 µs readout time
USTC
IPHC [email protected]
24
IPHC 3D MAPS: Fast 3D Sensor with Power Reduction

MAPS with fast pipeline digital readout aiming to minimise power consumption
(R&D in progress)

Subdivide sensitive area in ”small” matrices running individually in rolling shutter mode

Adapt the number of raws to required frame readout time
 few µs r.o. time may be reached

Design in 20 µm²:



Tier 1: Sensor & preamplifier (G ~ 500 µV/e-)
Tier 2: 4-bit pixel-level ADC with offset cancellation circuitry (LSB ~ N)
Tier 3: Fast pipeline readout with data sparsification
 sp ~ 2 μm
Tint. < 10 µs
RO
Sparsification
4-bit ADC
Detection diode
& Amplifier
~18-20 µm
October 2010
USTC
IPHC [email protected]
25
Conclusion

After 10 year, 2D-MAPS R&D reaches its maturity for real scale applications


EUDET, STAR (PIXEL), FIRST (VD), …
R&D continues: new performance scale accessible with emergent CMOS fabrication
technology allowing to fully exploit the potential of MAPS approach
CBM, ALICE/LHC, EIC, CLIC, SuperB, …
 System integration (PLUME , SERWIETE) + Intelligent data processing + data transmission


Mediate & long term objective: 3D sensors mainly motivated by RO < few µs

Ultimately: expect to become the best performing pixel technology ever …?
October 2010
USTC
IPHC [email protected]
26

Back up
October 2010
USTC
IPHC [email protected]
27
Application of CMOS Sensors to CBM Experiment
October 2010
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IPHC [email protected]
28
Direct Applications of EUDET Sensor
October 2010
USTC
IPHC [email protected]
29
MIMOSA26 Test

Standard EPI layer (fab. end 2008) v.s. high resistivity EPI layer (fab. end 2009)
Charge collection & S/N (Analogue output, Freq. 20 MHz)
High resistivity (~400 .cm)
Standard (~10 .cm) 14 µm
EPI layer
Seed
Charge Collection
(55Fe source)
~21%
S/N at seed pixel
(106Ru source)
2x2
~ 54 %
3x3
~ 71 %
~ 20 (230 e-/11.6 e-)
0.64 mV
EPI
seed
2x2
3x3
10 µm
~ 36 %
~ 85 %
~ 95 %
15 µm
~ 31 %
~ 78 %
~ 91 %
20 µm
~ 22 %
~ 57 %
~ 76 %
10 µm
~ 35
15 µm
~ 41
20 µm
~ 36
0.31 mV
ENC ~ 13-14 eOctober 2010
USTC
IPHC [email protected]
30