Transcript Document

Roadmap of Microelectronic Industry
Scaling of MOSFET
Reduction of channel length
Integration density
Speed  α;
L  L/α
 α2
Power/device  1/α2
Power density unchanged;
Voltage  1/α
Equivalent thickness of gate oxide  1/
Gate Dielectric film in ULSI MOSFET
Gate
oxide
Gate
n+
n+
p-Si
Equivalent Gate
Oxide Thickness
tEq= tx SiO2/x
x: dielectric constant of
insulator X
SiO2 = 3.2
Use high-x insulator
Possible epitaxial dielectric films on Si
r
On Si(100)
(rectangular)
On Si(111)
(triangular)
Si3N4
6-9
amorphous
Hex., a = 7.6 Å,
mismatch 1%, 900°C
-Al2O3
9
Cubic, a = 7.91Å
Same as on (100)
CeO2
26
Cubic, a = 5.45 Å
mismatch 0.4%, < 550°C
Same as on (100)
ZrO2
(Y-stb)
HfO2
25
Cubic, a ~ 5.2 Å
mismatch 3%, 730°C
?
25
Amorphous
Amorphous
mismatch 3.5%, 800°C
(current)
Metallization target parameters
Electromigration Effects
Void
Pile-up
Electron wind and field-driven atomic migration
Multi-level Metallization
RC delay issue
Lower levels: fine connections to
individual devices
Upper levels: thicker/wider
common connections
Cu metallization: reducing wire
resistance
Low-k dielectrics: reducing
parasitic capacitance
Lithography:
shorter wavelength (deep UV, X-ray,
electron/ion beams) source, optics, resist materials
Gate insulator: with high dielectric constant (high-k),
high dielectric strength, effective barrier to impurity (e.g.,
B) migration
Si-on-insulator (SOI): reducing capacitive
coupling between devices, power consumption, effective
heat dissipation
Double-gate FET
Double-gate FET by
selective epitaxial growth
Single-electron Tunneling (SET) Transistor
Coulomb blockade effect
Devices based on quantum effects in nanostructured materials
quantum dots/wire, nano-wires (e.g., carbon nanotubes),
molecular devices, …
Index of Single-wall
Carbon Nanotubes
(SWNT)
Armchair (n, n)
Zigzag (n, 0)
General (m, n)
Electronic properties of SWNTs
SWNTs: 1D crystal
If m - n = 3q 
metallic
Otherwise 
semiconductor
Zigzag, dt = 1.6nm
=18, dt = 1.7nm
=21, dt = 1.5nm
=11, dt = 1.8nm
Armchair, dt = 1.4nm
STM I-V
spectroscopy
Bandgap of semiconducting
SWNTs:
ta
E g  C C
dt
a
C C = 1.42 Å,
t  5.4 eV,
overlap integral
Doping of semiconductor SWNTs
N, K atoms  n-type; B atoms, oxygen  p-type
SWNT Transistors
SWNT CMOS inverter & its characteristics
Molecular diodes and nonlinear devices
Molecule with D--A
structure
C16H33Q-3CNQ
D
Highly conductive zwitterionic D+--Astate at 1-2V forward bias
Reverse conduction state D---A+
requires bias of 9V
I-V curve of Al/4-ML C16H33Q-3CNQ LB
film/Al structure

A
Ultimate Physical Limits
Thermodynamic limit: energy consumption in handling 1 bit of
information = kT log 2  18 meV = 3  10-21 J at RT
Current products: Pentium 4, power consumption 30 W, consists
> 2.5  106 devices operating at > 4  108 Hz, energy cost per
bit of operation  10-15 J
Demonstrated in laboratory: energy cost of operating a singlemolecule switch is ~ 10-19 J
Real Materials and their Processing
 Particles, lines and rigid bodies vs. real materials:
each material has its own characteristics
 Material-specific properties determine the function
and processing details of a material
 Comprehensive knowledge of materials processing
requires ~ 5-10 years of learning and practice:
Interdisciplinary between physics, chemistry,
electronics, materials science, economics…
 Advantage and role of physicist
Graduate Attributes
(Southern Cross University, Australia)
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Intellectual rigour
Creativity
Ethical understanding, sensitivity, commitment
Command an area of knowledge
Lifelong learning --- ability of independent & selfdirected learning
Effective communication and social skills
Cultural awareness
(From: S. Yeo, CDTLink, NUS, July 2004)
Final Exam
 24 Nov, two hours
 One A4 cheat sheet allowed, both sides
 What will be in the exam?
Basic principle, processes…, mainly after
Chapter 5