Transcript Resource-Efficient Programmable Trigger Units for Post

Reporter :PCLee 2012.12.17

The decisions on when to acquire debug data during
post-silicon validation are determined by trigger events
that are programmed into on-chip trigger units. In this
paper, we investigate how to design trigger units that
are both resource-efficient and runtime programmable.
To achieve these two goals, we introduce new
architectural features, as well as an algorithm for
automatically mapping trigger events onto trigger units.
[2, 3] scan-based
post silicon
validation
Provide real-time
observability
[4] on-chip trace
buffer
Improve the control on trace buffer,
and reduce the amount of data
[6] on-chip
programmable
trigger engines
[5] embedded
breakpoint units
Achieve resource –efficient and
revert the false decision in real time
This paper
 What’s

the problem:
For a chip, we can only configure their register. How
many trigger units we need?
 How to reduce the number of trigger units to save
area?
 How to recover our data from false trigger?

Trigger unit

TS = xx10 => output = 1 (x is don’t care)


event_reg = 0010

mask = 0011
2 ≤ TS ≤ 5 => ABCD = (0010, 0011, 0100, 0101)
AB/ 00
CD
01
00
1
=> TS = A’BC’ + A’B’C
01
1
=> mask1 = 1110
mask2 = 1110
11
1
10
1
11
10
event_reg1 = 0100
event_reg2 = 0010

2 ≤ TS ≤ 5 and TS = 10 => ABCD = (0010, 0011, 0100, 0101,
1010)
1.
2.
Add one more quality unit.
Under trigger
AB/ 00
CD
01
00
1
01
11
10
=> mask1 = 1110 event_reg1 = 0100
mask2 = 1110 event_reg2 = 0010
1
11
1
10
1
=> TS = A’BC’ + A’B’C + B’CD’
mask3 = 0111 event_reg3 = 0010
1
=> We need 3 trigger units to cover all
conditions.
=> If we have k terms, we need k units.

Problem: If we just have 2 trigger units? (If we don’t have
enough trigger units to cover all conditions?)

Under-triggering:



Configure register next time to cover all conditions.
It cannot work on asynchronous peripherals
Over-triggering:
AB/ 00
CD
01
00
1
01
1
11
10
=> TS = A’BC’ + B’C
=> mask1 = 1110
event_reg1 = 0100
mask2 = 0110 event_reg2 = 0010
11
1
F
10
1
1
Off-prime will cause false triggering

Debug flow
1.
2.
3.
4.
5.
Off-primes are computed Off-line.
Configure events to register and off-primes to trace buffer.
When events have been triggered, trace buffer starts trace data. And
event buffers starts to record TS.
Event buffers compare off-sets sequentially.
When it found false-triggering, mark the segment of trace buffer for
further reuse.
Problem:



If the number off-primes is larger than the clock cycles between
consecutive events, analysis data will miss.
Add more buffers will affect the area. So this paper introduce algorithm
for saving the area.
m=2

Purpose:



Prevent early filling of event buffers.
Prevent loss valid trigger events.
Ensure trigger analysis can be done in a low number of clock cycles.
Perform minimization
iterative until gain is highest
Perform minimization
Revert choice
Record off-prime and replace
Perform minimization and return off-primes and
value of mask and event register/

The obvious different is if we use event sequencing or not.

Because event buffer will have groups in event sequencing.

Conclusion of this paper



This paper map the user-programmable trigger conditions
onto a lower number.
The proposed algorithm found off-prime and than revert the
false triggering.
My conclusion


How does this paper know the clock cycles between two
events.
This paper present resource-efficient algorithm and
architecture. I can reference this paper for my reconfigurable
hardware.