HIGH PERFORMANCE CMOS REALIZATION OF THE THIRD GENERATION

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Transcript HIGH PERFORMANCE CMOS REALIZATION OF THE THIRD GENERATION

HIGH PERFORMANCE CMOS
REALIZATION OF THE THIRD
GENERATION CURRENT
CONVEYOR (CCIII)
S. Minaei1, M. Yıldız1,
H. Kuntman2, S. Türköz2
1. Doğuş University, Department of Electronics and Communication Engineering,
81010, Acıbadem, Kadıköy, Istanbul, TURKEY.
2. Istanbul Technical University, Faculty of Electrical and Electronics Engineering,
Department of Electronics and Communication Engineering,
80626, Maslak, Istanbul .
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ABSTRACT
In this paper a new CMOS high
performance dual-output realization of the
third generation current conveyor (CCIII)
is presented. The proposed CCIII provides
good linearity, high output impedance at
port Z and excellent input/output current
gain. PSPICE simulation results using
MIETEC 1.2 CMOS process model are
included to verify the expected values.
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1. INTRODUCTION
● Current conveyors and unity-gain
amplifiers are widely used by analog
designers:
● Signal processing
● Active network synthesis
● Recently third generation of this block has also
been proposed by Fabre et al [3].
● The third generation current conveyors
(CCIIIs) can be considered as a current
controlled current source with a unity
gain.
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• High performance current mirrors are
required in the structure of the CCIII to
provide:
– Good dynamic swing
– High output resistance which enables
cascadability.
• The main features of the CCIII are:
– Low gain errors (high accuracy)
– High linearity
– Wide frequency response.
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• In this paper, we propose a novel
•
implementation of dual-output CCIII based on
an improved active-feedback cascode current
mirrors (IAFCCM).
The proposed CCIII is compared with the
conventional CCIII proposed in [3] and cascode
CCIII. It provides:
– High output resistance at port Z and
– High dynamic swing.
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2. CIRCUIT DESCRIPTION
• The port relations of an ideal dual-output
CCIII is shown in Figure 1.
 I Y  0  1
V  1 0
 X
 I Z   0 1
  
 I Z   0  1
0 0  VY 
0 0  I X 
0 0 VZ  
 
0 0 VZ  
Figure 1. Electrical symbol of the CCIII
• The positive and negative signs define a
positive and negative current-controlled
conveyor.
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• The conventional third generation current
conveyor is shown in Figure 2a [3].
• The conventional
third generation
current conveyor is
shown in Figure 2 [3].
Figure 2a. Conventional third generation
current conveyor (CCIII).
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Figure 2b. Conventional (CCIII) core
view from X and Y ports.
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• A major advantage of this CCIII is its simple
•
•
structure.
An important drawback of the conventional
CCIII is the finite output resistance (Roz).
The Z+ output resistance of this current
conveyor is,
– Roz+ = (rds21)//(rds22)
–
where rdsi denotes the output resistance of the i’th transistor
respectively.
• Third generation current conveyor using cascode
•
current mirrors is shown in figure 3.
The cascode current mirrors between ports X-Y,
X-Z+, and Y-Z- as shown in Figure 3.
– Increase the accuracy of the current transformations in the
CCIII.
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Figure 3. Third generation current conveyor using cascode current mirrors.
• The Z+ output resistance of the cascode CCIII is
calculated as:
 Roz+  (rds29 rds25 gm29)// (rds30rds26 gm30)
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• To increase the output resistance we propose a
•
•
new CCIII based on using improved activefeedback cascode current mirror (IAFCCM) [10]
in the output stages of the conveyor.
The proposed CCIII is shown in Figure 4.
The output resistance of the proposed CCIII is
calculated as:
 Roz+ = gm32 gm30 rds31 rds32 (rds30// rds28)
//gm40 gm38 rds39 rds40 (rds38// rds34)
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Figure 4. The proposed third generation current conveyor CCIII.
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3. SIMULATION RESULTS AND COMPARISON
• The performance of the proposed CCIII shown in Figure
•
•
•
•
4, is verified by SPICE simulation program using,
MIETEC 1.2m CMOS process model parameters
PMOS transistor dimensions are W/L=720µm/2.4µm
and,
NMOS transistor dimensions are W/L=240µm/2.4µm.
The voltage supply used for the proposed CCIII is 2.5V.
 The main performances of the conventional, cascode and proposed
CCIII are summarized in Table 1.
 From Table 1 it can be seen that the performance of the proposed CCIII
is improved in terms of,
• Linearity
• gain accuracy
• output resistance.
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Figure 5. The relation between
VX-VY for the proposed CCIII
Figure 7.The frequency response
of the VX/VY
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Figure 6. The relation between IX-IY-IZ
for the proposed CCIII.
Figure 8. The frequency response
of the IZ+/IX and IZ-/IX
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Table 1. Circuit performances.
Parameter
Conventional CCIII
Cascode CCIII
Proposed CCIII
Dynamic swing VX-VY
-0.55V0.6V
-1.8V1.9V
-22.1
Dynamic swing IZ+-IX
-0.8mA0.8mA
-0.65mA0.7mA
-1mA1mA
Dynamic swing IZ--IX
-1mA1mA
-0.4mA0.70mA
-0.85mA0.85mA
VX /VY accuracy
0.954
0.98
0.987
IZ+ /IX accuracy
0.98
0.98
0.998
IZ- /IX accuracy
0.975
0.98
0.998
VX /VY f-3dB
306MHz
87MHz
89MHz
IZ+ /IX f-3dB
106MHz
15MHz
24.7MHz
IZ- /IX f-3dB
83MHz
10.2MHz
14.7MHz
Output resistance (RZ+)
18.2k
18M
5.59 G
Output resistance (RZ-)
18.2k
17.9M
6.73 G
Offset
15mV
0.145mV
0.1mV
Settling time (0.1
percent)
100ns
51ns
17ns
Power dissipation
0.88mW
1.37mW
3.38mW
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4. CONCLUSION
• The proposed circuit uses improved active•
feedback cascode current mirrors (IAFCCM),
which increases output resistance at port-Z.
The proposed circuit is compared with the
conventional and cascode CCIIIs. The simulation
results confirm high performance of the circuits
in terms of
– Linearity
– Voltage gain accuracy
– Current gain accuracy..
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5. REFERENCES
•
•
•
•
•
•
•
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•
•
Sedra A., Smith K.: ‘A Second-generation current conveyor and its applications’,
IEEE Trans. On Circuit Theory, 1970, 17, pp.132-133.
Sedra A., Roberts G.: ‘The current conveyor: history, progress and new results’,
IEE Proceeding Part G , 1990, 137, pp. 78-87.
Fabre A.: ‘Third generation current conveyor: a new helpful active element’,
Electronics Letters, 1995, 31, pp.338-339.
Chow H.-C., Feng W.-S., ‘New symmetrical buffer design for VLSI application’,
International Journal of Electronics., 2001, 88, pp.779-797.
Wang H.-Y., Lee C.-T.: ‘Systematic synthesis of R-L and C-D immittances using
single CCIII’, International Journal of Electronics, (2000), 87, pp.293-301.
Horng J.-W., Weng R.-M., Lee M.-H., Chang C.-W.: ‘Universal active current filter
using two multiple current output OTAs and one CCIII’, International Journal of
Electronics., 2000, 87, pp. 241-247.
Mahmoud S.A., Soliman A.M., ‘Novel MOS-C oscillators using the current feedback
op-amp’, International. Journal of Electronics, 2000, 87, pp. 269-280.
Abuelma’atti M. T., Alzaher H.A.: ‘Multi-function active-only current-mode filter
with three inputs and one output’, International Journal of Electronics, 1998, 85,
pp. 431-435.
Kuntman H., Çiçekoğlu O, Özoğuz S. ,: ‘A modified third generation current
conveyor, its characteristic and applications’, Frequenz, 2002, 56, pp. 47-54.
Zeki A., Kuntman H.: ‘Accurate and high output impedance current mirror suitable
for CMOS current output stages’, Electronics Letters, 1997, 33, pp. 1042-1043.
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