Transcript CSU-CHILL Radar

CSU-CHILL Radar
October 12, 2009
Outline
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Brief history
Overall Architecture
Radar Hardware
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Radar Software
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Transmitter/timing generator
Microwave hardware (Frequency chain, front-end)
Antenna
Digital receiver
Signal Processor
The “Virtual CHILL” - VCHILL
Future Plans
10/12/2009
Brief History of the Radar
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Constructed in 1970 at the University of Chicago and the
Illinois State Water Survey
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Directed by Dr. Eugene Mueller
Originally a single-polarization S-band system, derived from FPS-18
Made a National Science Foundation facility in 1985
Moved to Colorado State University in 1990
Converted to a dual-polarization system with a single
transmitter in 1981
Second transmitter added in 1995
Signal processor upgraded to “CDP” in 2005-6
Dual-offset antenna system installed in 2008
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CSU-CHILL Radar Architecture
Antenna
Radome
Dual
Receivers
Antenna
Servos
Signal
Processor
Transmit
Controller
Sync
Dual
Transmitters
Radar Trailer
Network
Digitizer,
Filtering
Storage
Processor
Mass
Storage
Local
Display,
Control
Remote
Display,
Control
Gateway
Angle
System
Control
Internet
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Transmitter/timing generator
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Synthesizes arbitrary,
independent waveforms for
CHILL’s dual transmitters
Agile FPGA-based timing
generator
Used to generate a wide
variety of transmitter
waveforms
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Memory
Processing
FPGA
Digital
Upconverters
Intra-pulse coded
Inter-pulse phase coded
Differential coding on each
polarization channel
0.2 degree pulse-to-pulse phase
setting accuracy
50 MHz output frequency
Transmitter and Timing Waveform
generator board
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Transmitter/timing generator (cont’d)
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Rectangular pulse
produces frequencydomain sidelobes
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Increases spectral
occupancy
Wider radar bandwidth
makes it harder to predict
radar behavior
Digitally synthesized
Gaussian pulse limits
spectral sidelobes
Gaussian-weighted
Pulse
Rectangular Pulse
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Transmitter/timing generator (cont’d)
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Complex waveforms are
also possible
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Linear FM
Inter-pulse phase-coded
signals
Staggered PRT
Block-staggered PRT
Unique waveforms
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V-H-VH polarization
Independently phase-coded
V,H channels
Linear FM waveform
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Microwave hardware
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Convert 50 MHz IF waveform to RF, at 2725 MHz
Generate drive power for Klystron
Amplify very weak return signals at 2725 MHz
Convert received signals to IF at 50 MHz for digitization
All signals referred to GPS for time-stability
GPS Ref
STALO
IF Filter
RF Filter
IPA
Klystron
Digital Upconverter
Calibration
Hardware
Triggers, Clock
LNA
Digital Receiver
Limiter
To Antenna
Only one channel shown…
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Microwave
hardware (cont’d)
Existing transmit chain, has
been in use at CHILL since
2006
“Needs some work”
10/12/2009
RF Filter
Fast Switch
IF Filters
Mixer
Microwave
hardware (cont’d)
Updated frequency chain
sub-plate
Contains a single channel
Rx Digital Step
Attenuator
Tx Digital Step
Attenuator
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Monitoring
board
Power
Supply
Microwave
hardware (cont’d)
Picture shows the
frequency chain subplates
assembled, with STALO, LO
distribution, power supplies,
monitoring subsystem
Enclosure only partially
complete
STALO synthesizer
LO distribution
T/R Subplates
for V, H channels
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IPAs
Power
Supply
Microwave
hardware (cont’d)
Initial power amplifier
subsystem for Klystrons
Generates up to 40W
pulsed RF power
Needs an enclosure
Monitoring
board
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LNAs
Microwave
hardware (cont’d)
Cal Switches
Front End
Includes LNAs, mixers, LO
distribution and monitoring
Includes calibration
switches
RF Filters
Mixers
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CSU-CHILL Antenna
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Dual-offset Gregorian antenna
High surface accuracy
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Main reflector
Main: 0.012 in RMS
Sub: 0.002 in RMS
Symmetric OMT feed horn
Sidelobe levels better than 50
dB
On-axis cross-polar isolation
better than 50 dB
System LDR limit of -41 dB
Median LDR in light rain of -38
dB
Will be upgraded with a dualfrequency horn
Feed horn
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Subreflector
CSU-CHILL Antenna
10/12/2009
CSU-CHILL
Antenna (cont’d)
Main reflector assembly
Splits apart into three
pieces for transportability
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CSU-CHILL
Antenna (cont’d)
Adding the remaining panels
of the main reflector
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CSU-CHILL
Antenna (cont’d)
Installing the feed boom
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CSU-CHILL
Antenna (cont’d)
Attaching the main reflector
and feed boom to the
pedestal
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CSU-CHILL
Antenna (cont’d)
Adding photogrammetry
patches to the main and
subreflectors
Photogrammetry
establishes the surface
accuracy and alignment of
the main- and sub-reflectors
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CSU-CHILL
Antenna (cont’d)
Performing
photogrammetry
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CSU-CHILL
Antenna (cont’d)
Installing the radome, in
deflated stage
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CSU-CHILL
Antenna (cont’d)
Pulling the radome edge
over the tie-down rings
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CSU-CHILL
Antenna (cont’d)
Inflating the radome
Inflation Blower
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CSU-CHILL
Antenna (cont’d)
Radome inflation completed
10/12/2009
Digital Receiver
Digital Receiver FPGA board – ICS554. Processing FPGA performs digital down-conversion, filtering and tagging
of data with time, antenna position information and transmitter polarization state.
High-speed
analog to digital
converters
Processing FPGA
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Digital Receiver – IF Sampling Process
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The ADCs on the digital receiver sample the 50 MHz IF at 40 MHz: sub-Nyquist
sampling
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This implicitly performs a downconversion from 50 MHz to 10 MHz
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Anti-alias filters prevent noise at 30, 70 MHz from mixing down
Digital
Filter
Wanted
Signal
fs/2
Aliased
Signal
Anti-alias
Filter
3fs/2
fs
Residual
Noise
0
Wideband
Noise
10
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30
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70
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Digital Receiver (cont’d)
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Digital receiver filtering process is accelerated by the
hardware implementation
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Performs 9 billion 16-bit multiplications per second
Received data is handed off to host PC through PCI bus
Host PC serves out time-series (I/Q) data to multiple
clients for further processing
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Signal processor
Real-time debugging A-scope/spectrum display
Time-series archiving
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Signal Processor – Architecture
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CSU-CHILL’s signal
IF Signals (H,V)
processor uses generalpurpose PC hardware to
Triggers
compute meteorological
products from the DRS data
Software agents running on
different nodes provide the
functionality of the signal
processor
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All nodes communicate by
Ethernet
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Any of these nodes may be
located physically distant
from the radar, as long as
network connectivity is
available
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The signal processor
implementation is designed
to be easily expandable
IF Signals (H,V)
Triggers
Signal Gen,
Pwr Meters
Digital
Modulator
Transmit
Control
Server
Digital Transmitter
Digital
Receiver
FPGA
Acquisition
Server
Instrumentation Server
Acquisition Node
Compute Thread
Compute Thread
Product
Calculation
Server
Processing Node
External
Network
DRS
Archive
Server
Product
Disk
Archive
Array
Server
Data
Replay
Server
Archiver Node
System
Controller
Radar
Display
Operator’s Node
Gateway
Radar
Display
Gateway Node
Display Node
Gigabit Ethernet
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Signal Processor –
Product Calculation Server
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Covariance estimates are made using either pulse-pair processing (PPP) or spectral
(FFT) processing
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PPP mode uses a selectable IIR clutter filter
FFT mode uses an adaptive spectral clipper which estimates the noise floor and
clutter power, then interpolates over the clipped spectral points
• Variety of processing modes
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Various polarization diversity
modes
Indexed beam mode
Long integration mode
Phase coding mode
Block-PRF mode
Oversample-and-average mode
All modes are dynamically
selectable from system controller
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Signal Processor Applications –
LDR from Simultaneous Mode
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Linear Depolarization Ratio (LDR) is a measure of how the medium within the radar
resolution volume depolarizes the transmitted signal
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Resolution volume containing uniform particle distribution is characterized by low LDR,
higher LDR indicates mixed precipitation
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Measured in alternating transmit mode by radiating on one polarization channel, while
measuring the return on the other channel
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Simultaneous transmit mode normally cannot measure LDR due to co-polar return signal
mixing with the weak cross-polar signal
H Port
PH
Depolarizing
Medium
LDR=PV/PH
PV
V Port
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Signal Processor Applications –
LDR from Simultaneous Mode
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In simultaneous mode, orthogonal inter-pulse phase codes ψh and ψv are applied to each
polarization channel (indicated by color in the diagram below)
The received signals are given below (k indicates pulse sequence index)
j  k 
j  k 
j  k 
j  k 
S rh  k   V hh  k e
 V hv  k e
S rv  k   V vv  k e
 V vh  k e
The signals are decoded by multiplying with the conjugate of the codes ψh and ψv, giving
j  k 
j  k 
S v  k   V vv  k   V vh  k e
S h  k   V hh  k   V hv  k e
The codes φh=ψh-ψv and φv=ψh+ψv are chosen for their spectral characteristics, in this case,
orthogonal Walsh codes are used
The Walsh code has the property of shifting the cross-polar signal (Vhv or Vvh) by π in the
spectral domain, permitting recovery of both co- and cross-polar signals
h
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h
v
h
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H Port
PHV
ψv coded
PHH
PVV
PVH
LDR=PHV/PVV
=PVH/PHH
Depolarizing
Medium
ψh coded
V Port
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Applications – LDR from Simultaneous
Mode
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To verify the performance of this algorithm, DRS data was collected using the radar on May
29, 2007 during a stratiform rain event containing a prominent bright-band
The radar performed RHI scans first in alternating mode to collect truth data, then in the
coded simultaneous mode. They show good agreement, as shown below
The ability of CHILL to independently phase-code each channel, as well as the high phasesetting accuracy of the digital modulator provide this new capability
Bright Band
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Signal Processor – “Virtual CHILL”
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The “Virtual CHILL”
initiative involves making
the radar available over
the Internet to multiple
locations
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Real-time time-series and
moments data available
remotely
Remote control over all
aspects of radar operation
One aspect is the “Java
VCHILL” radar data
browser
Radar Controller/
Signal Processor/
Storage
Tx. Waveform
Internet
Rx. Signal
Radar Hardware
Remote Client
Remote Clients
Remote Processor
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Future Plans
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Dual-frequency horn
Improved Zdr calibration
methodology
Fully automated operation
Integration with S-Pol to
form the Front-range
Observational Network
Testbed
Improved transmitter
(TWTA/solid-state)
10/12/2009
Thank You
10/12/2009