Transcript Chapter 3 slides 2: key notes ppt

ECE 431 Digital Circuit Design
Chapter 3 MOS Transistor (MOSFET)
(slides 2: key Notes)
Lecture given by Qiliang Li
1
Introduction
• Metal Oxide Semiconductor Field Effect
Transistor (MOSFET) is the fundamental
building block for modern digital integrated
circuit and analog circuit.
MOS structure
I-V Characteristics of MOSFET
MOSFET scaling and short-channel effect
MOSFET capacitance
2
3.1-3.3 MOS structure
3
Energy band diagrams of the
components of MOS structure
qVFB
q  MS  E Fm  E Fp
q  S  q   ( E C  E Fp )
V FB   M   S
Flat-band voltage
4
Energy band diagram of
a combined MOS structure
5
Example 1 for MOS structure
The electron affinity of silicon is 4.15eV
For a p-Si: q  Fp  0 . 2 eV ,
gate metal is Al: q  M  4 . 1eV , what is VFB?
An: q  S  4 . 15 eV  0 . 75 eV  4 . 9 eV
q  M  q  S  4 . 1eV  4 . 9 eV   0 . 8 eV
V FB   M   S   0 . 8V
4.1eV
M
4.15eV
0.55eV
VFB
0.2eV
Al
Si
6
Ec
Ei
EFp
Ev
MOS structure: Inversion
7
MOSFET structure
8
MOSFET with Bias
9
Start of Strong Inversion. MOSFET starts to turn on.
Threshold Voltage
V T 0   GC  2  F 
QB0
C ox

Q ox
Body-effect coefficient
C ox
VT  VT 0    ( |  2 F  V SB | 
 
| 2 F | )
2 q  N A   Si
C ox
10
Depletion region charge at VSB = 0
Q B 0   2  q  N A   Si  | 2 F |
QB0 
2  q  N D   Si  | 2  F |
for p-Si Negative b/c hole is depleted
for n-Si Positive b/c electron is depleted
Oxide fixed charge is positive Qox > 0
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Example 2
Find VT0 and VT
N-channel MOSFET
Substrate
Na=1E16 cm-3
Poly-Si gate
Nd=2E20 cm-3
Tox=50 nm
Oxide interface fixed
charge density
Nox=4E10 cm-3
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13
3.4 MOSFET I-V Characteristics
Q I ( y )   C ox  [V GS  V C ( y )  VT 0 ]
Why it is negative?
n channel
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Resistance of tiny part of the channel dy :
dR  
Voltage drop across dy : dV  I  dR  
C
D
W  n  QI ( y)
ID
W  n  QI ( y)
V DS
L
I
dy
D
 dy   W   n 
0
V DS
Q
I
( y )  dV C W   n 
0
ID 
 (V
GS
 V C  V T 0 )  dV C
0
 n  C ox W

2
 dy
L
 [ 2  (V GS  V T 0 )V DS  V DS ]
2
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Example 3
k   n  C ox 
ID 
k
2
W
L
 [ 2  (V GS  V T 0 )V DS  V DS ]
2
Saturation? Find the maximum
I D
 V DS
I D
 V DS
0
 k  [ 2 (V GS  V T 0 )  2V DS ]
V DSat  V GS  VT 0
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Channel length modulation effect
Channel length modulation effect:
The effective channel length during
saturation is significantly shorter
than before saturation.
L  L  L
'
1
L

1
L  L

1
(1 
L

1
L
L
)
L
(1   V DS )
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Example 4
from Eq 3.23
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3.5 MOSFET Scaling and Small-Geometry Effects
Full Scaling (Constant-Field Scaling)
Quantity
Before Scaling
Full Scaling
Channel Length
L
1/S
Channel Width
W
1/S
Gate oxide thickness
tox
1/S
Junction depth
xj
1/S
Power supply voltage
VDD
1/S
Threshold voltage
VT0
1/S
Doping densities
NA and ND
S
Oxide capacitance
Cox
S
Drain current
ID
1/S
Power dissipation
P
1/S2
Power density
P/area
1
Capacitance ?
Cox W L -> 1/S
Time delay tdelay
CV
I DD
Power = IDD VDD
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Short Channel Effects
VT0 decreases
Why?
How much?
Mobility degradation
Oxide breakdown because
of hot carrier effect
V T 0 ( short  channel
 VT 0 
1
C ox
)
 VT 0   VT 0
2 q  Si N A | 2 F | 
xj
2L
 [( 1 
2 x dS
xj
 1)  ( 1 
2 x dD
xj
 1)]
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Example 5
22
Example 5 continue…
VT decreases significantly
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3.6: MOSFET Capacitance
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Oxide Capacitance
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Junction Capacitance
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