Transcript Slide 1

Quality Design
for
Valued Engineer
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PowerESIM Features
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PowerESIM Features
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PowerESIM Features
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PowerESIM Features
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Agenda
•1 session - CBA concept & Loss charcteristic
•2 session - General usage of poweresim
•3 session - Loop analysis and MTBF
•4 session - Xformer, thermal analysis
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CBA Concept
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What design engineer is doing
R1
Vin
Vo
R2
Given
Given
Given
Vo=0.5*Vin
Vo=0.5*Vin
Vo=0.5*Vin
Rin=10
Rin=10
Pin=1@Vin=100
Engineer Choice
Engineer Choice
Engineer Choice
1) R1=1, R2=1
1) R1=5, R2=5
1) R1=?, R2=?
2) R1=10, R2=10
3) R1=20, R2=20
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Either less or more
 A1 B1 C1  X   k1 

   
 A2 B 2 C 2  Y    k 2 
 ?
?
?  Z   ? 

No. of Equations
<
No. of Variables
 A1 B1 C1  X   k1 

   
 A2 B 2 C 2  Y    k 2 
 A3 B3 C 3  Z   k 3 

   
No. of Equations
=
No. of Variables
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 A1 B1 ?  X   k1 

   
 A2 B 2 ?  Y    k 2 
 A3 B3 ?  ?   k 3 

   
No. of Equations
>
No. of Variables
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Making up equations
T1
Vi
Do
Co
Np
Ns
M1
Vi=100
Eqn 1
Vo=12
Eqn 2
Vo=Vi*D*Ns / (1-D)*Np
Eqn 3
Np=?
Eqn 4
Ns=?
Eqn 5
Co=?
Eqn6
Vds_max_M1=?
Eqn7
Ids_max_M1=?
Eqn8
IF_max_Do=?
Eqn9
VR_max_Do=?
Eqn10
Core_T1=?
Eqn11
Wire_Np=?
Eqn12
Wire_Ns=?
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Eqn13
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Who is going to solve this?
Vi=100
kth make up combination
Eqn 1
Vo=12
Eqn 2
Vo=Vi*D*Ns / (1-D)*Np
Eqn 3
Vi+Vo*Np/Ns=0.8Vds_max
Eqn 4
Vo=Ns*0.3*fs/(1-D)
Eqn 5
0.5*Vo_ripple=Q/Co
Eqn6
Vds_max_M1=lowerest cost in stock
Eqn7
Ids_max_M1=lowerest cost in stock
Eqn8
IF_max_Do=2*Io
Eqn9
VR_max_Do=1.2*(Vi*Ns/Np+Vo)
Eqn10
Core_T1=recommended table from ferrite manufacturer
Eqn11
Wire_Np=fully filled
Eqn12
Wire_Ns=fully filled
Eqn13
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Can it be solved
Vi=100
kth make up combination
Eqn 1
Vo=12
Eqn 2
Vo=Vi*D*Ns / (1-D)*Np
Eqn 3
Vi+Vo*Np/Ns=0.8Vds_max
Eqn 4
Vo=Ns*0.3*fs/(1-D)
Eqn 5
0.5*Vo_ripple=Q/Co
Eqn6
Vds_max_M1=lowerest cost in stock
Eqn7
Ids_max_M1=lowerest cost in stock
Eqn8
IF_max_Do=2*Io
Eqn9
VR_max_Do=1.2*(Vi*Ns/Np+Vo)
Eqn10
Core_T1=recommended table from ferrite manufacturer
Eqn11
Wire_Np=fully filled
Eqn12
Wire_Ns=fully filled
Eqn13
Solved
Performance
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Solving time to time
Specification
Expert Knowledge
Equations solving
Expert Knowledge
Component selection
Expert Knowledge
Equations solving
Component
Traditional recursive iteration design flow
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From serial to parallel
Specification tier
Component tier
Component tier
Result
Result
Component tier
…
Result
Decision by Specification
Proposed CBA Component Based Architecture
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SPICE vs CBA
CBA asking for
SPICE asking for
K
Vi
Do
Co
Np
Rp
Rp_ac
Rm
M1
Ns
Rs
Rs_ac
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Select, make and decise
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Result orientated – Loss analysis
Efficiency (%)
Conversion Efficiency
80
70
60
50
40
30
20
10
0
Measurement
Simulation
70
120
170
220
270
Input voltage RMS (V)
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Result orientated – Thermal analysis
Measured
Simulated
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Result orientated – Waveform analysis
Measured
Simulated
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Result orientated – Loop Stability & Transient
Measured
200
200
150
100
50
P hasei
0
50
100
150
 200 200
1
1
10
1 10
100
3
fi
1 10
4
1 10
5
310
Simulated
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4
Result orientated – Input Current Harmonic
Measured
0.4
Measured
Current RMS (A)
0.3
Class D Limits
0.2
0.1
0
3
5
7
9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
-0.1
Harmonic number
Simulated
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Result orientated – MTBF & Life Time
Measured
Will be reported at
1/Mar/2100
Simulated
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Result orientated – DVT report
Measured
Simulated
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Build a Xformer
Measured
Lk=2.787uH
Simulated
Lk=2.982uH
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Add your own component to all analytical tools
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Loss Characteristics
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MOSFET Loss Characteristics
Gate drive
Drain voltage
Drain current
t0
t1
t2
t3
t4
t0-t1 drain current catch up with load current
t1-t2 drain voltage falling period
t2-t3 MOSFET fully turn on
t3-t4 drain voltage rising period with miller effect
t4-t5 drain current falling period
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Diode Loss Characteristics
Ns Voltage
Diode voltage
Diode current
t0
t1 t2
t3
t4
t5
t0-t1 diode in forward bias
t1-t2 forward current drop to zero
t2-t3 from zero current to peak reverse current (ta)
t3-t4 reverse current droping period
t4-t5 leakage current with reverse voltage
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Xformer/Inductor Loss Characteristics
Rdc Rskin
Ipri
Rskin Rdc
Ise
Imag
c
Rproximity
Rfringe
•
•
•
•
•
Rcore
Rdc – wire dc losses
Rskin – wire skin effect losses
Rproximity – wire proximity effect losses
Rfringe – fringing flux losses
Rcore – core losses
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Core Loss Characteristics – frequency and flux
Loss
Loss
[email protected]
Loss=3W@200kHz
Loss=1W@100kHz
[email protected]
B
Freq.
• Every Engineer know, but . . .
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Core Loss Characteristics – dc bias and duty cycle
Loss
Loss
Idc_bias
•
•
•
Data sheet Loss is
Idc_bias =0
Large loss @ Idc_bias
>Bs
Somewhere in between
must exist rising slope
@B
D
Idc_bias
D
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•
•
•
Higher Freq. higher
loss
Higher flux change
rate higher loss
Smaller D means
higher flux change rate
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Capacitor Loss Characteristics
Irms
ESR
ESR
ESR
ESR=3@-25oC
ESR=2@100Hz
ESR=1@25oC
Temp.
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ESR=1@100kHz
Freq.
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Loop Analysis
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First idea - Margins
•
ωc
M(db)
ω
0
GM
•

•
-180o
m
ω
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Phase margin m is the
distance of the phase angle
curve above - 180o at the
cross over frequency ωc,
where the magnitude plot
crosses the 0db line.
Gain Margin GM in db is the
distance of the magnitude
plot below the 0 db axis at the
frequency where the phase 
is -180o.
The Gain Margin and Phase
Margin ensure stable
operation
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Graphic averaging concept
D
Vin
D
Averaged
Thevin
Rquivalent
Vin
Vin*D
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From non-linear to Laplace
sL
Vin*D(s)
1/sC
Vo(s)
Vo( s )
Vin
 2
D( s) s  L  C  1
Vo(s)
Vo( s )
D
 2
Vin( s ) s  L  C  1
sL
Vin(s)*D
1/sC
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More general approach – Inject-Absorbed-Current method
ii
vi
ic
Switching cell
Zp
vo
x
Variables concerned are the average values over one
switching cycle.
Absorbed current ii:
ii = ii(x,vo,vi)
(1)
Injected current ic:
ic= ic(x,vo,vi)
(2)
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Assuming it is a linear system
• In differential form
• In Laplace form
dii 
ii
i
i
dx  i dvo  i dvi
x
vo
vi
ii ( s)  Ai ( s) x( s)  Bi ( s)vo ( s)  Ci ( s)vi ( s)
dic 
ic
i
i
dx  c dvo  c dvi
x
vo
vi
ic (s)  Ac (s) x( s)  Bc ( s)vo (s)  Cc (s)vi ( s)
dvo  Zp  dic
vo ( s)  ic ( s)  Zp
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General graphical electrical model
ii(s)
vi(s)
Bi
ic(s)
Cc
Yi(s)
Zo(s)
ia(s) A
i
Ac
Zp(s)
vo(s)
iout(s)
X(s)
Yi ( s)  Ci ( s)
Output characteristic impedance
1
Z o (s)  
Bc ( s )
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From non-linear to Laplace again





di c
i c( s )
i c( s )
1
s
 Vi

1
D
1D
T
1
T
  dd   dv o   dv i d t  V i T
 dd 
 dv o   1   D  D  dv i
L
L
L
2 L
2  L
 L


 Vi

 L
 d( s ) 
V i T
L
1
L
 v o( s ) 
 ( 1  D) 

Ac(s)
D

1D

L
 v ( s )   V i T
L i
 d( s ) 
T
2 L
 v o( s )   1 

T
 D  D  v i( s )
2  L
1
  d(s )   T  1   v (s )  D T   1  D   1   v (s )


 o



s  T
L 
2  s  T i
 2 L s  L 
1
Bc(s)
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Cc(s)
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Bode plot – Vo(s) / D(s)
100
20 log vo_d_con( j  2   f )

50
0
50
10
1 10
100
1 10
3
4
f
100
180

0
 arg( vo_d_con( j  2   f ) )
100
200
10
1 10
3
100
1 10
4
f
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Current mode control
iL(s)
M1
L
1
Vi
d
D1
X = iL
2
Vo
b
vo
=
Loop 1
PWM
+
K
H(s)
1
Loop gainof Loop 2  H (s) Kb
sC
b
Loop 2
H(s)
Compensation network H(s) is
to compensation a single pole,
not a two pole LC network
The inductor L becomes a controlled current source
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Current mode control graphical model
d(s )
Fm
 1 R  D T v (s )  1 R  D T v (s )  R i (s )  v (s )  F
2 s L s o
s L
e  m
2 s L s i



2
T s  2 S c  S n

iL(s) Inductor current feedback
Rs
d(s)
Current command
+
Fm
Peak current mode
control digital
processor gain
+
R s  D T s
2 L
ve(s)
R s  D T s
2 L
Vo(s)
Output voltage feedback
Input voltage feedback
Vi(s)
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General graphical electrical model – include peak current mode control
Vi(s)
Cc(s)
Ac(s)
+
+
Bc(s)
iL(s)
+
d(s)
Vo(s)
Zp(s)
Rs
+
Fm
-
+
R s  D T s
ve(s)
R s  D T s
2 L
2 L
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Bode plot – voltage mode vs current mode
100
20 log vo_ve_2( j  2   f )
20 log vo_d_con( j  2   f )

50

0
50
10
1 10
100
1 10
3
4
f
100
180

180

 arg( vo_ve_2( j  2   f ) )
 arg( vo_d_con( j  2   f ) )
0
100
200
10
1 10
3
100
1 10
4
f
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Advanced option – subharmonic instability
By introducing a second order (two pole) transfer function
with resonate frequency at half of the switching frequency
and a damping factor x,
F ( s) 
 
1
 s
1  2 
 0.5 sw
ln 
 ln  
2 1  

 2 
2
  s
  
  0.5 sw



2
 m3  m2 

  

m

m
1 
 3
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More complicated graphical model
Vi(s)
Cc(s)
Ac(s)
+
+
Bc(s)
iL(s)
F(s)
+
d(s)
Zp(s)
Vo(s)
Rs
+
Fm
R s  D T s
+
ve(s)
R s  D T s
2 L
2 L
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Advance vs Ordinary
0
20 log vo_ve_1_f( j  2   f )
20 log vo_ve_1( j  2   f )
Modified by F(s)


50
100
10
100
1 10
1 10
3
1 10
4
1 10
5
6
f
200
180

180

Modified by F(s)
 arg( vo_ve_1_f( j  2   f ) )
0
 arg( vo_ve_1( j  2   f ) )
200
10
100
1 10
1 10
3
4
1 10
5
1 10
6
f
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Advance and More advance
• Continued mode operation and Discontinued mode
operation
• Voltage mode, Peak current mode and Averaged current
mode
• Parasistic effect
• Compensation method
• After all, it should be completed by a
program and once forever!
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Automatic compensation
• After all, you only need a final
compensated design
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References
1. Dynamic Analysis of Switching-Mode DC/DC converters
by Andre’S. Kislovski, Richard Redl, Nathan O. Sokal,
Van Nostrand Reinhold
2. Complex Behavior of Switching Power Converters
by Dr. Chi Kong Tse, CRC Press
3. RIDLEY,R.B.:’A new continuous-time model for current-mode control’ IEEE Trans.
Power Electronics., 1991, 6, (2), pp. 271-280
4. TAN, F.D., and MIDDLEBROOK, R.D.: ‘A unified model for current-
programmed converters’. IEEE Trans. Power Electronics., 1995, 10, (4), PP. 397-408
5. MIDDLEBROOK, R.D., and CUK, S.: ‘A general unified approach to modeling
switching converter power stages’. Proceedings of the IEEE Power Electronics Specialists
conference, PESC’76, 1976, pp. 18-34.
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MTBF
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First thing to know – Failure Rate
• Failure rate λ is defined as
p 
numberof failures
totalunitoperatinghours
• Example
•
500 components are tested, every
time a failure occurs that component is
replaced by a good one. After 1000 hrs,
5 failures have occurred.
5
1
p 
x
105 perhour
500 1000
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Second thing to know – System failure Rate

System failurerate
p
1  2  3  ....  n
k is the predicted failure rate of each component.
(Assuming system fail if either component fail)
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Mean Time Between Failure MTBF
MTBF 
1

p
MTBF of a system
(Assuming system fail if either component fail)
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According to MIL-217
p = bArscQET . . .
Where p is the part failure rate
b is the base failure rate
 is factors modify the base failure rate
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Modify factor – Application factor
A= Application factor
e.g. For MOSFET - 1.5 for linear, 0.7 for switching
MOSFET
A
Condition
Pr< 2
Linear
1.5
Switching
0.7
2≤Pr<5
2
5≤Pr<50
4
50≤Pr<250
8
Pr≥250
10
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Modify factor – Power rating factor
r= Power rating factor
e.g. For transistor – 0.43 for Pr<0.1W
Power Rating W
r
0.1
0.5
1
5
10
50
100
500
0.43
0.77
1
1.8
2.3
4.3
5.5
10
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Modify factor – Voltage stress factor
s= Voltage stress factor
e.g. For transistor – 0.045 for Vs=0
 s  0.045 e
31
. xVs
VCE
Vs 
VCEO
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Modify factor – Quality factor
Q= Quality factor
e.g. For MOSFET – 2.4 for AQL checked
MOSFET
Q
Condition
Bad – Plastic
8
Fair – Lower (Commercial)
5.5
Average – JAN (random check per AQL)
2.4
Good – JANTX (100% test)
1
Very Good – JANTXV (microscope or x ray inspection)
0.7
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Modify factor – Envirnoment factor
Q= Quality factor
e.g. For MOSFET – 1 for Office environment
MIL217_E MOSFET
Condition
Office environment – Ground, Benign,
1
Outdoor environment – Ground, Fixed
6
Automobile environment – Ground, Mobile
9
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Modify factor – Temperature factor
T= Temperature factor
e.g. For transistor – 5.9 @Tj=125oC
1
1

)
T j 273 298
12
10
8
6
4
2
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5
14
5
12
5
0
10
5
1
1.3
1.6
1.9
2.3
2.8
3.3
3.9
4.5
5.2
5.9
6.8
7.7
8.6
9.7
11
85
25
35
45
55
65
75
85
95
105
115
125
135
145
155
165
175
65
Temp C
 T e
Temp Fac
oT
45
o
25
Junction
2114(
Tem p degree C
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Conclusion
• Different part has different definition of x
• No consideration in MTBF will not result in
reliable products.
• Considering reliability during design stage
yeild cost saving.
• Thermal is always a main issue on
reliability
• MTBF is a good index for design quality.
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No single question asked
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Magnetic Component
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Which one is a Xformer?
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All model are the same
i1
i2
i1
sL11
n1
n2
Lk
i2
i1
Lk1
N1 N2
Lk2
i2
sL22
Lm1
L11
I2sM
I1sM
 V1 s    L11

  


V
s
 2  M
 L11

M
M   sI1 s  


L22   sI2 s 
M 

L22 

 L
 V1 s    11

 
V2 s   n2  L11
n
 1

 L11

 n2
 n  L11
 1
n2

 L11 
n1
   sI1 s  

 
L22   sI 2 s 

n2

 L11 
n1


L22 

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
 Lk1  Lm1
 V1 s   

  
V2 s   N 2  Lm
1
 N
 1

 Lk1  Lm1

 N
 2  Lm1
 N
 1


  sI1 s  
2
   sI s 
 N2 
  Lm1   2 
Lk 2  

 N1 

N2
 Lm1
N1



2

N 
Lk 2   2   Lm1 

 N1 

N2
 Lm1
N1
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First issue – leakage inductance
•
•
Leakage inductance is a representation
of leakage flux
Leakage flux is the flux that doesn’t link
through the core, or flux cut through
windings space.
H
Lk 
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uo

Ik

H 2  dv
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Reducing leakage inductance
H
•
By reducing
distance between
two windings
H H
H
•
By reducing No. of
turns
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•
•
Keep total No. of
turns
Interleaved winding
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Magnetizing inductance
T1
T1
Ip
Ip
Do they have the same magnetizing current ?
Do they have the same peak flux level ?
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Outside circuit determine flux level
T1
T1
imag
Bp 
imag
iNp
Lm
 I1
N p  Ae
Ip
Bp 
Lm
 I2
N p  Ae
iNp
Ip
I1
imag
I2 i
mag
iNp
iNp
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Skin effect-little effect
f = 100kHz
AWG#24
Dia=0.51mm
Dskin=0.24mm
Usage=99.7%
f = 300kHz
AWG#24
Dia=0.51mm
Dskin=0.139mm
Usage=79.2%
Dskin 

uo    f
meter
• Skin effect is not a problem
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Proximity losses – losses caused by No. of layers
Pd  2m 12 
x

2

sinhx   sinx 
coshx   cosx 
d
Dskin
• Proximity losses is approximately proportional to the square
of the layers and square root of frequency
• Detail representation can be basically described by the
Dowell formula
• In general, good transformer design would not have many
stacked layer and wire size is properly chosen, hence
proximity loss is not a dominant source
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Fringing flux losses – losses by the diameter of wire

2
f  B  l wire  d wire 4
Pd 
 wire
• Fringing flux losses is proportional frequency
• Fringing flux losses is proportional to square of flux cut
perpendicular to the axis of wire
• Fringing flux losses is proportional to 4th order of the wire
diameter
• In short it is a dominant source of lossed of for a gapped core
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Core losses – hysterisis loss+eddy current loss
B
Bpp
H
Pd  Vol  f  Bpp2
Pd  Vols  Aes  Bpp2  f 2
OR
Pd  Vol f k1  Bppk 2
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Transformer related – Losses, Cross regulation, Spike, etc
• Now all can be done by a click
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References
• LIoyd H. Dixon, Magnetics transformer handbook, Unitrode
• R. Prieto et, Interleaving Techniques in Magnetic components, 1997
IEEE
• Van A. Niemela, Leakage-Impedance Model for Multiple-Winding
Transformers, 2000, IEEE
• Anderson F. Hoke et, An Improved Two-dimension Numberical
Modeling method for E-core Transformers, 2002 IEEE
• Ansgar Brockmeyer, Experimental Evaluation of the Influence of DCPremagnetization on the Properties of Power Electronic Ferrites,
1996 IEEE
• M. Albach et, Calculating Core Losses in Transformers for Arbitary
Magnetizing Currents A comparison of Different Approaches, 1996
IEEE
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