Circuits II ENGG1015 Tutorial
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Transcript Circuits II ENGG1015 Tutorial
ENGG 1203 Tutorial
Combinational Logic (I)
1 Feb
Learning Objectives
Recall Boolean Algebra (SoP/PoS, DeMorgan's Theorem,
grouping, redundant)
Simplify logic expressions
News
Lab, TA office hour
Tutorial: http://www.eee.hku.hk/~culei/ENGG1203.html
Ack.: HKU ELEC1008, Wikimedia Commons
1
Quick quiz
What is the only set of input conditions
that will produce a LOW output for any
OR gate?
•
•
•
•
Any one of the input is LOW
Any one of the input is HIGH
All inputs are LOW
All inputs are HIGH
2
Quick quiz
What logic level should be applied to the
second input of a two-input AND gate if the
logic signal at the first input is to be inhibited
(prevented) from reaching the output?
•
•
•
•
A LOW input will keep the output LOW
A LOW input will keep the output HIGH
A HIGH input will keep the output LOW
A HIGH input will keep the output HIGH
3
Quick quiz
What is the only input combination that
will produce a HIGH at the output of a
five-input AND gate?
•
•
•
•
Any one of the input is LOW
Any one of the input is HIGH
All inputs are LOW
All inputs are HIGH
4
Quick quiz
What is the output expression of the following logiccircuit diagram?
•
•
•
•
x D A BC E
x D A BC E
x D A B C E
x D A BC E
5
Boolean Algebra
Boolean Algebra
A+B=B+A
A + (B + C) = (A + B) + C
A + BC = (A + B) (A + C)
A + AB = A
NOT (NOT (A)) = A
AB = BA
A (BC) = (AB) C
A (B+C) = AB + AC
A (A + B) = A
More questions in Appendix
6
De Morgan’s Theorem
De Morgan's theorem
AB A B A B A B
Bubble pushing via De Morgan's theorem
AND NOT NOT OR
A B A B
NOT OR AND NOT
A B A B
OR NOT NOT AND
A B A B
NOT AND OR NOT
A B A B
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Solution 2
Use DeMorgan's Theorem for simplification
a d b c a d b c a d b c
a b c c d a b c . c d a b c d
a d b c c d a d b c c d a b c d
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Boolean Algebra Simplification
Sum of Products
Find out the “1”s
𝑌 = 𝐴∙𝐵 + 𝐴∙𝐵
Better if less “1”
Products of Sum
Find out the “0”s
𝑌 = 𝐴+𝐵 ∙ 𝐴+𝐵
Better if less “0”
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Boolean Algebra Using SOP and POS
Find an expression for F and F
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Solution
Sum of Products for F
F ABC ABC ABC ABC ABC
Product of Sums for F
FF
ABC ABC ABC
ABC ABC ABC
A B C A B C A B C
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Solution
Sum of Products for F
F ABC ABC ABC
Product of Sums for F
F A B C A B C
A B C A B C
A B C
12
Representing logic operations
Each function can be represented
equivalently in 3 ways:
Truth table – Try every combinations of every
input variables
Boolean logic expression – SOP/POS + Simplify
the expression
Schematics – Construct from Boolean
expressions
13
From logic equations
Boolean expressions
Truth table and logic circuit (AND/OR/NOT)
0
1
0
1
1
14
From logic equations
Boolean expressions
Truth table and logic circuit
(AND/OR/NOT)
15
From truth tables
Derive the Boolean expression
of the output x in terms of the
input
Construct the logic circuit using
AND gates, OR gates, and
INVERTERs.
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Solution
x ABC ABC ABC ABC
Extra redundant
Terms
AC B B AB C C BC A A
ABC ABC ABC ABC ABC ABC
AC AB BC
1. Construct A/B/C
2. Construct not A/B/C
3. Construct AND gates
4. Construct OR gate
1
2
3
4
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From truth tables
Truth table Boolean expressions and logic
circuit
18
From schematics
• Truth table first?
• SOP/POS first?
19
From schematics
XOR
20
Circuit representation of logic equations
Show how x ABC can be implemented with one
two-input NOR and one two-input NAND gate.
(How to convert ABC AB C ?)
We need to apply De Morgan’s Theorem
x ABC AB C AB C
A A
AB A B
21
Circuit representation of digital logic
a) Simplify the circuit shown in the figure using
Boolean algebra.
b) Change each NAND gate in the circuit of the figure
to a NOR gate,
MNQ
and simplify the
circuit using
M NQ
Boolean algebra.
M NQ
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Solution (a)
x MNQ M NQ M NQ
MNQ M NQ M NQ
MNQ M NQ M NQ
Procedure:
1) Obtain the Boolean expression from
the circuit
2) Check if we need NAND/NOR gate
3) Simplify the expression by Boolean
algebra
M N N Q M NQ
M 1 Q M NQ
M MN Q
M N Q
• Less gate (power and resource)
• Shorter “longest path”
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Solution (b)
First, we convert the circuit
M
N
Q
A
M N Q
M N Q
B
C
x
M N Q
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Solution (b)
Then, we simplify the Boolean expression
X M N Q M N Q M N Q
M N Q M N Q M N Q
(DeMorgan's Theorem)
(Expand)
M M N MQ NM 0 NQ QM QN Q M N Q (Group, Group)
MM M N MQ NM N N NQ QM QN QQ M N Q (Simplify)
A B A B
A B A B AA AB BA BB
AA A
AA 0
A A 1
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Solution (b)
...
M M N MQ NM 0 NQ QM Q N Q M N Q
(Group, Group)
M 1 N Q N Q Q N N 1 M N Q (Simplify)
M Q M N Q (Expand)
M M MN MQ QM QN QQ (Simplify)
0 MN Q M M Q N 1 (Simplify)
1 A 1 0 A A
1 A A 0 A 0
MN Q Q MN Q
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Conversion of three representations
Describe the function using Boolean expressions
Draw the truth table and describe the function using
sum of product
27
Solution
x AB B CC
AB B C
Approach 1: Boolean simplification Find TT
Approach 2: Construct TT Find POS
(De Morgan)
AB B C
(XOR expansion)
ABBC BC
(De Morgan)
ABBC BC
(De Morgan)
(expansion)
(grouping,
AB BB BC C B CC expansion)
AB B C B C
ABBC ABC B
ABC
(cancellation)
POS: x ABC
28
Karnaugh map
Draw the table Fill in 0s
and 1s Grouping
Group one/two/four/eight/
sixteen ‘1’(s) only
Use the least number of
groups to group all
numbers
To group as many numbers
as possible in every group
29
Karnaugh map
Yellow: Redundant
𝐴𝐵𝐶 𝐷 + 𝐴𝐵𝐶 𝐷 = 𝐵𝐶 𝐷
𝐴𝐵 𝐶𝐷 + 𝐶𝐷 + 𝐶 𝐷 + 𝐶 𝐷 = 𝐴𝐵
𝐴𝐵 𝐶 𝐷 + 𝐴𝐵 𝐶𝐷 + 𝐴𝐵𝐶 𝐷 + 𝐴𝐵 𝐶𝐷 = A𝐶
F(x) = 𝐵𝐶𝐷 + A𝐶 + 𝐴𝐵
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Examples of Karnaugh maps
31
(Appendix) Questions for Boolean algebra
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Solutions
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(Appendix) Determining output level from
a diagram
34
(Appendix) From logic equations
Draw the circuit diagram to implement the expression
X (A B)(B C)
Draw the circuit diagram that implements the expression
x ABC( A D) using gates having no more than three
inputs.
35
(Appendix) Circuit representation of
digital logic
Construct the given circuit using NAND gates only
Top down approach: ?
Bottom up approach: ?
36
Solution (a)
Top down: Expanding the Boolean expression
By DeMorgan’s Theorems, A A A AA
X ABC ABC ABD
ABC ABC ABD
AABBCC ABBCC AABBD
ABC ABC ABD
37
Solution (b)
Bottom-up: Construct NOT gate, AND gate and OR
gate from NAND gate
i) 1
0
1
0
iii)
ii)
38
Solution (b)
X ABC ABC ABD
A A
(cancelled)
Top-down and Bottom-up: Same number of gate,
same configuration, different approach
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