Transcript Slide 1

Semiconductors Principles
1
Table 2.1 Electrical Classification of
Solid Materials
Materials
Insulators
Semiconductors
Conductors
Resistivity (W-cm)
105 < r < •
10-3 < r < 105
r < 10-3
IIIA
IVA
10.811
5
12.01115
6
14.0067
7
15.9994
8
B
C
N
O
Ca rb o n
Nitro g e n
O xyg e n
26.9815
28.086
14
30.9738
15
32.064
16
Al
Si
P
S
A luminum
Silic o n
Pho sp ho rus
Sulfur
65.37
30
VIA
Bo ro n
13
IIB
VA
69.72
31
72.59
32
74.922
33
78.96
34
Zn
Ga
Ge
As
Se
Zinc
G a llium
Ge rm a nium
A rse nic
Se le nium
112.40
48
114.82
49
118.69
50
121.75
51
127.60
52
Cd
In
Sn
Sb
Te
Ca d mium
Ind ium
Tin
A ntimo ny
Te llurium
200.59
80
204.37
81
207.19
82
208.980
83
(210)
84
Hg
Ti
Pb
Bi
Po
Me rc ury
Tha llium
Le a d
Bismuth
Po lo nium
Table 2.2 - Portion of the Periodic Table Including the Most Important Semiconductor
Elements
Table 2.3 - Semiconductor Materials
Semiconductor
Carbon (Diamond)
Silicon
Germanium
Tin
Gallium Arsenide
Indium Phosphide
Boron Nitride
Silicon Carbide
Cadmium Selenide
Bandgap Energy EG (eV)
5.47
1.12
0.66
0.082
1.42
1.35
7.50
3.00
1.70
Si
Si
Si
Si
Si
Si
Si
wi
th
an
ele
ct r
on
Si
Si
Cova len t bon d filled
Figure 2.2 -
Two-dimensional silicon lattice with shared covalent bonds.
At
temperatures approaching 0 K, all bonds are filled, and the outer shells of
the silicon atoms are completely full.
Si
Si
Si
Free Electron
(-q)
Hole
(+q)
Si
Si
Si
Si
Si
Si
Figure 2.3 - An electron-hole pair is generated whenever a covalent bond is broken
Temper ature (K)
500
1 0 16
10
333
200
15
1 0 14
10
250
G erman iu m
13
Intrinsic Carrier Density (cm )
-6
1 0 12
10
11
1 0 10
10 9
10 8
Silico n
10 7
10 6
10 5
10 4
G alliu m Ars en i d e
10 3
10 2
10
1
10 0
2
3
4
5
Reciprocal Tem prer ature (1000/T)
Figure 2. 5 - Intrinsic carrier density versus temperature from Eqn. 2. 2 using B = 1. 08 x
1031 K -3-cm-6 for Ge, B = = 2. 31 x 1030 K -3-cm-6 for Si and B = = 1. 27 x 1029 K -3-cm-6
for GaAs.
Si
Si
Si
-q
+q
Si
P
Si
Si
Si
Si
Figure 2.5 - An extra electron is available from a phosphorus donor atom
Si
Si
Si
Si
B
Si
Si
Si
Vacancy
Si
Figure 2.6(a) - Covalent bond vacancy from boron acceptor atom
Si
Si
Si
-q
Si
B
Si
Si
Si
Hole
+q
Si
Figure 2.6(b) - Hole created after the boron atom accepts an electron
Si
Si
Si
-q
Si
B
Si
Si
Si
Hole
+q
Si
Figure 2.6(c) - Mobile hole moving through the silicon lattice
Energy
Conduction band
EC
E G = Energy bandgap
EV
Valence band
Figure 2.7 - Energy band model for a semiconductor with bandgap EG
Energy
Conduction band
EC
EG
EV
Valence band
Figure 2.8 -
Semiconductor at 0 K with filled valence band and empty conduction band.
This figure corresponds to the bond model of Fig. 2.2.
Conduction band
Electron
EC
EV
Hole
Valence ba nd
Figure 2.9 -
Creation of electron-hole pair by thermal excitation across the energy
bandgap. This figure corresponds to the bond model of Fig. 2.3.
Electrons
EC
ED
ND
EV
Figure 2.10 - Donor level with activation energy (EC - ED). This figure corresponds to the
band model of Fig. 2.4.
EC
NA
EA
E V
Holes
Figure 2.11- Acceptor level with activation energy (EA - EV). This figure corresponds to
the bond model of Fig. 2.6(b).
Electron
EC
ND
Donor Levels
NA
Acceptor Leve ls
EV
F igu re 2.12 - Com pen s a t ed s em icon du ct or con t a in in g bot h
don or a n d a ccept or a t om s wit h ND > NA.
n(x) or p(x)
Carrier
Diffusion
Hole
Current
Electron
Current
P ositive
Concentration
Gradient
x
Figure 2.14 - Carrier diffusion in the presence of a concentration gradient
Diodes
19
Figure 3.1 The ideal diode: (a) diode circuit symbol; (b) i–v characteristic; (c) equivalent circuit in the reverse direction;
(d) equivalent circuit in the forward direction.
Figure 3.2 The two modes of operation of ideal
diodes and the use of an external circuit to limit
the forward current (a) and the reverse voltage
(b).
Figure 3.3 (a) Rectifier circuit. (b) Input waveform. (c) Equivalent circuit when vI  0. (d)
Equivalent circuit when vI  0. (e) Output waveform.
Figure E3.1
Figure 3.4 Circuit and waveforms for Example 3.1.
Figure 3.5 Diode logic gates: (a) OR gate; (b) AND gate (in a positive-logic system).
Figure 3.6 Circuits for Example 3.2.
Figure E3.4
Figure 3.7 The i–v characteristic of a silicon junction diode.
Figure 3.8 The diode i–v relationship with some scales
expanded and others compressed in order to reveal details.
Figure 3.9 Illustrating the temperature dependence of the diode forward
characteristic. At a constant current, the voltage drop decreases by
approximately 2 mV for every 1C increase in temperature.
Figure E3.9
Figure 3.39 Simplified physical structure of the junction
diode. (Actual geometries are given in Appendix A.)
Figure 3.40 Two-dimensional representation of the silicon crystal. The
circles represent the inner core of silicon atoms, with +4 indicating its
positive charge of +4q, which is neutralized by the charge of the four valence
electrons. Observe how the covalent bonds are formed by sharing of the
valence electrons. At 0 K, all bonds are intact and no free electrons are
available for current conduction.
Figure 3.41 At room temperature, some of the
covalent bonds are broken by thermal ionization.
Each broken bond gives rise to a free electron and a
hole, both of which become available for current
conduction.
Figure 3.42 A bar of intrinsic silicon (a) in which the hole concentration profile
shown in (b) has been created along the x-axis by some unspecified mechanism.
Figure 3.43 A silicon crystal doped by a pentavalent element. Each dopant atom donates
a free electron and is thus called a donor. The doped semiconductor becomes n type.
Figure 3.44 A silicon crystal doped with a trivalent impurity. Each
dopant atom gives rise to a hole, and the semiconductor becomes p type.
Figure 3.45 (a) The pn junction with no applied voltage (opencircuited terminals). (b) The potential distribution along an axis
perpendicular to the junction.
Figure 3.46 The pn junction excited by a constant-current
source I in the reverse direction. To avoid breakdown, I is
kept smaller than IS. Note that the depletion layer widens
and the barrier voltage increases by VR volts, which
appears between the terminals as a reverse voltage.
Figure 3.47 The charge stored on either side of the
depletion layer as a function of the reverse voltage VR.
Figure 3.48 The pn junction excited by a reverse-current source
I, where I > IS. The junction breaks down, and a voltage VZ , with
the polarity indicated, develops across the junction.
Figure 3.49 The pn junction excited by a constant-current source
supplying a current I in the forward direction. The depletion layer
narrows and the barrier voltage decreases by V volts, which
appears as an external voltage in the forward direction.
Figure 3.50 Minority-carrier distribution in a forward-biased pn junction. It is assumed that the p region is more heavily
doped than the n region; NA @ ND.
Figure 3.10 A simple circuit used to illustrate the
analysis of circuits in which the diode is forward
conducting.
Figure 3.11 Graphical analysis of the circuit in Fig. 3.10 using the exponential diode
model.
Figure 3.12 Approximating the diode forward characteristic
with two straight lines: the piecewise-linear model.
Figure 3.13 Piecewise-linear model of the diode forward
characteristic and its equivalent circuit representation.
Figure 3.14 The circuit of Fig. 3.10 with the diode
replaced with its piecewise-linear model of Fig. 3.13.
Figure 3.15 Development of the constant-voltage-drop model of the diode
forward characteristics. A vertical straight line (B) is used to approximate the
fast-rising exponential. Observe that this simple model predicts VD to within
0.1 V over the current range of 0.1 mA to 10 mA.
Figure 3.16 The constant-voltage-drop model of the diode
forward characteristics and its equivalent-circuit
representation.
Figure E3.12
Figure 3.17 Development of the diode small-signal model. Note that
the numerical values shown are for a diode with n = 2.
Figure 3.18 (a) Circuit for Example 3.6. (b) Circuit for
calculating the dc operating point. (c) Small-signal
equivalent circuit.
Figure 3.19 Circuit for Example 3.7.
Figure E3.16
Table 3.1 Modeling the Diode Forward Characteristic
Table 3.1 (Continued)
Figure 3.20 Circuit
symbol for a zener
diode.
Figure 3.21 The diode i–v characteristic with the breakdown
region shown in some detail.
Figure 3.22 Model
for the zener diode.
Figure 3.23 (a) Circuit for Example 3.8.
(b) The circuit with the zener diode
replaced with its equivalent circuit
model.
Figure 3.24 Block diagram of a dc power supply.
Figure 3.25 (a) Half-wave rectifier. (b) Equivalent circuit of the half-wave rectifier with the diode replaced with its
battery-plus-resistance model. (c) Transfer characteristic of the rectifier circuit. (d) Input and output waveforms, assuming
that rD ! R.
Figure 3.26 Full-wave rectifier utilizing a transformer with a center-tapped secondary winding: (a) circuit; (b) transfer
characteristic assuming a constant-voltage-drop model for the diodes; (c) input and output waveforms.
Figure 3.27 The bridge rectifier: (a) circuit; (b) input and output waveforms.
Figure 2.7
A full-wave bridge rectifier: (a) circuit showing the current direction for a positive input cycle, (b)
current direction for a negative input cycle, and (c) input and output voltage waveforms
Figure 3.28 (a) A simple circuit used to illustrate the effect of a filter capacitor. (b)
Input and output waveforms assuming an ideal diode. Note that the circuit provides a
dc voltage equal to the peak of the input sine wave. The circuit is therefore known as
a peak rectifier or a peak detector.
Figure 3.29 Voltage and current waveforms in the peak rectifier circuit with CR @ T. The diode is assumed ideal.
Figure 3.30 Waveforms in the full-wave peak rectifier.
Figure 3.31 The “superdiode” precision half-wave rectifier and its almost-ideal transfer characteristic. Note that when vI > 0
and the diode conducts, the op amp supplies the load current, and the source is conveniently buffered, an added advantage.
Not shown are the op-amp power supplies.
Figure 3.32 General transfer characteristic for a limiter circuit.
Figure 3.33 Applying a sine wave to a limiter can result in clipping off its two peaks.
Figure 3.34 Soft
limiting.
Figure 3.35 A variety of basic limiting circuits.
Figure E3.27
Figure 3.36 The clamped capacitor or dc restorer with a square-wave input and no load.
Figure 3.37 The clamped capacitor with a load resistance
R.
Figure 3.38 Voltage doubler: (a) circuit; (b) waveform of the voltage across
D1.
Figure 3.51 The SPICE diode model.
Figure 3.52 Equivalent-circuit model used to simulate the zener
diode in SPICE. Diode D1 is ideal and can be approximated in
SPICE by using a very small value for n (say n = 0.01).
Figure 3.53 Capture schematic of the 5-V dc power supply in Example 3.10.
Figure 3.54 The voltage vC across the smoothing capacitor C and the voltage vO across the load resistor Rload = 200 W in
the 5-V power supply of Example 3.10.
Figure 3.55 The output-voltage waveform from the 5-V power supply (in Example 3.10) for various load resistances:
Rload = 500 W, 250 W, 200 W, and 150 W. The voltage regulation is lost at a load resistance of 150 W.
Figure E3.35 (a) Capture schematic of the voltage-doubler circuit (in Exercise 3.35).
Figure E3.35 (Continued) (b) Various voltage waveforms in the voltagedoubler circuit. The top graph displays the input sine-wave voltage
signal, the middle graph displays the voltage across diode D1, and the
bottom graph displays the voltage that appears at the output.
Figure P3.2
Figure P3.3
Figure P3.4 (Continued)
Figure P3.4 (Continued)
Figure P3.5
Figure P3.6
Figure P3.9
Figure P3.10
Figure P3.16
Figure P3.23
Figure P3.25
Figure P3.26
Figure P3.28
Figure P3.54
Figure P3.56
Figure P3.57
Figure P3.58
Figure P3.59
Figure P3.63
Figure P3.82
Figure P3.91
Figure P3.92
Figure P3.93
Figure P3.97
Figure P3.98
Figure P3.102
Figure P3.103
Figure P3.105
Figure P3.108