Transcript The Reneisance of Compiler Developments

The Renaissance of
Compiler Development
Compiler optimizations motivated by
embedded systems
Tibor Gyimóthy
University of Szeged
October 6, 2004.
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Open Source Laboratory at the
University of Szeged
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Open Source Laboratory at the
University of Szeged
Beszédes Árpád
Ferenc Rudolf
Gergely Tamás
Gyimóthy Tibor
Jász Judit
Havasi Ferenc
Kiss Ákos
October 6, 2004.
Lóki Gábor
Patrik Kluba
Siket István
Siket Péter
Sógor Zoltán
Tóth Gábor
Vidács László
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The Dragon book
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Good quality compilers
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New challenges:embedded
processors
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Low energy computation
System-wide optimizations are required for
energy-saving.
 Software design has significant impact on
the energy consumption of the processor.
 Accurate energy models of the hardware
modules are required for power analysis at
system level.
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Low energy computation(cont.)
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Instruction level optimizations include reordering
instructions to reduce switching,reduction of
memory operands etc.
The register relabeling technique reorders the
register labels of the generated code. A sample
trace and a power model are used to obtain new
labels (The Pennsylvania State University).
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Low energy computation(cont.)
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ARM is the most popular processor for the embedded
domain.
The 32 bit ARM processor also supports the 16 bit
Thumb instruction set.
By using Thumb code the I-cache activity (energy) can
be reduced.
However,the restricted Thumb instruction set may lead to
the loss in performance.
Profile guided algorithms were proposed for generating
mixed ARM and Thumb code (The University of Arizona)
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Low energy computation(cont.)
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System-level power optimizing data-flow
transformations are applied for multimedia
applications(IMEC,Leuven,Belgium)
Main aim is to reduce the power consumption
due to data storage and transfers (significant
part of the total power budget of the system).
Performance and code size must be taken into
account as well.
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Low energy computation(cont.)
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Tradional compiler approaches focusing only on speed
are not sufficient for multimedia applications.
The power cost model is linear with respect to the acces
frequency and the dependence on the memory size is
determined by a polynomial function.
Code transformations are applied to the original source
code (C).
The method reduces the size of the array signals and the
acceses to array signals.
Very large power savings can be achived without
introducing significant performance penalties.
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Low energy computation(cont.)
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Closely related to the code size reduction
 Executing
fewer instructions
 Accessing external memory less frequently
Agressive code size optimization
techniques
 Post-link time optimizations
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Code size reductions in GCC
A survey paper in ACM Computing
Surveys,2003
 Magic switches & patches
 Local factoring
 Sequence abstraction
 CSiBE- Code Size Benchmark
 GCC improvement for Symbian
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Magic switches & patches
Function inlining
 Tree-to-rtl extension
 Optimizing large jump tables
 Extending move and compare
parallelization
 Crossjumping cleanup
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Local factoring
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Code motion techniques
 Strategy:
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Move identical instructions from basic blocks to their common
predecessor and successor
Data and register dependence must not be altered
 Implemented:
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Code hoisting
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Code sinking
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moving the code to an earlier place in the execution path
moving the code to a later execution place
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Code Hoisting
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Code sinking
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Sequence abstraction
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Sequence Abstraction
 Works
on SESE code fragments
 Strategy:
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Find region of identical instructions which can be turned into
procedures
Replace all occurrences with calls to the newly created
subroutine
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Sequence abstraction(cont)
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Sequence abstraction
 RTL
implementation:
Compilation unit: function
 No need to create a procedure, create only a call
to a labelled representative code region
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CSiBE-GCC Code Size Benchmark
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www.inf.u-szeged.hu/CSiBE
Introduced in 2003
‘de facto’ a standard size benchmark for GCC
Continuous monitoring the impact of the new
patches on the code size
New version: compilation time and performance
More and more GCC developers are using
CSiBE in their daily work
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CSiBE(cont)
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CSiBE(cont)
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CSiBE(cont)
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Overall tendency of the code size
GCC mainline, code size (ARM)
4000000
1.3%
1.3%
3900000
4.3%
4.3% 5.1%
5.1% 7.2%
7.2%
3800000
3700000
3600000
3500000
3400000
2002-0902
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2003-0106
2004-0105
2004-0503
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GCC improvement for Symbian
The official Symbian build is based on
GCC 2.9, from the year 1998.
 The GCC 2.95.3 was extended to support
the Symbian target.
 The modified compiler reduces the code
size and improves the performance as well
(5-10%).
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Post-link time optimization
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Interprocedural versions of the classical compiler optimization
techniques are used for binary-rewriting of machine code(whole
system optimization,Squeeze—Debray et al,ATOM—Univ.of
Szeged).
Techniques:
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Interprocedural control flow analysis,constant propagation,register
liveness analysis
Redundant code-elimination
Unreachable-code elimination
Dead-code elimination
Strength-code elimination
Local factoring
Procedural abstraction
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Some open issues in the GCC
development
There is a need for effective size
optimization methods on Tree-SSA level.
 The sequence abstraction approach can
be extended to the unit-at time level.
 The post-link time optimization methods
can be integrated into GCC.
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Conclusions
Open source software is widely used in
the industry
 There is a need for machine–level
programmers
 Challenge:many people will use their
programs
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Effective compilers for embedded
processors
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