Transcript Engineering Brief ENGR 101 - Coastal Carolina University
FPGAs In The Classroom :
Practice and Experience
William M. Jones, Ph.D.
Department of Computer Science Coastal Carolina University Computer Security Conference 15 APR 2010
What is an FPGA?
Where are FPGAs Found?
Prototyping HPC NICs GPUs DSP
And in CSCC Room 122!
Why?
Assembly Programming Digital Logic Architecture Common Target Computing Platform???
Compiler Design & Implementation
Altera DE2 Development and Education Board
FPGA Course Mappings Assembly Programming (CSCI 210 and 310)
Compilers (CSCI 450)
Operating Systems CSCI 410 Digital Logic Combinational (CSCI 210) Sequential (CSCI 310) Computer Architecture (CSCI 310) + Security (CSCI 210 and 385) Embedded Systems CSCI 4xx?
Digital Logic Design (Traditional)
Pencil and paper – Important pedagogical approach – Testing on quizzes and exams Use of breadboards – – Hands-on Tedious – Prone to error 7400 series logic gates – Voltage polarity – Difficult to debug
Digital Logic Design (Innovative)
Pencil and paper – Still important Schematic capture – Draw circuit diagram – Easily modifiable Digital Logic (and more) IDE – Debugging capability Testing in lab environment – Access to prototype boards
IDE and Tools
Trace Program Execution
CSCI 210 – Computer Organization
HW01 – Intro to logic gates, learn to use the IDE HW02 – Intro to logic gates, lights and switches HW03 – 1-bit Full Adder (from TT to implementation) HW04 – 4-bit 2’s complement ripple carry add/sub HW05 – Intro to NIOSII Processor, I/O, running sum HW06 – Binary encoding of instructions, addr. modes HW07 – Functions, loops, IF stmts., I/O with SSDs HW08 – Call stack management, param. passing HW09 – Buffer overflow, overwrite RA on call stack
Let’s Take a Look at Actual Student Work CSCI 210 Fall 2009, Spring 2010
CSCI 210 – HW02 – Intro to Gates
Courtesy of Ruben Villao
B A
CSCI 210 – HW04 – Full Add/Sub
A + (-) B = C C
Courtesy of Ruben Villao
CSCI 210 – HW07 – NIOSII w/ SSDs
NIOSII Embedded Processor 32-bit RISC I/O w/ SSDs and switches
Courtesy of Dorian Sovic
CSCI 210 – HW07 – Assembly Code
Dorian Sovic
CSCI 210 – HW09 – Stack Exploitation
Provide student w/ uncommented code.
They identify problem and exploit it.
A[0] A[1] A[7] Foo’s saved RA
CSCI 310 – Computer Architecture
HW01 – Multiplexer design (from TT to Kmap to impl)
HW02 – 1-bit Full Adder (from TT to implementation) HW03 – 4-bit ripple carry adder
HW04 – State machine design, 3-bit up/down counter HW05 – State machine design, serial data stream HW06 – MM:SS digital clock, (from TT to impl)
HW07 – Intro to NIOSII Processor, I/O, running sum HW08 – Function calls, I/O
HW09 – Functions, I/O, bit shifting/masking, stack
Implemented Fall 2009
CSCI 210 – HW05 – State Machines
Courtesy of James Bettke
PIN_N25
CSCI 210 – HW05 – State Machines
INPUT VCC AND2 SW[0] inst13 AND2 inst15 AND2 inst11 AND2 inst12 OR2 inst16 OR2 inst14 INPUT VCC inst
DFF2 PRN D CLK CLRN Q QN
inst1
DFF2 PRN D CLK CLRN Q QN
VCC AND2 OUTPUT inst10 A B C D LTN RBIN BIN 7447 OA OB OC OD OE OF OG RBON inst9 BCD TO 7SEG OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT LEDG[0] HEX0[0] HEX0[1] HEX0[2] HEX0[3] HEX0[4] HEX0[5] HEX0[6] PIN_AF10 PIN_AB12 PIN_AC12 PIN_AD11 PIN_AE11 PIN_V14 PIN_V13 PIN_G26 KEY [0]
1-Hot Encoding
A = A+ = X’A + X’B + X’C + X’D B = B+ = XA C = C+ = XB Y = D = D+ = XC + XD
Courtesy of James Bettke
CSCI 310 – HW06 -- MM:SS Digital Clock
4-bit counter (state transition diagram) Glue logic, frequency dividers
Courtesy of Yosi Benzera
CSCI 310 – HW09 – Shifting/Masking
Get some data Drive SSDs w/ software Stack management Shifting Masking Look up tables
Courtesy of Yosi Benzera
Looking Towards Next Year
Refine course objectives to delineate 210/310 – Hardware Description Language (VHDL) – – ALU Simple CPU Improve / create new security modules for placement in CSCI 385 Create interrupt (C-based) lab for CSCI 410 – Push button Create assembler lab for CSCI 450
A Simple ALU (Digital Logic/Comp. Arch.)
ALU Specifications
ALU Part 1
ALU Part 2
ALU Part 3
So What Do You Need?
An FPGA Development Board/Kit – Xilinx – – Altera $150 - $500 ($275 each) IDE – ISE – – Quartus University programs / freely available Host Computer – PC – Laptop – USB
Digital Signal Processing, Video, Networking, Embedded Systems
Thank you!
Questions?
http://ww2.coastal.edu/wjones
After talk comments on the next slide …
After talk thoughts ….
Attendees were asked if this focus on assembly and hardware is relevant to computer security.
Responses were varied – Some thought it was paramount – Some thought it was not particularly relevant – Others suggested it depended on what type of job you ultimately got