Transcript F. Ludwig

EUROFEL DS3-DS4 Task Meeting,
17/05/05
‚Multi-channel RF Amplitude and Phase Detector‘
Frank Ludwig, DESY
Content :
1
Stability requirements on phase and amplitude
2
Available technologies and selection of the detector concept
3
Proposed LLRF system for optimized detector operation
4
Status of the multi-channel EUROFEL LLRF-detectors
5
Future work and open questions
Frank Ludwig, DESY
Stability requirements on phase and amplitude

Stability requirements on phase and amplitude of the vector sum of the cavity field vector :
Amplitude stability : δA  5  10 5
and linearity
A
Phase stability :

δφ  0.01
δφ
δA
A
δU EUROFEL  50 μV
(normalized to A=1V)
Requirements on the detectors linearity and noise:
Amplitude stability and linearity :
- 43dB dynamic range of signal-to-noise
- 50dB linearity of down-converters
- Low-noise design
- Reduce the measuring bandwidth
depending on LLRF-concept!
RMS-voltage noise of the detector :
δU  SU f
SU  50nV / Hz ,
f  1MHz
Without gain from vector sum
Frank Ludwig, DESY
Available technologies and selection of the detector concept

Passive Mixer + GaAs FET:

+ High linearity
+ Low NF
- Large LO drive needed
- Low LO/RF isolation
P(RF)
P(LO)
P(IF)
NF
IP3
1dB
MS11
PS11
MS22
PS22
MS33
PS33
Gain
RF to IF
isol IF RF
iso LO RF
iso LO IF
IF(min)
dBm
dBm
dBm
dB
dBm
dBm
dB
deg
dB
deg
dB
deg
dB
deg
dB
dB
dB
MHz
Active Mixer (Gibert cell):

+ High conversion gain
+ Low LO drive needed
+ High LO/RF isolation
- Normal NF
- Additional 1/f-noise
HMC439: phase detector SiGe
+ Low NF, - Limited to 1.3GHz
AD8347 : quadrature demodulator
- to be tested in ‚parallel‘
down
up
down down
down
down
down down down
down
down
LT5522 LT5521 LT5526 MC1502 CDB-9050 DBM-182 MBA-15L HMJ7 HMJ7-1 IAM-92516 AD8343
-7
-15
-10
-5
-10
-10
-10
-10
-12
-5
-5
-5
7
-5
7
21
21
-3
-10
-7
13,2
12,5
12,3
7,5
15
8,5
8,5
10,5
12,5
14,1
25
24,2
16,5
12
-3
34
34
27
16,5
10,8
11
5
0
23
23
9
2,8
-0,4
-0,5
0,5
6
6
-7,5
50
49
0,1
38
59
10
55
55
0,1
30
25
0
33
35
30
25
20
0
-6,5
Other detectors :
-8,5
-8,5
-5,5
24
24
24
30
34
56
0
AD8302 : gain, phase monitor
+ good temperature stability
- worse NF
AD8343
LT5522
7,1
Multi-channel detector :
Frank Ludwig, DESY
14
0
54
0
Gilbert cell mixer
Actual down-converter (AD8343+OPAmp) operating at 1.3GHz
(Designed by G.Möller/DESY/MHF-p)
+ High LO/RF isolation
- RF-range [DC-2.5GHz]
- Mixing into baseband
caused additional noise
8-channels from cavity probe :
PRF  [40dBm,10dBm]
 70dB linearity
Frank Ludwig, DESY
8-channels to ADC-Board :
SU  70nV / Hz
LO-Input :
PLO  5dBm
Noise characterization of the actual down-converter

Noise from sensor (down-converter-board) :
δU  4.0  δU EUROFEL , f  10 MHz
δU  1.2  δU EUROFEL , f  1MHz
PRF  [40dBm,10dBm],  70dB linearity

Linearity versus noise
PIF
P1dB
1db compression point
SU ,
Crosstalk,
isolation,
leakage
problems
 4.5nV / Hz
SU , AMP
 7nV / Hz
SU
 70nV / Hz
f RF  1300MHz
v  8.5
Noise
floor
f LO  1300MHz
Noise problems
PRF
Frank Ludwig, DESY
SU  (SU ,  SU , AMP ) v 2
Proposed LLRF system for optimized detector operation

Measuring bandwidth :
Proposed LLRF control system operating with a CW LO-signal :
Master-Oscillator
f  1MHz
high-power cavity
klystron
1300-81
(2997-81)
Jitter conversion :
down-converter
LO-input
1300-81
(2997-81)
RF-input
1300
(2997)
t 
f LO
81=9 x 9
Undersampling and Averaging
ADC-clock
+ Filtering of higher harmonics and distortions.
+ Measuring bandwidth can be minimized (Noise reduction by a factor of 3...5).
+ No noise from LO-driver.
Precise synchronization of ADC-clocks and clock jitter must average.
Frank Ludwig, DESY
f RF
T
f IF

T  370 fs
FPGA
-

f RF
f IF
DAC-clock
t  10 fs
Status of the multi-channel EUROFEL LLRF detectors

Structure of single down-converter (discrete prototype) :
ADC clock
36 MHz
(from MO)
LO-input
BPF
-5dBm
1300-81 MHz
(2997-81 MHz)
(from MO)
Attenuator
36 MHz
Undersampling
1291 MHz
(2916 MHz)
Stripline Filter
LO Input
Matching
Circuit
Active Mixer
LT5522
(LT5527)
81MHz
SMD-Filter
Low-Noise-Amplifier
Evaluation
Board
1300 MHz
(2997 MHz)
Stripline Filter
BPF
RF-input
1300 MHz
2997 MHz
IF Output
Matching
Circuit
BPF
AD6645
Input
Matching
Circuit
LNA
Output
Matching
Circuit
14 Bit,
80 MSPS,
100fs jitter
Manufactured in stripline design.
Frank Ludwig, DESY
14
Future work

Next steps :
- Measure performance of the disrete single channel down-converter
prototype at 1.3GHz with existing Master-Oscillator at DESY.
- Performance evalution in the accelerator environment.
- Redimension RF-filters to 3GHz and build a single channel detector on one board.
- Design multi-channel board.
- Optimize shielding and minimize channel crosstalk.
- Integrate FPGA (data preprocessing), Gigalink or Fiberlink onto the board.

Questions to be answered :
- Noise performance of LLRF system including the Master-Oscillator achitecture.
- Determine residual jitter of the LLRF concepts.

-
Check alternatives to overcome the mixers noise limitation :
Passive mixer + RF-Transformer + LNA
interferometric techniques
Seperate farm of phase and amplitude detectors (Hittite, Analog Devices, Linear Tech.)
Integrated farm of Gilbert cell mixers.
- Chipdesign using InP-HEMTs (promise higer gain and lower noise).
Frank Ludwig, DESY