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RTAX-S Qualification and
Reliability Data
September 7-9, 2005
2005 MAPLD International Conference
Minal Sawant
Ravi Pragasam
Solomon Wolday
Ken O’Neill
Outline
Design Overview
MIL-STD-883B
Enhanced Antifuse Qualification (EAQ)
Sample Size and Test Sequence
Results
MIL-STD-883B
Enhanced Antifuse Qualification (EAQ)
Enhanced Lot Acceptance (ELA)
Plan
Results
Terminology:
EAQ = ELA (both processes use the same design)
Group C = High Temperature Operating Life (HTOL) = Dynamic
Programmed Burn In (DPBI)
RTAX-S Qualification and Reliability Data
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
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Design Overview
MIL-STD-883B
EAQ
Uses the QBI (Qualification
Burn In) design
Goal: Device Feature
Uses the EAQ design
Goal: Antifuse Reliability
Maximum Utilization of logic
cells
Test all IO standards
Tests all possible antifuse
type
Based on NASA style design
Test for delay perceptibility
Test all macro offering
(Carry chain, buffys etc)
Test RAM feature
Test for propagation delay
Note: QBI = QCMON
RTAX-S Qualification and Reliability Data
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
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Top Level
EAQ Design
QBI Design
Combinatorial
Block
Combo Test OK
Reset_n
Set_n
ShiftFreq[1:0]
A_Pattern_type
A_Pattern_length[2:0]
Array Test Block
(1458 bit SR)
Tile 1-3 (Row 1)
2
3
Array_out [0]
Array Clock
Clk
Spine
I/O Block
I/O Test
OK
Array Test Block
(1458 bit SR)
Tile 4-6 (Row 2)
Error Flags [2:0]
3
Array_out [1]
Array
Monitor
Array Monitor
Global
Monitor
Global Monitor
Clk
Spine
FIFO
Test OK
FIFO Block
RAM
Test OK
RAM Block
Monitor
Circuit
Array Test Block
(1458 bit SR)
Tile 7-9 (Row 3)
Global
Test
Monitor
IO_Pattern_type
IO_Pattern_length[2:0]
Array_out [2]
Clk
Spine
Error Flag
IO_pin[0]
IO Test Block
375 I/Os
(1125 I/O Regs)
3
IO_pin[374]
IO Clock
TOG_n
IO_Monitor
IO_ResetSyncD
Error Flag [8:0]
RAM Test Block
(nine 1x16384 ram)
ALU Block
13
ALU
Test OK
RTAX-S Qualification and Reliability Data
Delay_in
Delay_sel [1:0]
2
MAPLD 2005 - # 1032
Delay Chain
(8 X 1300 NAND)
9
Ram Monitor
Ram out [8:0]
8
Delay_out [7:0]
Sawant, Wolday, Pragasam, O’Neill
4
Delay Paths
QBI includes one small
delay chain
EAQ includes 8 delay
chains
1,300 NAND4 gate
Delay Line
delay_sel_n[0]
delay_sel_n[1]
Sliding
Decoder
Delay_out [0]
Delay_out [1]
Delay_out
Delay_in
D
Q
D
Q
D
Q
D
Q
IO_clk
E
CLR
E
CLR
E
CLR
E
Delay_out [2]
CLR
IO_ResetSyncD
32
Delay_in
Q
SET
Q CLR
D
D
SET
CLR
SET
Q
Q
Q
Q CLR
D
D
SET
CLR
64
128
Delay_out [3]
0
1
2
3
Delay_out [4]
Q
Delay_out [5]
Q
Delay_out [6]
Delay_out [7]
22 Stages: ~ 36 ns
RTAX-S Qualification and Reliability Data
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
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Design Summary
QBI
SEQUENTIAL (R-cells)
COMB
(C-cells)
LOGIC
(R+C cells)
RAM/FIFO
IO
w/Clocks
HCLOCK (Hardwired)
CLOCK
(Routed)
Used:
Used:
Used:
Used:
Used:
Used:
Used:
RTAX1000S-CQ352
5768 / 6048
95.37%
12091 / 12096
99.95%
17859 / 18144
98.43%
36 / 36
100%
196 / 198
99%
4 / 4
100%
4 / 4
100%
RTAX2000S-CQ352
9965 / 10752
92.68%
21437 / 21504
99.69%
31402 / 32256
97.35%
64 / 64
100%
196 / 198
99%
4 / 4
100%
4 / 4
100%
I/O’s are configured with all the different combinations of I/O standards, slew
and pull-up resistor (I/O standards LVTTL, PCI, and PCIX, LVPECL, and Vref are
used)
EAQ (RTAX1000S-CG624)
SEQUENTIAL
COMB
LOGIC
(R-cells)
(C-cells)
(R+C cells)
RAM/FIFO
Used:
Used:
Used:
6010 / 6048
12029 / 12096
18039 / 18144
99.37%
99.45%
99.42%
Used:
36 / 36
100%
IO
w/Clocks
Used:
418 / 418
100%
HCLOCK
(Hardwired)
Used:
4 / 4
100%
2 / 4
(2 of the unused RCLK's
resources are divided into
spine networks and utilized as
global Set/Reset signals)
CLOCK
RTAX-S Qualification and Reliability Data
(Routed)
Used:
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
6
Antifuse Utilization
QBI
EAQ
Antifuse Type
RTAX1000S
RTAX2000S
RTAX1000S
Description
F
14458
24752
16998
Between module output segment & short vertical segment
H
6306
10900
5608
Antifuse between two horizontal tracks
I
238718
414683
240638
Between short horizontal segments & module input segment
SD
13869
24894
15737
Semi-direct antifuse
V
3214
4784
1640
Antifuse between two vertical tracks
X
92569
161448
92300
Antifuse Between short horizontal & vertical segments
C
984
1728
0
Between short vertical segments & hclockmux modules input segment
CSR
6256
8272
6256
Antifuse for I/O configuration options
SSR1
12
9
8
Silicon Signature antifuse in silicon signature words
LDH
48
226
54
Horizontal inter-tile antifuse
LDV
66
135
70
Vertical inter-tile antifuse
DB
3873
6831
85
Between local segment (DB inverter output) & input segment
LL
15338
26474
15550
Between RX/TX input/output module segment & long horizontal/vertical segment
Total
395,711
685,136
394,944
RTAX-S Qualification and Reliability Data
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
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Sample Size
QBI :
EAQ :
129 equivalent RTAX2000S-CQ352B
devices used at 125°C
300 devices of RTAX1000S-CG624 used
Equivalent 129 Devices
(LTPD =3)
RTAX2000SCQ352
84 Units
RTAX1000S-CG624
300 UNITS
Equivalent RTAX2000SCQ352
45 Units
AXS1
150 Units
RTAX1000SCQ352
90 units
AXS2
150 Units
2 Units (RTAX1000S) = 1 unit (RTAX2000S)
Additional 78 devices of RTAX1000SCQ352B used for LTOL (Low
Temperature Operating Life)
experiment at -55°C
RTAX-S Qualification and Reliability Data
AXS1A
94 units
MAPLD 2005 - # 1032
AXS1B
56 units
Sawant, Wolday, Pragasam, O’Neill
8
Test Sequence
QBI : HTOL
Program with
QBI design
EAQ : AXS1
Burn In (1000 hr)
at 125°C (with
various
pullpoints)
Pre Burn In ATE
test (25°C,-55°C,
125°C)
ATE Test at
25°C (at various
pullpoints)
Final Post Burn
In ATE (after
1000 hr) test
(25°C,-55°C,
125°C)
Final Post Burn
In ATE test
(25°C)
QBI : LTOL
Program with
QBI design
Pre Burn In ATE
test (25°C,-55°C,
125°C)
Program with
EAQ design
Burn In (1000 hr)
at 125°C (with
various
pullpoints)
Pre Burn In ATE
test (25°C)
Burn In (250 hr)
at -55°C
ATE Test at
25°C (at various
pullpoints)
Post Burn In
ATE (after 1000
hr) test (25°C)
EAQ : ASX2
Burn In (1000 hr)
at -55°C (with
various
pullpoints)
Final Post Burn
In ATE (after
1000 hr) test
(25°C,-55°C,
125°C)
RTAX-S Qualification and Reliability Data
ATE Test at
25°C (at various
pullpoints)
Program with
EAQ design
ATE Test at
25°C (at various
pullpoints)
MAPLD 2005 - # 1032
Pre Burn In ATE
test (25°C)
Burn In (250 hr)
at -55°C
Burn In (1000 hr)
at 125°C (with
various
pullpoints)
Post Burn In
ATE test (25°C)
Final Post Burn
In ATE (after
1000 hr) test
(25°C)
Sawant, Wolday, Pragasam, O’Neill
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QBI Summary
RTAXS
Product Package Wafer lot# Group Design Units
RTAX2000S
RTAX1000S
RTAX1000S
CQ352
CQ352
CQ352
D1L9R1
D1GAH1
D1GAH1
Qual(M026)
Qual(M026)
Qual(M026)
QBI
QBI
QBI
87
98
78
BI
AF Other Total TA VCCA VCCI
(hours) failures Failures (hours) (C) (V) (V)
1000
1000
1000
0
0
0
2
4
1
85000 125
94000 125
77000 -55
1.6
1.6
1.6
3.6
3.6
3.6
Comments
ESD
ESD
ESD
QBI
For RTAX2000S (87 units) = 84 + 3 spares
For RTAX1000S (98 units) = 90 + 8 spares
7 failures were observed during the HTOL and LTOL tests
RTAX-S Qualification and Reliability Data
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
10
QBI FA Investigation &
Conclusions
All the 7 failures* observed from the (QBI) devices indicated
identical failure signature due to equipment induced ESD
Physical Failure analysis indicated damage to the ESD circuit
Duplication of failure mode with MM testing indicated
identical failure signature
ESD zap is due to the charge buildup on the CQ352 socket lid
This charge does not exist on the CG624 package
Thus no failures observed in the EAQ experiment
No additional failures due to ESD have been observed since
the use of ESD friendly and staticide treated socket lids
De-processing of a second failed device showed the same
failure signature
RTAXS Passed ESD at 2000 V HBM
RTAXS Passed ESD at 250 V MM
*Failure analysis report available upon request
RTAX-S Qualification and Reliability Data
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
11
EAQ Summary
RTAXS
BI
AF Other Total TA VCCA VCCI
Product Package Wafer lot# Group Design Units
(hours) failures Failures (hours) (C) (V) (V)
RTAX1000S
CG624
D1GAH1
AXS1
EAQ
150
1000
0
6
144000 125
1.6
3.6
RTAX1000S
CG624
D1GAH1
AXS2
EAQ
148
1000
0
1*
147000 125
1.6
3.6
RTAX1000S
RTAX1000S
CG624
CG624
D1GAH1
D1GAH1
AXS1
AXS2
EAQ
EAQ
144
150
250
250
0
0
0
2
36000
37000
1.6
1.6
3.6
3.6
-55
-55
Comments
Cont failure due to BIB
Device at FA, suspect
CMOS
Cont failure due to BIB
EAQ
9 failures were observed during the HTOL and LTOL tests
8 Failures had identical failure signature
1* (HTOL after 1000 hrs) unit has a different failure signature
Failure Analysis under progress
Antifuse has been eliminated as a potential cause
No Antifuse failures observed
EAQ experiment will be continued for an extra 1000 hours of
HTOL on a sample size of 120 units from above lot
Results expected by Mid October 2005
RTAX-S Qualification and Reliability Data
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
12
EAQ FA Investigation
Conclusions
Analysis and testing showed that all 8 failures* were
on the same output pin “AE16”
All 8 devices came from burn-in board locations D1 and D2
Failure analysis indicated that the damage was on the
output buffer pull-down transistor
Damage was due to contention problem on the burn-in
boards
The -1V on the output, with over 300 mA current, exceeded the
absolute worst case condition for extended periods
No additional failures have been observed since the
contention was eliminated
AXS1 completed 250 hrs of LTOL and AXS2 completed 1000 hrs of
HTOL with no failures
De-processing of a second failed device showed the
same failure signature
*Failure analysis report available upon request
RTAX-S Qualification and Reliability Data
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
13
ELA Plan
Uses the same high perceptive design as EAQ
ELA is the EAQ design used in the production flow of
RTAX-S devices
A sample of units will be tested per each wafer lot before
shipment
This will qualify the lot for shipment
Units will be programmed to the ELA design
Units will be sent for 168 hours of Burn in at 125°C
100% yield is required to qualify lot for shipment
Product
RTAX2000S
RTAX1000S
RTAX250S
RTAX-S Qualification and Reliability Data
# of Units
14
24
100
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
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ELA Results
Results to date – No Antifuse failures
RTAXS
BI
AF Other Total TA VCCA VCCI
Product Package Wafer lot# Group Design Units
(hours) failures Failures (hours) (C) (V) (V)
RTAX2000S
RTAX2000S
RTAX2000S
RTAX250S
RTAX2000S
CQ352
CQ352
CQ352
CQ352
CQ352
D1GAG1
D1N9H1
D1L9R1
D1H381
ELA
ELA
ELA
ELA
Eng
EAQ
EAQ
EAQ
EAQ
HiSS
14
14
14
100
8
168
168
168
168
1000
0
0
0
0
0
0
0
0
0
0
2352
2352
2352
16800
8000
125
125
125
125
125
1.6
1.6
1.6
1.6
1.6
3.6
3.6
3.6
3.6
3.6
Shipping RTAX-S to Space Flight Applications
today
RTAX-S Qualification and Reliability Data
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
15
DSCC SMD Application Status
SMD#
Pre-assigned SMD# for RTAX-S are
5962-04219 for RTAX250S
5962-04220 for RTAX1000S
5962-04221 for RTAX2000S
SMD Application
SMDs in draft
Derived from Actel datasheet
Qualification Package in preparation
Qual results, FA reports, with TRB approval minutes
Qual lots attribute sheets, copies of assembly/test/burn-in travelers
Silicon technology summary
with XSEM showing planarized process
Support documents
Submission to DSCC being planned for the end of October 2005
Certification expected by the end of 2005
RTAX-S Qualification and Reliability Data
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
16
Conclusion
NO ANTIFUSE FAILURES
More than 650,000 hours of test data
available now
MIL-STD-883B Qualification completed
successfully
EAQ experiment completed successfully
150 units with 1000 hours of HTOL and 250 hours of LTOL
150 units with 250 hours of LTOL and 1000 hours of HTOL
Shipping RTAX-S to Space Flight Applications
today
Both “B” & “E” flows shipping
RTAX-S Qualification and Reliability Data
MAPLD 2005 - # 1032
Sawant, Wolday, Pragasam, O’Neill
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