Transcript The Use of Real-Time Simulation Technologies: Applications

The Use of Real-Time Simulation
Technologies: Applications to electric Drive,
Power Electronic and Grid Systems.
Federal University of Juiz de Fora
December 9, 2009
Christian Dufour, Ph.D.
Senior Simulation Specialist, Power Systems and Drives
Market Development Manager, Brazil
Lecture Plan
Considerations About Real-Time Simulation
Real-Time Simulators and Model-Based Design
Hardware Components of a Real Time Simulator
Solver Components of a Real Time Simulator
Test Automation and Sequencer
Using RT-LAB to Run Real Time Simulations
Interesting Test Cases run on multi-core RT-LAB
Conclusions
2
 Considerations about real-time
simulations
3
About the importance of simulation
Let’s consider the design of an aircraft.
Cost Billions$ to design and manufacture.
Can we wait until the first flight test to verify it actually fly?
Consider now a large power grid
Again, it can cost $billions to design
Can we wait until commissioning to make sure
it is stable and robust?
Classic facility for power grid simulation
Hydro-Quebec’s Network Simulation Center
Motivation: Quebec power network is special:

power generation is very far away from city.
Many long lines. Requires a lot of active compensation.


Focus: Real-time electrical network simulation.

Needed to design new 765-kV line and specify the equipment (insulation co-ordination)
using statistical technique
Needed to test REAL controllers for an unstable network
The real-network is not available (7 years to built)
Cannot disconnect the real power grid for test purpose!!!





Technical Challenges:
High bandwidth, Large I/O count
 Complex model requiring massively-parallel hybrid computing

Real-Time Simulation : Introduction
Free Running Simulation
Faster than real-time
Computation
f(t)
f(tn ) f(tn+1 )
tn-1
tn
Time
tn+1
Time
Slower than real-time
Computation
f(t)
f(tn)
tn-1
f(tn+1 )
tn
tn+1
Time
Time
6
Real-Time Simulation : Introduction
Real-Time Simulation
Computation
f(t)
f(tn )
f(tn+1 )
Time
Clock
tn-1
tn
tn+1
Time
DataPosting
Sine equa none conditions for real-time algorithms
Non-iterative
Fixed –step (disqualify Spice-type or Saber simulation
algorithm for example)
7
Main Purpose of Real-Time Simulation
It is sometimes difficult to test a power systems device
in its working environment or in real life condition.
Solution: One can connect a real network device
(ex: a FACTS controller) to a simulated power grid
Actuators
MODEL OF POWER GRID
Sensors
Other common applications: statistical testing,
correlation testing
8
Evolution of Real-Time Simulator Technology
2009: 1 cabinet, 3 PC with 24 core in total
For 350 3-ph buses
32 to 64 cores would be required to
simulate the detailed HQ networks
RT-LAB
COTS
Sim-On-Chip
Digital COTS
Simulators
1975
30000 square feet Hybrid Simulator
Digital Custom
Simulators
Hybrid (Analog/Digital)
Simulators
Analog
Simulators
Model Based Design
1960
1970
1980
1990
2000
9
What is Model-Based Design?

Model-Based Design is a methodology of design based on
simulation models!

Obviously! It is so common these days.

Power grid designers were the first to use this approach
philosophy, but 15 years ago and before, analog or hybrid
simulator where used since computers were not fast enough

But It was not always the case for other industries like automobile
and power electronic:

Before the advent of powerful computers and simulation tools,
people used

To write specifications on paper and use this to work with
subcontractors

Directly implement prototype on hardware

Directly integrate modules into an analog test bench of simplified or
complete system before integrating the real hardware and software
10
About the concept of Model-Based Design (simplified)
Model Design
(Simulink Block
Diagram)
Generate
Software from
Model
Correct
Design
Iteratively
Test
Upload Software
to RT Platform
11
Model Based Design (MBD) & Hardware-In-the-Loop (HIL)
Models becomes the method to pass
Information across teams
Maintenance
Design
Validate
Deployment
Model 
Off-line simulation
Production
Virtual Prototype
Integration & Test
HIL, RT simulation
3D visualization
This implementation is
made by the control team
In-system commissioning & calibration
Control Prototype
HIL, RT simulation,
Physical Components
This implementation is made
by the software team
Lab Testing
with actual controller
This implementation is
made by the integration
team
Implementation
Production Code
Physical Components
12
Advantages of Model-Based Design
Traditional
Design Method
Model Based
Design
Advantages:
Challenges:





Making Design Tradeoffs Early
Reducing Development Cycle
Reducing Testing Cost
Better and More Tests



Requires expertise and effort
Needs specialized tools
Model fidelity
Model management
13
 Real-time simulation components
Application
Models
Solvers
Inputs/Outputs
Real-Time
Platform
Communication
Processing
14
Main components of a power system real-time simulator
 The 2 most critical components of a real-
time power system simulators are:

The hardware platform the capable to do
these iteration fast enough



Running a real-time Operating System
With sufficient I/O capability
Simulation solvers capable to iterate the
equations of the power system with


Accuracy
Stability
15
Main components of a power system real-time simulator
 Other components
 Automatic test sequencer

Because you want to run many tests
automatically
16
 Hardware component of real-time
simulator
17
Hardware of a real-time power system simulator

Two main approaches remains today

Custom Digital Simulator
++ Optimized for power system problems
-- Cost more, difficult to upgrade, less open, custom RTOS
--- Not able to keep pace with new processing and communication
technologies (3 to 5 years lagging behind the latest processors)

Modern commercial-Off-The-Shelf Digital Simulator
++ Lower cost driven by mass market requirements: mainly the game
industry that continuously requires faster CPUs, easy to upgrade
++ Flexibility: can connect any PCI card
++ Openness: Standard Operating system and can be easily interface
to 3rd party software
++ Compatible with the latest processors very quickly as they become
available.
18
RT-LAB eMEGAsim Simulator Hardware Architecture
19
RT-LAB eMEGAsim Simulator Hardware Architecture
 Host/Target Architecture

 Multi-core Processors


Shared-Memory
Multi-CPU board
Simulink
Model
Single-,
Dual-, or
Quad-Core
CPU
PCI EXPRESS

Windows
QNX & RT-Linux RTOS
SIMULINK/RTW based
Simulink
Model
Sh.Mem.
CPU
PCI

HILBox PC1
20
RT-LAB eMEGAsim Simulator Hardware Architecture
 Host/Target Architecture


Windows
QNX & RT-Linux RTOS
SIMULINK/RTW based
 Multi-core Processors


Shared-Memory
Multi-CPU board
Simulink
Model
Single-,
Dual-, or
Quad-Core

User has the possibility
to add PCI cards to the
simulator with standard
Protocol like TCP/IP,
UDP/IP, RS-232
Or to develop and study
its own protocols (IEC61850, LoadRunner)
PCI
PCI PCIe Extension

CPU
PCI EXPRESS

Simulink
Model
Sh.Mem.
CPU
RS-232, CAN, TCP/IP
IEC61850, LoadRunner
HILBox PC1
21
RT-LAB eMEGAsim Simulator Hardware Architecture
 Host/Target Architecture



Windows
QNX & RT-Linux RTOS
SIMULINK/RTW based
 Multi-core processors



Digital IO requirements
For power electronic
applications, the Digital
I/O card is critical
It must be capable of
sampling Thyristor/
IGBT/GTO/MOSFET
gate with great accuracy
The latency must also
be very low so it does
not to slow down the
simulation (PCI Express)
CPU
16 DO
Sh.Mem.
CU
PCI Express
FPGA (op5142)

Shared-Memory
Multi-CPU board
PCI EXPRESS

Carrier (op5210)
16 AO
16 AI
Carrier w (op511x)
16 AO
16 AI
Carrier w (op511x)
16 DO
FastCom
16 DI
16 DI
Carrier (op5210)
HILBox PC1
22
Sampling of fast PWM gate signals



For this purpose, PWM
pulse are captured on
the FPGA card by
100MHz counters
Normalized ratio (Time
stamp) is send to the
inverter models on the
CPU
The model on the CPU
use the Time Stamps to
compute interpolated
voltages
23
Effect of switch gate sampling and interpolation

RTeDRIVE inverter model use the time stamps to
produce very accurate results



Example: a simple DC chopper (PWM=10kHz, Ts=10µs)
Bad sampling (like if we use regular SPS) causes
important non-linearity in the input-output characteristic
But very linear caracteristic with RTeDrive TSB inverters
SimPowerSystems
TSB
Tcarrier/Ts=10
Effect of switch gate sampling and interpolation

Precise enough to take into account
deadtime effect smaller that the
sample Time

Below is the effect of dead time increment
of 2 µs (with a sample time of 10µs!)
Hardware Architecture (FPGA models)
 Host/Target Architecture


Windows
QNX & RT-Linux RTOS
SIMULINK/RTW based
 Multi-core processors



Shared-Memory, Multi-CPU board
FPGA user programmability
Sh.Mem.
for advanced model design
The FPGA card can be programmed by
the user using Xilinx System Generator CU
No VHDL language skill required.
PCI Express
It is a Simulink
blockset
FastCom
PCI EXPRESS

Xilinx System
Generator Blockset
CPU
Model
Models with 10
ns sample rate
can be coded on
this card!
16 DO
FPGA (op5142)

16 DI
Carrier (op5210)
16 AO
16 AI
Carrier w (op511x)
16 AO
16 AI
Carrier w (op511x)
16 DO
16 DI
Xilinx SG model
Carrier (op5210)
HILBox PC1
26
Simulator Hardware Architecture (Expandability)
 Host/Target Architecture



Windows
QNX & RT-Linux RTOS
SIMULINK/RTW based
 Multi-core processors

Shared-Memory
Multi-CPU board
CPU
 Expandability

FireWire
INFINIBAND switch
DOLPHIN SCI /PCIe
(2 to 5 us latency)
CU
PCI Express
PCI

PCI EXPRESS

16 DO
Sh.Mem.
Dolphin
FPGA (op5142)

16 DI
Carrier (op5210)
16 AO
16 AI
Carrier w (op511x)
16 AO
16 AI
Carrier w (op511x)
16 DO
16 DI
Carrier (op5210)
HILBox PC1
Dolphin
HILBox PC2
27
 Solver components of real-time simulator
28
Simulation solvers for power systems
 Key characteristics of power systems
 Contains a wide range of frequency modes


Requires ‘stiff’ fixed-step solvers. Stiff solver
remains stable even with mode above the
simulation Nyquist limit.
Contains a lot of PWM-driven power
electronics

The simulator must avoid sampling effect when
computing IGBT pulse ‘events’ internally or
when reading PWM pulses from its I/Os
29
Stiff solvers methods for power system simulation
 Simulation methods electric systems:
 Nodal approach (EMTP, HYPERSIM)
 State-Space (SimPowerSystems, PLECS)
 Switching-function (inverter models only)
 FPGA-based methods
Stiff solvers methods for power system simulation
 Classic method ‘Nodal Approach’
 Each RLC branch is discretized with the
trapezoidal rule of integration (stiff solver)
Example: inductor
 S-domain equation: i  1 / L vdt
 Discretization by Trapeze( time step: T):

T
T
in 
vn  in 1 
vn 1
2L
2L

Hummmm….. In depends on vn , a priori
unknown nodal voltage
 Implicit problem, cannot iterate directly 
Stiff solvers methods for power system simulation
 ‘Nodal Approach’: solution to implicitness





All branches resistance ratio R=vn/in , are build into a
nodal matrix
Known term Ih=in-1+(T/2L)vn-1 are built into a vector I
For all nodes, a global matrix of admittance is built: YV=I
Nodal voltages are found by solving this matrix problem,
either by direct inversion or LU decomposition.
Re-solving of Y required if a switch change position
Y
2
V=
I
3
R
-R
Ih
-R
4
R
-Ih
Stiff solvers methods for power system simulation
 State-Space approach

We can also find the exact state-space solution
x  Ak x  Bk u



y  Ck x  Dk u
With k, matrix set index for switch permutations
This can be discretized with the trapezoidal method like
in SimPowerSystems for Simulink

Trapezoidal method: order 2.
It can also be discretized by higher order methods

Higher order methods (order 5) implemented in
ARTEMiS, a solver package of eMEGAsim.
Stiff solvers methods for power system simulation
 State-Space approach

Continuous time state-space expression x  Ak x  Bk u

Solution for time step T:
xn1  e
AT
t
xn  
t T
e A( t  ) Bu( )d
How to compute the ‘matrix exponential’ eAT ?

Trapezoidal method (order 2)

ARTEMiS art5 method (order 5)
e AT
TALYOR
EXPENSION
e
AT
e
AT
I  AT / 2

I  AT / 2
I  52 AT  201 ( AT ) 2

I  53 AT  203 ( AT ) 2  601 ( AT )3
AT AT 2 AT 3 AT 4 AT 5
AT n
I




 ... 
...
1!
2!
3!
4!
5!
n!
Effect of higher order discretization
Simple case of RLC circuit energization
Artemis ART5 solver
more precise than
Trapezoidal solver at
100 us
Numerical stability issues

Discretized systems is not guarantied to be stable


It depends on how Laplace poles are ‘mapped’ in the z
domain. Ex: Forward Euler has poor stability
A-stability (Stiff stability) (ex: trapeze method) guaranty
discrete stability (for linear systems)
Laplace pole (s) mapping
Im{l}
Trapeze
Stability Region
-2/T
Forward Euler
Stability Region
RLC network Euler
T=0.01µs
Trapeze
T=100µs
y’=ly
Re{l}
Numerical stability issues with trapezoidal integration

Even if it is stable, the
trapezoidal rule (tustin) is
prone to numerical oscillations

The z-domain mapping is stable
but oscillatory for high
frequency Laplace poles
Numerical stability issues with trapezoidal integration

A-stable methods can be highly oscillatory
How are mapped high frequency poles?

It depends on the ‘stability function’ again
ARTEMiS art5 (L-stable)
Trapeze (A-stable)
2
2
1
I

AT

(
AT
)
I  AT / 2
5
20
lim AT 
0
lim AT 
 1
2
3
3
3
1
I  5 AT  20 ( AT )  60 ( AT )
I  AT / 2

Laplace map
Im{l}
y’=ly
Z- domain map
Im{z}
y(n+1)=zy(n)
Re{l}
Re{z}
-1
z mapping near -1
means oscillations
Other solver methods for power system simulation
 Switching function approach




A special solver method for power electronic system
using high-frequency PWM.
It is a ‘simple’ controlled voltage source!
Interpolation methods are used to obtain high accuracy
in the Opal-RT RTeDRIVE package
High impedance mode can be implemented now.
V+
~V+
Gup
V_load
V_load
~0
Load
Glow
1
gate
0
*
*
Gup
*
Glow
* V_load for positive I_load
Interpolated switching functions: example case 1
Motor Current [A]
Japan, 2004
ARTEMiS used for rectifier side
RTeDRIVE used for inverter
HIL Simulation
20
10
0
PWM
2.25kHz
-10
-20
0
0.003
0.006
0.009
Physical System
20
Motor Current [A]
Mitsubishi Electric Co
0.012
10
0
-10
-20
0
0.003
CPU 1: (Ts= 80 us)
CPU 2: (Ts= 10 us)
© Opal-RT © Opal-RT
x6
S
x6
(Fpwm =9 kHz)
IGBT
pulses
Currents
Quadrature
encoder signals
10
0
PWM
4.5kHz
-10
-20
External controller (sampling rate =55 s)
Motor Current [A]
N
0
0.003
0.006
0.009
0.012
MITSUBISHI
0
-10
-20
0
0.003
0.006
0.009
0.012
0.009
0.012
Time [sec]
20
Motor Current [A]
0.012
10
Time [sec]
20
10
0
PWM
9kHz
-10
-20
0.009
20
20
Motor Current [A]
PWM
inverter
permanent
magnet motor Tload
Motor Current [A]
3-phase
diode
source
rectifier
reactor
0.006
Time [sec]
Time [sec]
0
0.003
0.006
Time [sec]
0.009
0.012
10
0
-10
-20
0
0.003
0.006
Time [sec]
40
Interpolated switching functions: how high can you get?
3-level STATCOM with 72 IGBT (Mitsubishi Electric)



20 µs, 3 CPU with the controller
1000 time faster than conventional
simulation software
Actual diode/IGBT count: 10*6*3=180
Reference model
In EMTP/RV (3us)
vs Simulink/SPS/ RT-LAB (50 us)
IPST 2009, Kyoto - Japan
41
Simulation On Chip (FPGA)

RT-LAB XSG permits to use Xilinx System Generator
models inside RT-LAB frame work

Enables complex model to run on the FPGA of RT-LAB
Examples:

PMSM motor

IGBT inverter,

PWM modulator

Power electronics
Simulation On Chip (FPGA)

No need to know VHDL language


But you need to know fixed-point arithmetic
Stiffness problem is resolved because of the
very small time step used (10 nanoseconds)!
A typical XSG model in RT-LAB
Simulation On Chip (FPGA) Example: PMSM Drive
[ L]1  (Vabc 
d abc
 RIabc )dt  I abc
dt
Inductance and torque
data pre-computed from
(Intel/AMD)
JMAG software
CPU


Inverter and PMSM
equation solved in FPGA
iabc
IGBT inverter
Back-EMF stored in the
FPGA also
PMSM
L-1 (,iabc)
rotor
Inductance
PMSM
N


Inductance computed in
CPU of the RT-LAB
system at slower rate
(40 µs)
Torque is computed on
CPU at 40 µs also. This
is fine because it is used
to compute mechanical
equations anyway.
FPGA
S
(Op5130)
rotor
vbackEMF
6
I/Os
iabc
BackEMF=f()
(JMAG pre-computed)
Digital Input (10 ns)
Analog Output
Digital Out
(IGBT gates)
(Iabc, resolver)
(quad encoder)
Controller under test
*C. Dufour et al. “Real-Time Simulation of Finite-Element Analysis Permanent Magnet Synchronous Machine Drives
on a FPGA card”, Proceedings of 2007 European Conference on Power Electronics and Applications (EPE-07) ,
Aalborg, Danemark , Sept 2007
Advanced solvers: State-Space Nodal (SSN) approach
For all user-defined groups or subsystems.
one state-space equation is found
with some unknown entries, the NODAL voltage
For all nodes
, Thevenin/Norton equivalent are computed
Then the unknown nodal voltage are found
45
Advanced solvers: State-Space Nodal (SSN) approach
Advantages of the SSN
approach



Fewer state-space iterations
Fewer switches per
subsystems: precalculation
is easier, which is important
in RT-simulation
Possibility to make parallel
computation of the statespace groups in SSN
Some similarities with


MATE (J. Marti)
GENE (K. Strunz)

Brk1
State space method
with x states
xn+1=
Ak
Bk
xn +
Brk0

U_no


Brk0

un+1 k=1...64
Brk1
SSN method:2 groups
with x/2 states each
xn+1=
A1m
0
0
A2n
xn +
I_non+1= Y 3,3
B1m
0
0
B2n
u_non+1
m=1...8
un+1
n=1...8
Advanced solvers: State-Space Nodal (SSN) approach
Small distribution system for breaker test coordination with:
short pi line and 22 equivalent switches
PERFECT MATCH WITH SPS
ADVANTAGES
 NO DELAY between
subsystem solution
 Large number of switches
allowed
IN DEVELOPPEMENT
 Algorithm is tested in the the
SPS environement using mfile S-function
 Currently ported to ‘C’
47
Advanced solvers: State-Space Nodal (SSN) approach
 Open question

Is the SSN approach extendable to phasortype (Transient Stability) simulation like
MATE-type methods?
48
Disadvantages
Advantages
Comparison of solver methods
Nodal
State-Space
(Real-Time
case)
SSN
Switching
function
FPGA
-Switch
management is
easier in RT
application than
SS.
-Higher order
solution
possible: more
precise
-High order
solution.
- Switch mngt
like nodal.
-Possible to
optimize
calculation with
groups choices
-Very Rapid
-Very high
number of
switch can
be handle
- Very
precise
-Most Rapid
- Basic Euler
solver can
be use
because
sample time
is so low.
-Order 2 method
only
- Risk of
numerical
oscillations when
state
dependence is
present.
-Possible
memory
problems in
RT if too
many coupled
switches are
present
-Delay with
the rest of
the
simulated
(usually
degligeable)
- More
difficult to
implement
because
Fixed Point
is less
common
49
About the necessity for testing
 Test sequencer
50
Test sequencer: a key part of real-time simulator
 Test sequencer requirement
 Capability to launch test automatically
 Capability to record and analyze data
 Capability to manage models
51
Test sequencer: a key part of real-time simulator
 Usage case: controller correlation testing
 Today’s controllers are real piece of software



Control algorithm may be less than 10% of the code
90% remaining: protections, diagnostics, user interface, etc…
Each time the controller code is updated we
need to verify its basic functionality are still
working



Done by automated tests
With a digital plant, correlation is easy to determine
Using random (Monte-Carlo) techniques to find worst cases
52
Test sequencer: a key part of real-time simulator
 Usage case: Monte-Carlo testing
 How to dimension correctly some power system
component considering switching surges?
ENTERGY POWER GRID
86 3-ph. busses
86 lines
23 loads
7-CPU simulation @ 50µs
Bus B17 3-phase-fault
53
Test sequencer: a key part of real-time simulator

By making automated randomized tests (MonteCarlo), we can obtain probabilistic characteristics
of overvoltages.
54
Test Automation with Python, ‘C’ or TestStand
 API of RT-LAB enable control by different
software or methods
Initialize Test Variables
Write
To File
p > Plen
p <= Plen
n++
d++
s > Slen
Concatenate
Test Data
Done
Done
Apply
100 ms delay
FOR
p <= Plen
n++
p++
d <= Dlen
FOR
S <= Slen
s <= Slen
RANDOMIZE?
YES
FOR
d <= Dlen
Launch Test
Delay
ended
NO
n++
s++
Create
random data
Initialize loop
Variables
LOOP
on delay
55
How to use RT-LAB for power system applications?




1- Design your model in Simulink
and SimPowerSystems
2- Identify natural delay in your
model (ex: transmission lines)
3- Make top-level groups in your
Simulink model, these will be
assigned to different CPUs of the
simulator
4- Add I/O block in the model if
necessary
56
How to use RT-LAB for power system applications?

1- Design your model in Simulink and SimPowerSystems

We choose here a SPS demo named: power_PSS.mdl
57
How to use RT-LAB for power system applications?

2- Identify power line to make parallel distributed simulation
58
How to use RT-LAB for power system applications?

3- Choose a task separation and make Subsystems
CPU #1
CPU #2
59
How to use RT-LAB for power system applications?

4- Some optimizations: put controllers in a separate CPU
because it can run at slower rate

Also put monitoring in a separate subsystem
Controls
Monitoring
60
How to use RT-LAB for power system applications?
You can put your own ‘C’ code in any of the cores
 You just have to use a S-function ‘wrapper’

int main()
{
printf("hello, world");
printf(“I want to do real-time simulations");
return 0;
}
61
How to use RT-LAB for power system applications?

5- Adding I/Os

Let’s add an analog output from the RT-LAB library
62
How to use RT-LAB for power system applications?

Let’s output the Alternator Excitation voltage
63
How to use RT-LAB for power system applications?

The alternator excitation voltage can now be read on the
front panel of the simulator
64
How to use RT-LAB for power system applications?


Most commercial I/O
cards can be supported
Opal can supply the
source code of
communication driver
examples to enable users
to implement their own
protocols through
Ethernet for Internet

Ex: Vestas proprietary
protocol for wind farm
communication,
LoadRunner.
65
Other examples of power systems in real-time

86 3-ph. Busses 86 lines, 23 loads
 7-CPU simulation @ 50µs
66
eMEGAsim 24-CPU 330-Bus power system
7B11
1B11
1B12
1B1
1B4
1B13
2M1
1B8
1B7
1M1
2B2
1B14
2B3
2B12
1B15
7B13
7B3
2B1
7B5
7B6
7B16
3B1
3M3
3B2
9B2
9B1
7B14
9M3
1M10
8B6
9B3
3B5
3B9
3M4
9B5
9M4
5B11
5B10
6B12
6B11
9M11
6B13
9B13
9B12
12B13
12B12
9B16
8M10
6B15
12B15
6B14
12B14
11M10
12B11
12B16
15B12
18B13
18B12
6B6
6B7
14M10
17M10
11B11
6M4
12B6
12M4
17B11
18M11
17B10
11B16
11B9
12B9
18B6
18M4
17B16
17B9
18B9
18B5
18B8
11B15
12B7
12B3
10M10
12B4
6B4
18B16
18B10
12B5
6B3
4M10
18B11
11B10
12B8
5B6
15B16
18B14
6B8
11B6
11B8
11B5
18B7
18B3
11B7
16M10
18B4
# of bus
17B6
17B15
17B5
330
11B14
5B14
6M3
4B9
5B13
5B3
4B14
6B1
6B2
4M1
5M1
4B5
10B9
11B13
10B16
4B16
4B15
4B6
12M3
12B1
10B10
5B1
4B7
12B2
4B10
10B2
4B2
4B13
4B4
4B1
4B12
4B11
10B5
10B6
10B7
10B11
10B13
17B13
16B16
16B15
16B14
# of gen.
42(+1)
16B3
11M1
16B5
16B2
16B6
16B7
16B8
17M1
16B13
16B4
16B1
16B11
PLANT
17B3
17B1
10B8
10B12
17B2
17B12
16M1
BUS
TRANSFORMER
16B9
16B10
11B3
10B4
10B1
18M3
18B1
11B2
11B12
10B15 10B14
11B1
10B3
17B7
17B4
18B2
10M1
4B3
17B8
17B14
11B
4
5B4
500KVHVAC
15B13
18B15
12M11
5B15
14B10
14B11
12B10
6B9
15M11
9M15
6B5
5B5
15B11
8B10
8B11
15B15
6M11
5B9
14B16
14B9
15B10
6B10
5B16
14B7
15B9
15B6
15B14
9B11
3M15
5M10
14B8
14B15
15B5
15M4
8B16
8B9
9B15
3B13
3B12
14B5
15B7
9B10
3B11
3B16
6B16
15B3
15B8
2B11
2M10
14B14
14B6
13M10
8B7
9B9
9B14
3B14
3B15
LOAD
15M3
15B4
8B8
8B15
9B6
3B6
3M11
2B10
4B8
13B9
14B4
8B5
9B7
3B10
5B12
15B1
14B2
14B3
14B12
14B13
13B10
9B8
2B9
5B2
13B16
8B12
15B2
7M10
9B4
3B4
3B3
3B7
2B16
5B8
13B15 13B14
8B14
2B6
2B5
2B15
13B8
13B7
8B4
3B8
5B7
13B6
14B1
8B2
8B3
2B14
2B8
13B5
14M1
13M1
7B9
2B4
2B7
7B8
7B7
8B13
7B10
1B10
1B9
13B13
13B3
8B1
7B15
13B4
13B2
8M1
7M1
1B16
2B13
13B12
13B1
7B4
7B2
1B3
1B5
1B6
13B11
7B12
7B1
1B2
16B12
# of load
90
# of DPL
517
System Diagram
New MILESTONE as of JUNE 2009
67
Example 3 – Industrial Motor Drives
Multi Level Inverter Drive
CONVERTEAM-ALSTOM
(France)
RT-LAB Electric Drive Simulator
12-PULSE
RECTIFIER
3-LEVEL NEUTRAL CLAMPED
BRIDGE
dV/dt
FILTER
HV
NETWORK
INDUCTION MOTOR
12MW-6600V
M
~
3~
PEC CONTROLLER
~
PRECHARGE
LV NETWORK
line voltage wave form
1200V
This Controller is connected
Externally to the Simulator
68
Example 3 – Industrial Motor Drives
Multi Level Inverter Drive
CONVERTEAM-ALSTOM (France)
12-PULSE
RECTIFIER
3-LEVEL NEUTRAL CLAMPED
BRIDGE

dV/dt
FILTER
HV
NETWORK
INDUCTION MOTOR
12MW-6600V
M
~
3~

PEC CONTROLLER
~
PRECHARGE
LV NETWORK
Pulse shutdown modeled
with the help of Converteam
Required the design of an
hybrid switching-function
with high-impedance
capability
Results of Hardware-In-the-Loop Tests
Motor Acceleration
Emergency Pulse shutdown
69
Example 4 – Wind-Turbines


10 Doubly-Fed induction machine with controllers (detailed models)
Simulation controlled from RT-LAB TestDrive interface (Lab-View based)
70
Other examples (RT-simulation on 2-cores)
48-Pulse STATCOM
compensated network (27 us)
SVC system (15 us)
735 kV
16 kV
BUS1
735kV
6000 MVA
Reference
voltage
BUS3
200 km Line
333MVA
X=15%
+
Voltage
regulator
BUS2
Synchro
500kV 60 Hz
8500 MVA
24
To thyristors
TCR
109 Mvar
TSC1
94 Mvar
TSC2
94 Mvar
300 MW
TSC3
94 Mvar
75 km Line
180 km Line
500kV 60 Hz
9000 MVA
200 MW
STATCOM
500kV 60 Hz
6500 MVA
Kundur system (18 us)
25 km line
P= 413MW
12 pulse HVDC system (15 us)
25 km line
M3
M1
0.5 H smoothing
reactor (Q=150)
R= 1 ohms
0.5 H smoothing
reactor (Q=150)
R= 1 ohms
Line (300 km)
220 km line
1200 MVA
Z=0.25 pu
Fault
12-pulse
thyristor
rectifier
Turbine and
excitation controls
Turbine and
excitation controls
1200 MVA
Z=0.24 pu
12-pulse
thyristor
inverter
Z
220 km line
500kV 60 Hz
M4
M2
AC filters (600 MVars)
Turbine and
excitation controls
Load: 967 MW
Filter and
compensators
Load: 1767 MW
Rectifier
controls &
protection
Inverter
controls &
protection
Turbine and
excitation controls
All measures in shared-memory mode on Opteron
345kV 50 Hz
5000 MVA nom.
AC filters (600 MVars)
Key References

University of Alberta Power Systems Laboratory
based on RT-LAB


Hardware-In-The-Loop Testing of Motor Drive
at Mitsubishi Electric Co.


M. Harakawa, H. Yamasaki, T. Nagano, S. Abourida, C. Dufour and J.
Bélanger, “Real-Time Simulation of a Complete PMSM Drive at 10 us Time
Step”, Proceedings of the 2005 International Power Electronics Conference
(IPEC 2005) – April 4-8, 2005 , Niigata, Japan.
More about ARTEMiS solvers and power grid RT-simulation


L.-F. Pak, O. Faruque, X. Nie, V. Dinavahi, “A Versatile Cluster-Based
Real-Time Digital Simulator for Power Engineering Research”, IEEE
Transactions on Power Systems, Vol. 21, No. 2, pp. 455-465, May 2006.
C. Dufour, S. Abourida, J. Bélanger,V. Lapointe, “InfiniBand-Based RealTime Simulation of HVDC, STATCOM, and SVC Devices with CommercialOff-The-Shelf PCs and FPGAs”, 32nd Annual Conference of the IEEE
Industrial Electronics Society (IECON-06), Paris, France, Nov. 7-10, 2006
RT-LAB application booklet with over 30 applications explained
from motor drives to large power systems.
Opal-RT Partial Customer List
Opal-RT Technologies
2006.09.28
74
Opal-RT - Partial «Electrical» Customer List for Power
Electronics in Hybrid Vehicles and Industrial Systems
Rail
Ford
R&D
75
Thank you for your attention!
See www.opal-rt.com for more details
or email me at:
[email protected]
76