BaBar radiation monitoring upgrade

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Transcript BaBar radiation monitoring upgrade

BaBar Silicon Vertex Tracker
Status and Prospects
Adam Cunha
UC Santa Barbara
for the BaBar SVT Group
7 November 2005
Vertex2005, Nikko, Japan
[email protected]
Outline
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Overview of BaBar
Overview of Silicon Vertex Tracker (SVT)
Recent SVT issues and solutions
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Pedestal shift
Leakage current increase in outer layers
Impact of possible chip loss
SVT performance projections
Conclusion
Adam Cunha
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The BaBar Experiment
Scientific Objective


Study CP violation in B meson decays.
Over-constrain CKM quark mixing matrix.
J/ψ
B0
e-
e+
µ+
µ-
Reconstruct CP
state
π+
π-
KS
B0
Boosted Υ(4S)
Δz=(βγc)Δt
SVT Performance Requirements

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Determine time
between decays
from vertices
-
K
lslow pion
Δz resolution < 130 µm (average Δz for B0 decays = 280µm).
Single vertex resolution < 80 µm.
Stand-alone tracking for pT < 100 MeV/c with 80-90% efficiency.
Adam Cunha
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The BaBar Detector
SLAC: PEPII Collider
Electromagnetic Calorimeter
6580 CsI crystals
e+ ID, p0 and g reco
Instrumented Flux Return
19 layers of RPCs (LSTs)
m+ and KL ID
Cherenkov Detector
(DIRC)
144 quartz bars
K,p separation
e+ [3.1 GeV]
Drift Chamber
40 layers
Tracking + dE/dx
e- [9 GeV]
Silicon Vertex
Tracker
5 layers of double
sided silicon strips
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The BaBar SVT
 5 Layers of double-sided, AC-coupled silicon
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0.94 m2 of Si
Φ and z strips
Inner 3: Precision Vertexing
Outer 2: Pattern recognition, Low Pt tracking
Magnet
 Custom rad-hard readout IC (the AToM chip).
 Low-mass design (Kevlar/carbon fiber mechanical support)
Adam Cunha
Be Beam
Pipe
5
SVT Modules
z-side
upilex fanout
φ-side
Layer 1
Layer 2
Layer 3
Layer 4
Layer 5
min radius
3.2 cm
4.0 cm
5.4 cm
12.4 cm
14.0 cm
modules
6
6
6
16
18
52
Si wafers
6x4=24
6x4=24
6x6=36
16x7=112
18x8=144
340
readout pitch
(φ)
50 µm
55 µm
55 µm
100 µm
100 µm
readout pitch
(Z)
100 µm
100 µm
100 µm
210 µm
210 µm
readout chips
144
192
240
256
288
1120
channels
18432
32768
36864
~140k
24576 Adam
30720
Cunha
Total
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HDI Board
HDI Readout Board
Berg
AToM Chip
Connector
 A Time over Threshold Machine
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Time Over Threshold Readout
128 Channels per chip
Simultaneous
 Acquisition
 Digitization
 Read-out
Internal charge injection for
calibration
Mounting
Buttons
AToM
Chips
Upilex
Fanout
Adam Cunha
AToM Chip
5.7 mm

8.3 mm
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Inside the AToM Chip
Digitization pipeline of single channel
Si
15 MHz
PRE
AMP
Shaper
CAL DAC
CINJ
Comp
Thresh
DAC
Revolving
Buffer
193 Bins
TOT Counter
Time Stamp
Buffer
Event Time
Event Number
Buffer
Sparsification
Readout Buffer
Chan #
CAC
Serial
Data Out
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Radiation Monitoring (SVTRAD)
Purpose
• Monitor accumulated dose
• Protect against too high dose rates:
• Acute damage threshold: 1 krad/ms
• Chronic (10min) threshold: 50 mrad/s
Specifications
• Reverse-biased (50V) Si PIN diodes.
• Active area 1cm x 1cm x 300µm
• 2 rings (FWD/BWD) of 6 diodes
• Near Layer-1 SVT electronics
Cross-section view of SVT
Details
• DC coupled readout monitors total (leakage
+ radiation) current
• Large leakage current subtraction with
temperature corrections (thermistors)
• Trigger beam dump when acute/chronic
dose rate exceeds maximum
• + 2 CVD Diamonds (new)
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SVT Performance and
Bugeted Radiation Damage
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SVT Performance
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Average hit efficiency 97%
Slow pion efficiency 70% for PT>50 MeV
Average zed hit resolution 10 - 40 μm
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(Track-angle dependent)
No radiation-induced change in performance
observed so far.
z side
Z Resolution (μm)

Phi side
Adam
Adam Cunha
Cunha
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Expected Damage to Electronics
G.C., A.Perazzo
Gain
decrease ~ 4%/Mrad
Radiation tests were performed on
the AToM chip in 2001
using 60Co sources at SLAC and
using 60Co sources at LBL.
(Also tests at Elettra, mentioned later)
Noise
1 Mrad
increase ~ 16%/Mrad
4 Mrad
Dose (Mrad)
In the real system, the gain
decreases by ~5%/Mrad,
noise increases by 15-20%/Mrad
Exactly the same numbers we
found with the 60Co
No digital failure observed up to 5 MRads
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Signal to Noise Projections
SVT layer-1 Signal/Noise
Noise (ENC)
Total S/N
20
4000
Total Noise
3000
15
2000
10
ATOM noise
1000
Signal/Noise
25
5000
Limit: S/N=10
5
Shot noise
0
0
0
2.5
5
7.5
10
Dose (Mrad)
S/N Limit of 10  Radiation budget:
5 Mrad
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Unexpected Phenomenon
Adam Cunha
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Unexpected Phenomenon:
Pedestal Shift
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Noise pedestal (Threshold offset) started to increase
Behavior associated with AToM chip location, not with
strip location
Why problem? One pedestal setting per AToM chip
Threshold offset (counts)
Pedestal
HDI Card in horizontal plane
Chip 4
Channel
20 threshold DACs = 1fC
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Pedestal Shift (cont.)
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Sets in at an integrated radiation dose of 1 Mrad
Correlated with most irradiated channel (note highly
non-uniform: peaked sharply in the horizontal plane).
Effect reproduced at Elettra (test beam at Trieste, Italy)
Threshold offset (counts)
1 Mrad
2 Mrad
AToM Chip
narrow e- beam
Groups of 8 channels
Delta Threshold (counts)
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Effect reproduced @ Elettra
Integrated Radiation
Pedestal recovers
Channel
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Pedestal Shift (cont.)
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Cause: Uneven radiation above 1 Mrad leads to
asymmetry in AToM chip electronics
Solution: Adjust threshold by chip is successful
Make threshold adjustment…
Layer 2 Module 4
Layer 2 Module 4
…recover
efficiency.
Adam Cunha
10%
inefficiency
level
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Unexpected Phenomenon 2
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Unexpected Phenomenon:
Leakage Current Increase

Apr
May
Jun
ILeak (mA)
300uA

10uA
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Days in 2004
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Since May 2004 an
anomalous increase in the
bias current for some
modules has been
observed
Only Layer-4 modules:
not a simple radiation
damage effect
No geometrical correlation
Consequences:
increasing occupancies
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Leakage Current Increase
Decrease in
leakage current
No beams
Beams play a role in
leakage current increase
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Leakage Current Increase
Leakage Current
If we vary the reference potential
of the metal strips (see next slide)
it leads to a decrease in the
leakage current
“Phenomenon is reference-voltage
dependent”
Jan 24
Jan 25
Time
More humidity helps to
stop the effect
“Humidity plays a role”
0
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2
Time (hrs)21
Leakage Current Increase
-20V
+20V
-20V
E
+20V
Hypothesis:
Accumulation of static charge on the silicon
surface. The charge is beam-induced drifts
because of the field between the facing sides
of different layers.
ILeak (mA)
DVL5-L4=+40V
By varying the potential drop
across the air between the
layers we can control the
effect
1800
Adam Cunha
0000
0600
1200
Time (hrs)
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Leakage Current Increase
Static charge on passivated surface
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Charge accumulation
causes an increase in
the electric field at
junction edge, inducing
a soft junction
breakdown.
Charge accumulation
due to trickle injection
 SVT bias always on.
+++++++++++++++++++++++++++++++++
Passivation
Metal
Silicon Dioxide
p+ implant
n- substrate
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Leakage Current Increase
Using humid air and a new
reference voltage setting, the
situation now is under control
Increased Humidity
180 μA
100 μA
1 June 05 - 1 July 05
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SVT Status & Future Prospects
Adam Cunha
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Current SVT Status
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95% of detector is fully functional:
 6 out of 208 readout sections not working
 300 p-stop shorts/pinholes (mainly from before 2001)
 2% unbonded or otherwise dead channels
 Redundancy proven to be sufficient
Backward
Forward
short
2 chips
masked
Both noisy
Adam Cunha
short
Faulty AToM
Chips
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Radiation Dose History & Future
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Dose Projections:
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Midplane modules will reach 5 Mrad
budget in 2008
Top & Bottom modules will reach
1 Mrad in 2006 – pedestal shift
Midplane Modules
Bottom Modules
Radiation Budget
Pedestal Shift
`00
`02
`04
`06
`08
Date
`00
`02
Adam Cunha
`04
`06
`08
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Impact of Losing Chips on Physics
Set E = 2 midplane chips OFF
in L1& 2
(1/9 of L1/2 readout)
B J/Y Ks
Efficiency (%)
35.3%
34.5%
Scenarios with up
to all mid-plane L12 modules OFF:
(UNREALISTIC)
Soft p
56%
51%
However, no loss of Δz precision!
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Conclusions

SVT has been successfully operated in BaBar since 1999
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Effects of radiation damage
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Pedestal shift effect solved using bimonthly threshold optimization
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Electronics noise/gain degradation limits detector lifetime
Rapid leakage current increase was alarming, but has been
mostly reversed
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Adjustable reference voltages implemented
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Increased humidity levels also help charge dissipation
Physics performance only slightly reduced in any realistic
damage scenario.
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The End
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Extra Slides
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Schematic of Signal Readout
 HDI: High Density Interconnect.
Mounting fixture and cooling for readout ICs.
 Kapton Tail: Flexible multi-layer circuit.
Power, clock, commands, and data.
 Matching Card: Connects dissimilar cables.
Impedance matching (passive).
 HDI Link: Reference signals to HDI digital common.
 DAQ Link: Multiplex control, demultiplex data.
Electrical -- optical conversion.
Inside detector
Si Wafers
Front
Cables
Power
Supplies
Back
Cables
MUX
Power
HDI
Link
Matching
Card
HDI
Kapton
Tail
DAQ
Link
Fiber Optic
to DAQ
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Pedestal Shift Onset
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Trickle Injection
Fill & Coast;
Ramp down SVT
during each injection
Lumi
Trickle Injection!
(began March 2004)
SVT biased all the time
LER
HER
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Occupancy Projections
Predicted from
background studies at
various beam currents &
luminosities.
Note: Electronics noise (e.g. AToM pedestal level) NOT included
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