Transcript Training

8051 Assembly Language
ECE 611 Microprocessor Systems
Dr. Roger L. Haggard, Associate Professor
Department of Electrical and Computer Engineering
Tennessee Technological University
Spring 1998
RLH - Spring 1998
ECE 611 A8051 - 1
Outline
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8051 Programmer’s Model
Addressing Modes
Data Movement Instructions
Arithmetic Instructions
Logical Instructions
Shift Instructions
Bit Manipulation
Program Control Instructions
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ECE 611 A8051 - 2
8051 Introduction
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8 bit Data bus, 16 bit Address bus
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Many Special Function Registers (SFRs) for control and I/O
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ECE 611 A8051 - 3
8051 Code Example
Dat
Wait
Myword
Start:
ORG 440h
DB 0FFh
; in Program Memory
EQU 35
DW 1234h ;in Program Memory
ORG 0
MOV A,#2Ch ; Acc 2C
INC R2
; R2
R2+1
SETB P0.7
; Port 0 Bit 7
1
ADD A,Wait ; A Acc + M(35)
DEC @R0
; M(R0)
M(R0) - 1
LJUMP Finished ; PC Finished
Finished :
General Format
Label:
Opcode dest,src ; Comments
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ECE 611 A8051 - 4
8051 Programmer’s Model (1)
Program Memory
7
0
7
FFFF
FFFF
60 K
External
1000
0
• All instructions
• Constant Data
64 K
External
OR
(Using MOVC)
0FFF
4K
0000 Internal
0000
if EA = HI
if EA = LO
Data Memory
FF
80
7F
SFRs
AND FFFF
64 K
External
RAM
(Using MOVX)
@R
@DPTR
00
Internal
Direct , Register,
Reg. Indirect
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Direct
0000
ECE 611 A8051 - 5
SFRs
8051 Programmer’s Model (2)
SFRs
A8
* IE
Interrupt Enable Ctr 1
FF
A0
* P2
Port 2
F0
*B
Serial Data Buffer
Serial Control
E0
* ACC
99
98
SBUF
* SCON
90
* P1
Port 1
D0
* PSW
8D
8C
8B
8A
89
88
87
* TH1
* TH0
* TL1
* TL0
TMOD
* TCEN
PCON
timer 1 High
timer 0 High
timer 1 Low
timer 0 Low
timer/counter Mode
timer/counter control
Power Control
B8
* IP
7F
Scratch Pad Area
RAM
30
B0
* P3
Bit Addressable RAM
20
18
83
82
81
80
DPH
DPL
SP
* P0
Data pointer DPTR
Stack pointer
Port 0
10
08
00
Bank 3
Bank 2
Bank 1
Bank 0
Bit #00
20.0
R7
R0
R7
R0
R7
R0
R7
R0
7F OR
2F.7
Select Bank
with
PSW.4 , .3 =
RS1, RS0
* = Bit Addressable
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ECE 611 A8051 - 6
8051 Addressing Modes (1)
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Immediate - # Label or Number
MOV R6,#14
; R6
14 10
MOV A,#0CAh
; Acc
CA 16
MOV DPTR,#loc
; DPTR
value of symbol “loc”
Direct - Label or Number
MOV PSW,R5
; M(PSW)
R5
MOV A,045h
; Acc
M(45 10)
Register - Rn
MOV R1,A
MOV B,R3
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; R1
;B
Acc
R3
ECE 611 A8051 - 7
8051 Addressing Modes (2)
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Register Indirect - @R0, @R1, @DPTR
MOV @R0,#250 ; M(R0)
250 10
MOV
A,@R1
;A
M(R1)
MOVX @DPTR,A ; External data M(DPTR)
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Register Indirect Indexed - @A+DPTR, @A+PC
MOVC A,@A+DPTR ; A
ROM(A+DPTR)
MOVC A,@A+PC ; A
ROM(A+PC)
JMP
@A+DPTR ; PC
(A+DPTR)
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Bit - bit number or label.bit or bit label
MOV C,IE.0
; cy
bit 0 of IE reg (EX0)
MOV C,EX0
; same
SETB 07Fh
; Bit 7F
1
SETB 2F.7
; same
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A
ECE 611 A8051 - 8
8051 Instructions
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Instruction Classes
–
–
–
–
–
–
Data Movement
Arithmetic
Logical
Shift
Bit Manipulation
Program Control
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ECE 611 A8051 - 9
8051 Data Movement - 1
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MOVE
MOV
MOV
MOV
MOV
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A, #
D
R
@R
R, #
D
A
D, #
D
R
@R
A
@R, #
D
A
A Immediate
A Direct
A Register
A Register Indirect
Rn
Direct
Register Indirect
ECE 611 A8051 - 10
8051 Data Movement - 2
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Move From Program Memory
MOVC
A, @A+DPTR
A, @A+PC
Move External Data RAM
MOVX
A, @R
A, @DPTR
MOVX
@R, A
@DPTR, A
Others
PUSH
D
POP
D
XCH
A, R
D
@R
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Acc Rom(A+DPTR)
Acc Rom(A+PC)
SP SP+1, m(SP) D
D m(SP), SP SP - 1
SWAP Acc Rn
ECE 611 A8051 - 11
8051 Arithmetic - 1
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Add/Subtract
ADD
A, #
D
R
@R
Acc A+Immediate
ADDC
A, #
D
R
@R
Acc A+Immediate+Carry
SUBB
A, #
D
R
@R
Acc Acc-Immediate-Carry
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ECE 611 A8051 - 12
8051 Arithmetic - 2
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Inc/Dec
INC
DEC
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Mul/Div
MUL
DIV
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A
D
R
@R
A
D
R
@R
Acc Acc+1
AB
AB
B:A
A
B
Acc Acc-1
Acc * B (unsigned)
Quo ( A/B ) (unsigned)
Rem( A/B )
ECE 611 A8051 - 13
8051 Logical
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AND,OR,XOR
AND
ORL
XRL
Other
CLR
CPL
SWAP
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A, #
D
R
@R
D, A
D, #
A
A
A
Acc 0
Acc Acc
Acc(7-4) Acc(3-0)
ECE 611 A8051 - 14
8051 Shift
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Rotates
RL
7
A
0
Acc
7
RLC
A
C
0
Acc
7
RR
0
Acc
A
7
RRC
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A
0
Acc
C
ECE 611 A8051 - 15
8051 Bit Manipulation - 1
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Clear/Set/Complement
CLR
C
bit
SETB
C
bit
CPL
C
bit
And, Or, Move
ANL
C, bit
C, /bit
ORL
C, bit
C, /bit
MOV
C, bit
bit, C
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Carry 0
bit
0
Carry Carry AND bit
Carry Carry AND bit
ECE 611 A8051 - 16
8051 Bit Manipulation - 2
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Jump
JC
label
Jump if Carry set
JNC
JB
JNB
JBC
label
bit, label
bit, label
bit, label
Jump if Carry clear
Jump if bit set
Jump if bit clear
Jump if bit set, then clear bit
label = PC relative (+ 127)
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ECE 611 A8051 - 17
8051 Program Control - 1
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Jump
AJMP
LJMP
SJMP
JMP
JZ
JNZ
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Compare and Jump
CJNE
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label-A
label-L
label
@A+DPTR
label
label
Absolute Jump- 11 bits(2K)
Long Jump - 16 bits (64K)
Short Jump
Jump Indirect PC (A+DPTR)
Jump if zero
Jump if not zero
A, #, label
A, D, label
R, #, label
@R,#, label
Compare 1st op to 2nd op and
jump to label if not Equal
ECE 611 A8051 - 18
8051 Program Control - 2
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Decrement and Jump
DJNZ
Subroutines
ACALL
LCALL
RET
RETI
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R, label
D, label
Rn = Rn-1 , Jump if not zero
label-A
label-L
Absolute Call - 11 bits (2K)
Long Call - 16 bits (64K)
Return from Subroutine
Return from ISR
PC m(SP), SP SP-2
ECE 611 A8051 - 19