Transcript Diapositive 1 - cn

BMS Business Unit Overview
Eric Marcelot
Marketing Manager
Broadband Data Converters, Microprocessors & Services
History
Phoenix Dynamo Co Ltd formed
Name changed to English
Electric Valve
GEC acquires English Electric
Name changed to EEV Ltd
UK
France
1947
1968
1988
1955
Name changed to Marconi Applied
Technologies
1999
3i and Management buy out
to found e2v technologies
2002
e2v acquires automotive security
business
e2v technologies plc floats on the
London Stock Exchange
e2v acquires Gresham Scientific
Instruments
e2v acquires Grenoble facility from
the Atmel Corporation for $140m.
e2v acquires MiCS
1978
1984
2003
1992
2004
2000
Opening of site in SaintEgrève France ( as
Sescosem)
Start of CCD activities
Becomes Thomson-CSF
Military & Space Division
Renamed ThomsonCSF Semiconducteurs
Spécifiques
Becomes Atmel Grenoble
2005
2006
Becomes e2v Grenoble
2007
Date / Ref
2
Business overview
Medical and Science
Aerospace and Defence
Commercial and Industrial
Sensors and
semiconductors
Electronic
tubes
Date / Ref
3
Revenue
Europe: Group sales £105m
Asia Pacific: Group sales £15m
Americas: Group sales £51m
Middle East & Africa: Group sales £3m
e2v group annual sales 2006/7: £174m
Date / Ref
4
Operations
 Headquartered in Chelmsford, UK
Lincoln
Chelmsford
 Additional design, development and
manufacturing facilities in Corcelles
(Switzerland), Grenoble (France),
Lincoln (UK) and High Wycombe
(UK).
 1800 employees; 600 engineers and
High Wycombe
scientists
 Sales and support offices in the USA,
Germany, France and Hong Kong
Corcelles
 Global network of distributors,
consultants and representatives
Grenoble
 ISO9001:2000, ISO/TS 16949:2002
(Lincoln and Corcelles automotive
products) and ISO14001:2004
certified (UK sites)
Date / Ref
5
History of the Grenoble facility
 1955: Opening of site in Saint-Egrève (SESCOSEM)
Manufacturing of diodes, transistors
and vacuum tube imagers
 1978: Beginning of CCD activities
 1984: Becomes Thomson-CSF
Military & Space Division
Integrated circuits for Military & Space
 1992: Renamed Thomson-CSF
Semiconducteurs Spécifiques
Specific semiconductors in CCD
and CMOS technologies
 2000: Becomes Atmel Grenoble
 August 2006: Becomes e2v semiconductors
Date / Ref
6
Advanced Imaging & Semiconductors (AIS)
Division Organization
MIEI
DASI
MSA
BMS
Medical,
Industrial &
Emerging
Imaging
Defense,
Aerospace &
Scientific
Imaging
MixedSignal
ASICs
Broadband
Data Conversion
Microprocessors
& Services
Finances - AIS & Fr
Information Technology - Fr
Supply Chain & Purchasing
Central Quality - Fr
Industrial Operations - Fr
Human Ressources - Fr
Design
Project Management - AIS
Date / Ref
7
Advanced Imaging & Semiconductors (AIS)
Revenue by Region
Europe
50%
15%
35%
Asia
North
America
Date / Ref
8
Grenoble Industrial Facilities
Wafer Fab
 Front-end
 Class 10 and 1 clean rooms
 CCD technology
 CMOS imager and
sensor post-processing
Date / Ref
9
Grenoble Industrial Facilities
Package Assembly
 #1 Hi-Rel assembly facility in Europe
 600 sq. meters, Class 100 clean room
 Die processing capability
 Screening levels up to Space-grade (QML Class V)
 Low and Medium volume (up to 1M/year)
 Hermetic ceramic packages
DIL
CPGA
CQFP
CLCC
 Flip-Chip ceramic BGA packages
CBGA
Hi-TCE CBGA
Date / Ref
10
Grenoble Industrial Facilities
Electrical Test & Screening
 Automatic Test Equipment
CCD & CMOS image sensor
 Teradyne A393, A565IH, IP750
and dedicated test-bench
Mixed & RF IC
 Teradyne A567 (x3), A585
Digital IC
 Teradyne J971, J973, Tiger
NextTest PTHF64
 Low/high temperature
handlers and probers
 EG4080/4090 probers
 Multitest, Delta design, Aseco S130
 Reliability and burn-in
Date / Ref
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Quality Roadmap
QS9000
practices
AS9100B
EN9100
JISQ9100
AQAP2110
Compliance
with
TS 16949
ISO 14001
ISO9001:2000
QML
AQAP110
Technology
Approval
ISO9001
CNES/ESA
CECC
RAQ1
MIL-STD-883
1985
1990
1995
2000
2002
2004
2006
2008
Date / Ref
12
BMS Business Unit
Broadband Data Conversion
Microprocessors
and Services
Date / Ref
13
BMS at glance
T
M
Hi-Rel Microprocessors product offer
•
•
•
Freescale upscreened Microprocessors : 68K, PowerPC G2, G3 and G4 (since 1980)
Integrated Processors and Communication Controllers : 68K and 82xx
Peripheral devices: Tundra PCI Bridge & Memory Controllers, Clock Drivers…
Added-value services and solutions
•
•
•
•
Electrical Test and Characterization over wide temperature range
Enhanced Reliability Packaging: Hi-TCE Ceramic, Column-Interposer, hermetic packages
Die Processing : High and Low temperature electrical test and screening
Long term availability : Long life time item selection and die-banking capability
Broadband Data Converter product offer
•
•
•
•
Commercial & Industrial grade data converters: 8-bit 5Gsps to 12-bit 500Msps
Military & Space grade data converters: 8-bit 1Gsps to 10-bit 2.2 Gsps
ASSPs (Application Specific Standard Product): commercial through space grades
ASICs: commercial through space grades
Date / Ref
14
Hi-Rel Microprocessors – Mission
Statement
The Hi-Rel Microprocessors Product Line of e2v delivers
a wide range of Extended Reliability Products and Services
based on PowerPC and 68K microprocessors
for Professional Electronics markets
 Host Processors and Integrated Processors
in partnership with Freescale since 1980
T
M
 System Interconnect Products
in partnership with Tundra, formal agreement signed in July 2006
 Added-Value services and solutions
Electrical Test and Characterization over wide temperature range
Enhanced Reliability Packaging: Hi-TCE Ceramic, Column-Interposer, hermetic packages
Die Processing : High and Low temperature electrical test and screening
Long term availability : Long life time item selection and die-banking capability
Companion devices Assembly & Test Services (FSRAM’s, SDRAM’s, ASIC’s,...)
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Broadband Data Converters
Broadband Data Converters - over 45 years of combined expertise
 15 data converter design engineers for custom and COTS development:

Dedicated solely to ADC, DAC and peripherals designs (no timesharing)

High speed (>500Msps to 2.2Gsps and beyond) data converter designs
(4 designs per year on average)

Peripheral devices design (HSSL, DMUX, MUX, memory, etc..)
 Over 35 patents registered in high speed high linearity data converters:

Data converter core design & architecture

Data converter T/H design

etc..
 State-of-the-art development labs for characterization of:

High speed ADC characterization

High speed DAC characterization

Temperature extremes/mechanical shock/design limits validation
Date / Ref
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Broadband Data Converters
Silicon Technology
e2v designs its ICs on a range of technologies that
are adapted to optimize the performance, flexibility
and power consumption of the device



Fully bipolar SiGe technology (Ft =200GHz) for demanding high
speed & high performance RF applications (ie. military,
instrumentation, telecom, space,…)
BiCMOS SiGe technology (Ft =120GHz) for demanding high
speed & high resolution RF applications (ie. instrumentation,
telecom, medical, …)
CMOS technology for low power & integration (ie. telecom,
medical, ..)
Date / Ref
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Broadband Data Converters
Applications
Defense :
Radar & ECW
Guided weapons
Space:
Comsat & military satellites
Terrestrial base stations
Radio antenna arrays
Test Equipment:
Digital oscilloscope
ATE (semi-conductor)
Industrial:
Telecom infrastructures
Medical imaging (MRI..)
Date / Ref
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Broadband Data Converters
Industry legacy of ‘BDC Firsts’ to market
2007
(8B 5Gsps ADC)
2005
(10B 1.2G MUXDAC)
2005
(10B 2G ADC + DMUX)
2006
(12B 500M ADC)
2003
(Dual 8B 1Gsps ADC)
2000
(8B 1Gsps ADC)
2002
2002
(10B 1.5Gsps DMUX)
(10B 2Gsps ADC)
+ over 10 custom data
converters developed and
manufactured for customers
worldwide using in-house IP
expertise
Date / Ref
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Broadband Data Converters:
Product Overview & Future Trends
14
ADC
resolution (bits)
EV12AS110
12
DAC
EV12DS130
AT84AS001
10
AT84AS003/004
TS86101G2
8
AT84AD001
AT84AD004
TS8388B EV8AQ160
AT84AS008
TS81102
6
0
.5
1
1.5
2
2.5
3
sampling frequency (Gsps)
Date / Ref
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AT84AS001TP Series
High linearity & SFDR Performance
Key Performances (at full data rate of Fs = 500Msps)
 12-bit resolution (no missing codes at 500Msps)
 1GHz full power analog bandwidth
 SFDR: 75 dBc (at Fin 250MHz)
 SFDR: 71 dBc (at Fin 500MHz)
 SNR: 62 dB (at Fin 200MHz)
 ENOB: 10 bits
 BER: 10E-14
 Power consumption: 2.4W
Availability
AT84AS001TP-EB (ADC Evaluation Board)
AT84AS001CTPY (Commercial grade EBGA192 RoHS)
AT84AS001VTPY (Industrial grade EBGA192 RoHS)
AVAILABLE
AVAILABLE
AVAILABLE
Date / Ref
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EV8AQ160CTPY
 Key Performances
 Quad ADC with 8-bit resolution (no missing codes at 5Gsps)
 1.25Gsps sampling rate in 4-channel mode
 2.5Gsps sampling rate in 2-channel mode
 5Gsps sampling rate in 1-channel mode
 4-channel mode (Fs=1.25Gsps, -1dBFs)
 ENOB: 7.5 bit, SFDR: 52dBc, SNR: 48dB (Fin:100MHz), TBC(Fin: 620MHz)
 2-channel mode (Fs=2.5Gsps, -1dBFs)
 ENOB: 7.3 bit, SFDR: 51dBc, SNR: 46dB (Fin:100MHz), TBC: (Fin:620MHz)
 1-channel mode (Fs=5Gsps, -1dBFs)
 ENOB: 7.1 bit, SFDR: 49dBc, SNR: 44dB (Fin: 100MHz), TBC: (Fin:620MHz)
 Digital Interface (SPI) with Reset signal
 channel mode selection, selectable ratio DMUX outputs, selectable input analog bandwidth
 gain, offset, phase controls, test mode, standby modes, etc…
 Double data rate output protocol, LVDS compatible
 Power consumption: 4.3W, BER: 10 e-16
 Qualification completion & production start: Q2 2008
Date / Ref
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Quad 1.25 Gsps ADC Block Diagram
Output A
Output B
+ selection + decimation
+SDA
2.5GHz
Clock
Clock Buffer
LVDS Buffers
1:1 or 1:2 DEMUX
SPI:
Serial interface
LVDS Buffers
1:1 or 1:2 DEMUX
8 bit
Gain
1.25 Gsps
Output C
LVDS Buffers
1:1 or 1:2 DEMUX
8 bit
Gain
1.25 Gsps
Output D
LVDS Buffers
1:1 or 1:2 DEMUX
8 bit
Gain
1.25 Gsps
8 bit
Gain
1.25 Gsps
ADC core
ADC core
ADC core
ADC core
T/H
T/H
T/H
T/H
Offset
Offset
Offset
Offset
Analog MUX
(Cross Point Switch)
1
2
3
4
Date / Ref
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AT84AS008GL Series
fastest 10-bit ADC available on the market
Performance
On-chip T/H, monolithic die & advanced high speed SiGe technology
10-bit resolution at 2.2Gsps sampling rate
Outstanding dynamic performance
8-bit ENOB & SFDR of 54 dBc at Fin =1.7GHz
Gain flatness of 0.5dB from DC to 1.5GHz
Spectral signature stable vs temp. AND sampling freq. to 1.9Gsps
3.3GHz full power input bandwidth (-3dB)
SFDR:
-58 dBc (1.7Gsps, Fin =850MHz) -54 dBc (2.2Gsps, Fin =2GHz)
SNR:
52 dB (1.7Gsps, Fin =850MHz) 48 dB (2.2Gsps, Fin =2GHz)
ENOB:
8 bit (1.7Gsps, Fin =850MHz)
7.4 bit ENOB (2.2Gsps, Fin =2GHz)
2-Tone IMD3: 64 dBFs (1.7Gsps, Fin =995/1005MHz)
CBGA152 package (21x21)
AT84AS008GL Series
AT84AS008GLY Series (RoHS)
AT84AS008MGS Series (military)
ADC gain & sampling delay adjust, data ready output, out of range output bit
Availability
In production, die stock available (EOL)
‘EV replacement’ version
10-bit 2.2GHz DMUX AT84CS001VTP
Same package, minor pin reassignments, 3.7W power consumption
 Prototypes: Q4 2007, production: Q3 2008
Date / Ref
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AT84AS003TP & 004TP Series
fastest 10-bit ADC & DMUX available on the market
Performance
T/H circuitry, monolithic ADC die & combined DMUX device
10-bit resolution at 1.5/2Gsps sampling rates
Outstanding dynamic performance
Full 8-bit ENOB & SFDR of 54 dBc at Fin =1.7GHz
Gain flatness of 0.5 dB from DC to 1.5GHz
Spectral signature stable vs temp. AND freq. to 1.9Gsps
3.3GHz full power input bandwidth (-3dB)
SFDR:
-55 dBc (2Gsps, Fin =1GHz)
-54 dBc (2Gsps, Fin =2GHz)
SNR:
51 dB (2Gsps, Fin =1GHz)
50 dB (2Gsps, Fin =2GHz)
ENOB:
7.8 bit (2Gsps, Fin =1GHz)
7.5 bit ENOB (2Gsps, Fin =1GHz)
2-Tone IMD: 60 dBFs (2Gsps, Fin =945/955MHz)
EBGA317 package (25x35)
AT84AS003TP Series
AT84AS004TP Series
AT84AS003TPY Series (RoHS)
AT84AS004TPY Series (RoHS)
ADC gain & sampling delay adjust, selectable 1:2/1:4 DMUX, data ready output, …
Availability In production, die stock available (EOL)
‘EV replacement’ version Same package, minor pin reassignments, 5.7W power consumption
 Prototypes: Q4 2007, production: Q3 2008
Date / Ref
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Hi-Rel Microprocessors - Applications
Defense & Aerospace
• Radars
• Electronic warfare
• Counter measures
Avionics
• Flight computers
• Flight control systems
• Voice data recorders
• Displays
• Engine control
Industrial & Communication
• Transportation Systems
• Heavy industries
• Industrial Computers
• Power plant control
Date / Ref
26
Hi-Rel Microprocessors
Applications in Commercial Avionics
Cockpit displays
Engine
control
Motor control
Flight recorders
Ordinateurs
de Bord
Flight computers
Date / Ref
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Hi-Rel Microprocessors – Offer & Roadmap
e600 High-Performance Processors
Production
PC603R
PC755
PC7410
PC7447A
PC7448
PC8641D
8641D
Samples
PC745
PC7457
PC8610
Scheduled
e500 PowerQUICC III Processors
Proposed
PC8540
PC8548
PC8572
PC85xx
e300 PowerQUICC II Processors
PC860SR
PC8245
PC8265A
PC8280
PC83xx
Legacy Products
68C000
68020
68882
68040
PC8240
Host Processor Bridges
PC8270
PC107
PC109
88915T
Serial RapidIO Switches
PC578
PC5xx
PC574
68302
68332
68EN360
Magnetoresistive RAM (MRAM)
EV2A16A
EV4A16
68C429
2007
2008
2009
Date / Ref
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Hi-Rel Microprocessors
PC603R Overview
System
Register Unit
Branch
Processing Unit
Load/Store
Unit
Integer
Unit
BASIC ARCHITECTURE “G2”
Available since mid 90’s
MMU
Data Cache
Instruction
Unit
Floating Point
Unit
MMU
Inst. Cache
Bus Interface Unit
32-bit
Address
32/64-bit
Data
System Bus
Date / Ref
29
Hi-Rel Microprocessors
PC745 and PC755 Overview
System
Register Unit
Integer
Integer
Unit
Unit
Branch
Processing Unit
Load/Store
Unit
Instruction
Unit
Floating Point
Unit
G3 Architecture issued in 2000
• L1 Cache memory size is doubled
• The bus interface allows access to
L2 Cache Memory (external)
MMU
Data Cache
MMU
Inst. Cache
Bus Interface Unit
32/64-bit
Data
32-bit
Address
System Bus
L2 Tags
L2-Cache Port
(PC755 only)
L2-Cache
Date / Ref
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Hi-Rel Microprocessors
PC7410 Overview
System
Register Unit
Integer
Integer
Unit
Unit
G4 Architecture issued in 2002
Addition of Altivec unit allows vectorial
calculation over 128 BIT
Branch
Processing Unit
Instruction
Unit
Floating Point
Unit
AltiVec
Unit
TM
Load/Store
Unit
MMU
Data Cache
MMU
Inst. Cache
Bus Interface Unit
64-bit
Data
32-bit
Address
60x / MPX Bus
L2 Tags
L2-Cache Port
L2-Cache
Date / Ref
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Hi-Rel Microprocessors
PC7448 Overview
G4+ Architecture, also known as
e600 architecture in 2006
1MB Unified L2-Cache
W/ ECC
L2 Cache is integrated on the silicon
Bus Interface Unit
32/36-bit
Address
64-bit
Data
60x / MPX Bus
Date / Ref
32
Hi-Rel Microprocessors
The Future of the PowerPC Architecture
Leveraging the SoC Platform to Manage Power
Some applications can take benefit
of thread parallelism
Requires higher performance:
• double the cores
• or double the speed ?
Both options have similar
performance but:
• Dual core is much lower
power => much better
performance / watt ratio
Date / Ref
33
Hi-Rel Microprocessors
PC8641D Preliminary* Overview
Dual-Core PowerPC processor
PC8641D
e600 Core
32KB
32KB
D-Cache I-Cache
1MB L2-cache
(ECC)
e600 Core
32KB
32KB
D-Cache I-Cache
MSS
1MB L2-cache
(ECC)
MSS
MPX Bus
16b FIFO
16b FIFO
8b FIFO 8b FIFO
8b FIFO 8b FIFO
Gigabit Gigabit
Ethernet Ethernet
Gigabit Gigabit
Ethernet Ethernet
64bit DDR/
DDRII
Controller
Queue
MPIC
MPX Coherency
Module
Queue
E600 Architecture (new name
of G4+)
Local
Bus
64bit DDR/
DDRII
Controller
• 2 cores in parallel
• Integration on
silicon of communication and
memory controllers
Perf Mon
Duart
2x I2C
Timers
SRIO
1x/4x
Or
PCI-Exp
x1/2/4/8
* Preliminary: to be finalized after silicon characterization
Date / Ref
34
PC7447A Overview
G4 Processor Core
• Superscalar PowerPC core architecture
• 7 stage pipeline
• 11 Execution units: Simple (3), Float, Complex, AltiVec (4), Branch, Load/Store
• SMP Support
• AltiVec engine enhancements: Simple, Complex, Float, Permute
Memory Subsystem
• 32KB L1 Instruction & Data Cache, 8-way set-associative
• 256-bit internal datapath between L1 and L2
• 512KB On-chip L2-Cache, running at core frequency
Compatibility
• Full G3/G4 Software compatibility
• Drop-in replacement in a PC7447 application
Performance
• Dhrystone 2.1: 2310 MIPS @ 1 GHz
• 18.3W typical power dissipation @ 1.267GHz @ 1.3V (L-Spec)
• 9.3W typical power dissipation @ 1.167GHz @ 1.1V (N-Spec)
• Enhanced Thermal Management Features:
 Ability to de-rate core voltage from 1.3V down to 1.0V
 Dynamic Frequency Switching enables software control of frequency
 Temperature Sensor Diode allows junction temperature monitoring
Technology
• 0.13µm CMOS 9LM SOI (silicon-on-insulator) process
• 1.1V core power supply (N-Spec)
• 1.8V or 2.5V I/Os power supply
• 360-ball Hi-TCE CBGA package
Availability
• Industrial and Military Temp @ 1000MHz and 1167MHz : Now
512 KB Unified L2-Cache
Bus Interface Unit
32/36-bit
Address
64-bit
Data
60x / MPX Bus
Date / Ref
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PC7448 Overview
e600 Processor Core
• Superscalar PowerPC core architecture
• 7 stage pipeline
• 11 Execution units: Simple (3), Float, Complex, AltiVec (4), Branch, Load/Store
• SMP Support
• AltiVec engine enhancements: Simple, Complex, Float, Permute
• Out-of-Order AltiVec instructions supported
Memory Subsystem
• 32KB L1 Instruction & Data Cache, 8-way set-associative
• 256-bit internal datapath between L1 and L2
• 1MB On-chip L2-Cache with ECC
Compatibility
• Software compatibility with PC744x/5x
• Drop-in replacement in a PC7447 application
• 60x / MPX Bus Interface (MPX running at 200MHz)
Performance
• Maximum Core Speed: 1250 MHz, targeting 1267MHz on Rev.D
• Power dissipation: 10W (typical) at 1250MHz
• Enhanced Thermal Management Features:
1MB Unified L2-Cache
W/ ECC
 Dynamic Frequency Switching enables software control of frequency
 Temperature Sensor Diode allows junction temperature monitoring
Technology
• 90nm CMOS 9LM SOI (silicon-on-insulator) process
• 1.0V & 1.1V core power supply
• 360-ball Hi-TCE CBGA package
Schedule
• Industrial and Military Temp @ 1000MHz and 1250MHz : Now
Bus Interface Unit
32/36-bit
Address
64-bit
Data
60x / MPX Bus
Date / Ref
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PC8610 Preliminary* Overview
Single-Core e600 processor
* Preliminary: to be finalized after silicon characterization
PC8610
e600
Core
MCP interrupt
Local Bus
32bit
256K L2
Cache
AltiVec™
Engine
MPX Bus
PIC
(Timer x4)
Queue
Features
• Single e600 core up to 1.33GHz
• AltiVec vector processor for image processing
• 256KB on-chip L2-cache
• DDR1/DDR2 controller, 64 or 32-bit, 333-533MHz
• LCD Controller, 24-bit/pixel, 60Hz refresh
• Up to SXGA 1280x1024 resolution
• 3 planes (XGA) + 1 cursor plane
• PCI-Express® x 2 ports (x1/x2/x4/x8; x1/x2/x4)
• PCI 2.2, 32-bit, 33/66 MHz
• Local bus, 32-bit, up to 133 MHz
• I2C x 2, GPIO x 32 (16 dedicated, 16 multiplexed)
• DUART x 2 x 4 channels each, 115 kb/s
• IrDA x 2 channels Fast/Serial, 4 Mb/s
• DMA x 2 x 4 channels each
• Serial peripheral interface (SPI) 4/8/16/32
• Machine Check ext interrupt
• Watchdog + 2 Global Timers
Technology
• 90nm CMOS SOI (silicon-on-insulator) process
• 0.95V core power supply
• 783-ball FC-PBGA package
Performance
• 15W max at 1066MHz, 105°C
• 11.5W max at 667MHz, 105°C
Schedule
• Samples 2Q/2008
MPX Coherency
Module
64/32b DDR/
DDR2 SDRAM
Controller
2 x DMA
4 ch each
2x I2C
SPI
WDT
UART 4ch
32x GPIO
IrDA 2ch
LCD
Controller
PCI Exp
x1/2/4/8
PCI Exp
x1/2/4
PCI
32bit
33/66MHz
Date / Ref
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PC8641D Overview
Dual-Core PowerPC processor
Features
• Dual e600 cores @ 1.25GHz
• Dual DDR2 memory controllers
• Four Gigabit Ethernet controllers
• RapidIO fabric: 1x/4x Serial RapidIO
• Dual x1/2/4/8 PCI Express
• Multiprocessor Interrupt Controller
• Local Bus
e600 Core
32KB
32KB
D-Cache I-Cache
1MB L2-cache
(ECC)
e600 Core
32KB
32KB
D-Cache I-Cache
MSS
1MB L2-cache
(ECC)
MSS
MPX Bus
MPIC
MPX Coherency
Module
16b FIFO
16b FIFO
8b FIFO 8b FIFO
8b FIFO 8b FIFO
Gigabit Gigabit
Ethernet Ethernet
Gigabit Gigabit
Ethernet Ethernet
64bit DDR/
DDRII
Controller
Queue
Local
Bus
Queue
Technology
• 90nm CMOS SOI (silicon-on-insulator) process
• 1.0V & 1.1V core power supply
• 1023-ball Hi-TCE CBGA package
PC8641D
64bit DDR/
DDRII
Controller
Performance
• Target frequency: 1250MHz
• Target Power Dissipation: 15-25W (typical)
Schedule
• Samples available Now
Perf Mon
Duart
2x I2C
Timers
SRIO
1x/4x
Or
PCI-Exp
x1/2/4/8
Date / Ref
38
PC8548 Overview
PowerQUICCIII Communication Controller
Processor Features
• e500 PowerPC core up to 1.0 GHz
• 512KB L2-cache w/ ECC
• 36-bit physical addressing
• Double precision Floating Point Unit
System Unit
• 64-bit DDR/DDR2 memory controller
• 4x 10/100/1000Mbps Ethernet Controllers
• 2x 32-bit PCI or 1x 64-bit PCI-X
• DUART, 2x I²C, Timers
Security Engine (Sec 2.1)
• ARC4, 3DES, AES, RSA/ECC
XOR, Single pass SSL/TLS
High-Speed Interfaces
• x4, x1 Serial RapidIO (20Gbps)
• Or x8, x4, x2, x1 PCI-Express (32Gbps)
• Or x4 Serial RapidIO and x4 PCI-Express (36Gbps)
Local Bus (3.3V I/O)
• 32-bit for SDRAM, Boot-Flash, Compact Flash card
Performance & Technology
• Process: 90nm CMOS on SOI
• 1.1V Core Power Supply with 3.3V/2.5V I/O
• Package: 783-balls Hi-TCE CBGA
Schedule
•
Industrial & Mil-Temp in Rev.2.0 Now
PC8548
e500 core
32K
I-Cache
Local
Bus
OpenPIC
Perf Mon
DUART
2x I2C
Timers
Security
512K
L2
32K
D-Cache
Coherency
Module
Gigabit
Gigabit
Ethernet
Gigabit
Gigabit
Ethernet
Ethernet
Ethernet
64b DDR/DDR2
SDRAM
Controller
10/100
Ethernet
32b PCI
Date / Ref
39
PC8572 Preliminary Overview
PowerQUICCIII Communication Controller
Dual e500 Power cores up to 1.5GHz
•
•
36-bit addressing
1MB Shared L2 Cache/SRAM w/ECC
Dual Memory Controller
•
•
•
Dual DDR2/3 SDRAM up to 800MHz
32/64-bit data bus w/ECC
Support for up to 32GB memory
High Speed Interconnect
•
One x8/x4/x2/x1 PCIe
Or Two x4/x2/x1 PCIe
Or One x4/x2/x1 PCIe AND Two x2/x1 PCIe
Or One x4/x2/x1 PCIe AND x4/x1 sRapidIO
Ethernet
•
•
4x 10/100/1000 Ethernet Controllers
1x 10/100 FEC w/ MII (muxed)
Security Engine (SEC 3.0)
•
•
ARC4, 3DES, AES, AES-GCM,
SHA-384/512, RSA/ECC, RNG and XOR
Single pass SSL
Pattern Matching (Reg-Ex) & Deflate
•
16k patterns up to 128, breaking across packets
Security
Accel
XOR
32kB
32kB
I-Cache D-Cache
Enhanced
Local Bus
Coherency Module
2x
Table
Lookup
Unit
4x GE MAC
1MB
L2
64b
2x DDR2/
DDR3, SDRAM
64b
Controller
e500 Core
Perf Mon,
DUART, MPIC
2x I2C, Timers
System
System
Bus Bus
10/
100
FEC
On-Chip Network
2x DMA
PCI
Express
PCI
Express
PCI
Express
Serial
RapidIO
Up to 7M lookups/sec
Performance & Technology
•
•
•
32kB
32kB
I-Cache D-Cache
Pattern
Matching
Engine
Table Lookup Unit (TLU)
•
e500 Core
4x SGMII
x8 SERDES
Process: 90nm CMOS on SOI
1.1V Core Power Supply with 3.3V/2.5V I/O
Package: 1023-balls BGA package
Schedule
• Samples 3Q-2008
* Preliminary: to be finalized after silicon characterization
Date / Ref
40
32b
PC107 Overview
PCI Bridge / Memory Controller
60x processor bus supports 66, 83 and 100MHz
Integrated 32-bit PCI
• 33 and 66 MHz PCI 2.1 interface, 5V tolerant
• Full PCI support: lock, memory coherent, sleep mode
• Master and Agent mode support
• Support for multiple 107 devices on PCI Bus
• PCI Arbiter (5 req/gnt pairs)
Integrated Memory Controller (20-100 MHz)
• DRAM (FPM, EDO), SDRAM, up to 1GB
• Separate memory data bus w/buffers for parity or ECC
• ROM/Flash ROM (up to 144MB)
Other Features
• EPIC Interrupt Controller
• Clock generation and buffering for PCI and memory
• I2C (Master and Slave mode)
• Message Unit (I2O support)
• Two-channel DMA (direct and chaining modes)
• Power management:Nap, doze, sleep and suspend
• JTAG Boundary Scan Support
• 1.4W typical power dissipation @ 100 MHz
Technology
• 0.35µm CMOS process
• 2.5V core - 2.5/3.3V I/Os supply voltages
• FC-PBGA package not qualified for Industrial & Military
• Hi-TCE package fully qualified
Availability
• Industrial and Military Temp @ 100MHz: Now
• 503-ball Hi-TCE CBGA package: Now
60x Bus
I2O
DMA
I2
C
I2C
Processor
Interface Unit
Central
Control
Unit
Data Path
ECC Controller
Memory
Memory
Controller
Memory
Add/Ctrl
Memory
DLL
IRQs
EPIC
Timers
Data
PCI
Interface Unit
ATU
Arbiter
REQ/GNT
Clocks
Clock In
PLL
FO
Buffer
PCI
Clocks
OSC
PCI Bus
Date / Ref
41
Technology
• 33x33mm Flip-Chip Plastic BGA package
• 33x33mm Flip-Chip Hi-TCE CBGA package upon request
Print
Engine
Processor Interface
Configuration Registers
Arbiter
Clock
Generators
Ethernet Interface
60x and MPX Bus Interface
• Support for the latest processors: PC7410, PC7447/47A/57, PC7448
• MPX bus operation up to 200MHz
• Supports two processors (up to 167MHz bus speed)
PC109
• 64-bit Data – 32/36-bit Address
Integrated PCI-X Interface
JTAG
• 133MHz PCI-X and 66MHz PCI, 64-bit Data
Integrated Memory Controller
• 200MHz, 400 DDR-II, 8-bit ECC
UARTs
• Direct Connect to MPX for minimum latency
• Dual DIMM support at 200MHz
Interrupt
Other Features
Controller
• Host Port supporting 8-32 bit devices
• Clock generator requires single clock input
I²C
• Dual 10/100/1000 Ethernet, internal DMA per port
• Interrupt Controller
• I²C, Dual-UART, 16 GPIOs
GPIO
• DMA
• Power management:Nap, doze and sleep modes
• JTAG
4x DMA
• Power Management with power-loss memory protection
Memory Controller
PC109 Overview
PCI Bridge / Memory Controller
PCI-X Interface
Arbiter
Host Local
Port
Schedule
• Industrial & Mil-Temp @ 200MHz : Now
Date / Ref
42
PC578 Preliminary* Overview
16-port Serial RapidIO switch
80Gbps Full-Duplex Serial RapidIO Switch
• RapidIO Interconnect Specification (Rev.1.3) Compliant
• 1149.6 AC-JTAG
Configurability
• Up to eight x4 links or sixteen x1
• Multicast Event Control Symbol
• Lane Swap
Performance
• Cut-through latency ~100ns
• Multicast
Low Power
• Programmable integrated SerDes
• Port Power Down
Technology
• 27x27mm Flip-Chip BGA package
Schedule
Samples: 2Q/2008
* Preliminary: to be finalized after silicon characterization
In partership with
Date / Ref
43
MRAM: High-Density, Fast, Non-Volatile RAM
Date / Ref
44
MRAM History
1995
Initial research was started by the Motorola Labs-Physical Sciences Research
Lab (PSRL) in conjunction with DARPA- US government agency.
2000
Significant investment was made in advanced, production ready, 200mm MRAM
tool set.
2001
Development for commercialization began in the MOS12 Wafer Fab facility in
Arizona.
2002
256Kb and 1Mb test vehicles were successfully demonstrated by Motorola using
0.60um technology.
2003
Motorola delivered the first 4Mb MRAM samples using 0.18um technology and
functionality was demonstrated on customer’s board.
2004
Freescale spun off from Motorola. All MRAM activity transferred to the new
company.
2006
Qualification Complete. Qualified products are currently shipping. The world’s
first MRAM product.
2007
E2v announces plans to support extended-reliability versions of Freescale’s
MRAMs
Date / Ref
45
MRAM Technology
Magnetic Tunnel Junction (MTJ) deposited on
standard 180nm logic process
MTJ
Simple 1T-1MTJ Cell Structure
Metal
5
Information is stored as magnetic
polarization, not charge
The state of the bit is detected as a change in
resistance
Metal
4
Date / Ref
46
MRAM Operation: Read
Read Mode
• Current is passed through the bit
• Resistance of the bit is sensed
Date / Ref
47
MRAM Operation: Write
Write Mode
• Current is passed through the programming lines generating magnetic fields
• The sum of the magnetic field from both lines is needed to program the bit
Date / Ref
48
MRAM Advantages
Nonvolatile
Data Retention -  20 years
Stable & Reliable
Fast
Symmetrical Read/Write – 35ns
Byte writeable – bit level granularity
Unlimited
Cycles
Viable
Unlimited Endurance -  1016
Non-destructive read
Data stored by polarization not charge – no leakage, no soft errors
Integrated with Existing CMOS Baseline
Compatible with Embedded Designs
4Mb Commercial Device Qualified
Date / Ref
49
EV2A16A: 4Mbit MRAM Overview
Features
•
•
•
4Mbit memory array
256Kx16bit organization
Flexible Data Bus (8/16-bit access)
Power Requirements
•
•
•
3.3V single power supply
600mW power dissipation
Low Voltage Inhibit (prevents writes on power loss)
Performance
•
•
•
Symmetrical high-speed Read & Write operations
Fast access time (35ns)
Fully static operation
Technology
•
•
•
0.18µm CMOS process
44-pinTSOP type-II package, SRAM compatible pinout
Ceramic, Hermetic package design possibilities
Availability
• Industrial (-40°C to +110°C) : Now
• Military (-55°C to +125°C) : Now
Date / Ref
50
3 Reasons to Choose e2v’s Hi-Rel Microprocessors
• e2v’s Product Offering
– Extensive high performance product portfolio and roadmaps
 Thanks to our agreements with Freescale Semiconductor and Tundra
– All parts are certified by 100% electrical testing using original test vectors to
ensure the highest level of fault coverage.
• e2v’s Focus on Extended-Reliability Market
– Unique Assembly & Test facility for Hi-Rel products.
– For 25 years, our business has been to support this market segment.
– We continue to have the flexibility to support specific customer needs
• Our Commitment to the “Long- term”
– We make products that are available for 20+ years
“First” life is 7 to 10 years of active foundry
e2v adds another 5 to 10 years of “second” life thanks to our obsolescence management
process
Date / Ref
51
www.e2v.com
Date / Ref
52