Chapter 3 Bipolar Junction Transistors

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Transcript Chapter 3 Bipolar Junction Transistors

Chapter 4
Bipolar Junction Transistors
C. Hutchens Chap 4 ECEN 3313 Handouts
1
BJT I-V Relationships
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Ebers-Moll Model -Table 4.2
Input and Output Characteristics
SPICE parameters ----to I-V curvers
Regions of Opertion
Biasing the BJT
Bias Stability
Small Signal Models
Single Transistor Amplifiers
C. Hutchens Chap 4 ECEN 3313 Handouts
2
Output characteristics
Ebers Moll Equations
B-E and
C-B
Junctions
I E = - I ES (
I C = - I CS (
VBE
VBC
nVt
 1)   R I CS (
nVt
 1)   F I ES (
VBC
VBE
nVt
 1)
nVt
 1)
Now Let us exam the equations in the
most useful region VBE > 4nVt and VBC
<< 4n Vt, Vt = 26mV at room temp.
FORWARD BIAS
IB = -(IC +IE)
I E = - I ES (
VBE
nVt
)   R I CS ( 1)  -I ES (
I C = - I CS ( 0  1)   F I ES (
VE
nVt
VBE
nVt
)   F I ES (
)
VBE
nVt
)
I C = - F I E
C. Hutchens Chap 4 ECEN 3313 Handouts
3
Forward Bias
I C = - F I E
IC = F/(1-F) IB =  F IB where  F =
F/(1-F)
Now repeating the exercise with VBC >
4nVt and VBE << 4n Vt, Vt = 26mV at room
temp. We can define
 R = R/(1-R)
BJT are typically designed (Process
Engineered) to keep
 F >>  R and F IES = R ICS = IS
CUTOFF-both pn junctions are reversed biased
IE  IES - RICS
IC  ICS - FIES
VBE and VBC < 0 for npn BJT
C. Hutchens Chap 4 ECEN 3313 Handouts
4
Ebers-Moll for computer/hand use 4.13
Ebers Moll rearranged
IE  -IF - RIR
IC  IR - FIF
VBE
where
I E = I ES (
where
I C = I CS (
nVt
VBC
nVt
 1)
 1)
Value
Equations for obtaining a numerical solution
Emperical I-V curves
Computer model for simulation
Bases for a small signal model for hand
calculations
C. Hutchens Chap 4 ECEN 3313 Handouts
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Ebers-Moll for computer/hand use
Ebers Moll rearranged
IE  -IF - RIR
where
IC  -IR - FIF
I F = I ES (
where I
R
VBE
= ICS (
nVt
VBC
1)
IC   FI ES (
nVt
VBE > 4Vt, VBC << 0 Active Lin “amp”
VBE
nVt
)
VBE
VBC
nVt
)  ICS (
nVt
)   RI CS (
nVt
)
1)
1 st quadrant of intrest VBC > 0, Si n=1
I C   FI ES (
VBE > 4Vt, VBC > 4nVt Sat. switch
should be avoided slow recovery”
I E   I ES (
VBE
VBC
nVt
)
VBE > 4Vt, VBC 0 nonsat switch
is prefered.
I E  I B (   1)
VBE < 4Vt, VBC << 0 Off switch “amp”
See Table 4.2 pp 235
IE = IES + RICS, IC = ICS + FIES
IE = IES + IS, IC = ICS + IS
“Diode leakage currents”
C. Hutchens Chap 4 ECEN 3313 Handouts
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Example Using Table 4.2 Eqs
Example F = 0.995, R = 0.95, Si n= 1, IS = 0.1fA
Determine the transistor currents for VS = VBE = 0.4, 0.6, 0.7 and
VCE = 1V.
VBC = VBE-1V = -0.6, -0.4 and -0.3 V respective.
ICS = IS/R = 0.1f (1.05) = 0.105fA
IB = -(IC + IB)
Tabulating
VS
IC
0.4
0.6
0.7
0.9
480pA
1.05uA
49uA
108mA
IE
-483pA
-1.06uA
- 49.5uA
-108.5mA
C. Hutchens Chap 4 ECEN 3313 Handouts
IB
2.4pA
5.3nA
248nA
543uA Note   200
7
SPICE Example to VERIFY Table 4.2
Simulation with SPICE “MODEL PARAMETERS”
IS
F
R
VA
IS
BF fwd current gain
BR rev current gain
VA Early voltage
0.1 x10-15A
50-250
10-.1
10-200V
GENERAL FORMAT
Title card
*** comment lines
VBB 11 0 DC 0
RB 11 1 330
RC 22 2 220
VCC 22 0 DC 1
Q1 2 1 0 NPNSPEC
* QXXXX c b e model_name optional area
.MODEL NPNSPEC NPN ( SPICE parameters)
.DC VBB LIST 0.4 0.6 0.7 0.8 0.9
.PRINT DC IC(Q1) IB(Q1) IE(Q1) V(1) V(1,2)
*.PLOT
*.PROBE
.OPTIONS TNOM = 28.6
.END
C. Hutchens Chap 4 ECEN 3313 Handouts
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Generating OTC Curves Ex 4.14 pp239
C. Hutchens Chap 4 ECEN 3313 Handouts
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Circuit Modeling of Regions
C. Hutchens Chap 4 ECEN 3313 Handouts
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Physical Base Currents
All of these
factors
contribute to 
being < 1
C. Hutchens Chap 4 ECEN 3313 Handouts
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Example Region chk 4.12
Given VBB = 2V, VCC = 10V, RB = 22K, RE =
100, RC = 2K and F = 0.99 Determine the
region of operation and estimate the Base and
collector currents.
VBB = IB RB + VBE + RE (IB+ IC )
VCC = ICRC + VCE + RE (IB+ IC)
Observe   99 from F/(1-F)
VBB - VBE = IB RB + RE (IB+  IB )
This is not consistent with the input equation
the “Active Lin Reqion”
IC =  IB  99 x 40.6 = 4.0mA
VBB - VBE = 2-.7 =1.3 = IB(RB + RE(1+c)
IB = 1.3/(22k + 100 100) = 40.6uA
VCC - VCE =  IB RC + RE (IB+  IB ) “TST for Sat”
VCE = VCEQ = VCC - { IB RC + RE (IB+ 
IB )}
VCEQ  10 - 4.0mA (2k + 100) = 1.6V
IB = (VCC - VCE)/{  RC + RE (1+ )}
Since VCE is > 100-200mV. This
IB = (10-0.2)/{2k (99) + 100 x 100}  46mA transistor is biased to be an
amplifier.
C. Hutchens Chap 4 ECEN 3313 Handouts
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Simple BJT Switch 4.12
VCC = ICRC + VCE, VIN = IB RB + VBE
A switch has two stable Qpts
Logic 1: IB = 0, and VCE = VCC i.e
5V
Logic 0 : IB must be such that VCE
= VCEsat i.e. 200mV
To ensure that VCE is small we assume
 = BF minimum
 min IB = IC > (VCC -VCEsat)/RC
EX Given VCC = 5V, RC = 500, VINmin = 4.5V,
VCEsat = 200mV,  min = 50. Now Assuming VBEsat =
0.8V
RB < (4.5- 0.8V)/{ (5-0.2V)/( 50 x 500)}
IB > (VCC -VCEsat)/(  min RC )
RB < (VINmin - VBE)/IB = (VINmin - VBE)/{
(VCC -VCEsat)/(  min RC )}
RB < 185K
C. Hutchens Chap 4 ECEN 3313 Handouts
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Operating and Biasing Constraints
PDISS < IC VCE , VCEmax (Breakdown Voltage), Icmax
Qpt for BJT must be inside the PDISS Curve
IE + IC + IB = 0 Kirchoff Current law for BJT
IC =  IB
BF in SPICE The magic in transistors
Early Voltage VA or VA in SPICE terminology
C. Hutchens Chap 4 ECEN 3313 Handouts
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Fixed Biased Circuit pp236-54
Constaint Equations
VCE = VCE - IC RC
VB = VCC =IBRB + VBE
VCE & IC define the Qpt
Solving for RC and RB
Now given that VCE & IC at the Qpt
at 4V and 6mA respectively.
Fined RC and RB. VCC = 10V
RC = (VCC - VCEQ)/IC
RC = (10- 4)/6mA =1k ohm
RB = (VCC-- VBE)/ {IC/ }
RC = (VCC - VCEQ)/IC
RB = (10-- 0.7)/{6mA/200 }
RB = (VCC-- VBE)/IB
RB = 310k
C. Hutchens Chap 4 ECEN 3313 Handouts
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Temperature Effects and RE pp239
Collector dependency
iC = ISevBE/VT(1+VCE/VA)
 IB and therefore IC are very dependent on
Temp
 VBE vs. Temp –2mV/Co
 Sol Add RE; IE RE drop > 3-5X VBE
 Early effect – IC dependency on VCE Reduces Voltage Gain
(1+VCE/VA)
iC = ISevBE/VT(1+VCE/VA)
C. Hutchens Chap 4 ECEN 3313 Handouts
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Analysis of Transistor DC Bias
VBB = IBRB +VBE + IERE
RC = 2K, RB = 100k, =100
Find the Operating Point
RC = 5K, RB1 = 100K, RB2 = 50K,
=100, RE = 3K
Step 1 IB
Find the Operating Point.
Step 1 Thevenin Eqivalent VBB and RB
Step 2 IC
Step 2 IB = IE/(+ 1)
Step 3 VCE
Step 4 IC  IE = (VBB-VRE)/(RE+RB/(+ 1)
Step 5 VCE = VCC – IC - REIE
C. Hutchens Chap 4 ECEN 3313 Handouts
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Self Biased with RE
IC = VCC/( RC + RE)
Fixed Bias Constaint Equations
VCE = VCC- IC RC - IERE  VCC- IC RC - ICRE
VBias = VCC =IBRB + VBE + IERE  IBRB + VBE + ICRE
IC =  IB = BF IB
VCE & IC define the Qpt
C. Hutchens Chap 4 ECEN 3313 Handouts
18
Self Biased with RE
Self biased Equations
IC =  IB = BF IB
VCC = ICRC + VCE + IERE = ICRC + VCEQ + (IC + IB )RE
VCC  ICRC + VCE + ICRE
“VRE  ICRE > 3-4X VBE i.e. 2.0V”
VBB = IBRB + VBE + (IC + IB )RE
VBB  IBRB + VBE + ( IB )RE
“RB < 0.1  IB RE”
Where RB = RB1||RB2 and VBB = VCC RB2/(RB1 + RB2)
C. Hutchens Chap 4 ECEN 3313 Handouts
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Self Biased Example
Example: Given BF = 200, VBE
= 0.7, IC = 4mA, VRE  2V, RC =
1k, and VCC = 12V. Select RB
> 9 k and find VCEQ, RE, RB1
and RB2.
VCC  ICRC + VCE + ICRE
VBB  IBRB + VBE + ( IB )RE
Where RB = RB1||RB2 and VBB = VCC RB2/(RB1 + RB2)
VCE  VCC -( ICRC + ICRE) = 12 - (4mA 1K + 2V) = 6V
RE  2V/4mA = 500 select 510.
VBB  IBRB + VBE + ( IB )RE
= 20A 10K + 0.7V + 2V = 2.9V
RB = RB1 RB2/( RB1 + RB2) = 10 K and
VBB = VCC RB2/( RB1 + RB2) = 2.9V
C. Hutchens Chap 4 ECEN 3313 Handouts
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Example Con’t
GB = GB1 + GB2 =1/10 K = 10-4 S
RB1 = RB2 ( 1 - VBB/VCC) = 2.9V
GB1 = GB2/(1 - VBB/VCC) = GB2 VCC/(VCC- VBB)
GB = 10-4 S = GB2 VCC/(VCC- VBB)+ GB2
GB2 = GB/( VCC/(VCC- VBB)+ 1) = 10-4/(2.32)
= 0.431x 10-4 S or RB2 = 23.2k Select 24K
GB1 = GB - GB2 = 10-4 S - 0.431x 10-4 = 0.569x 10-4 S
or RB1 = 17.57K Select 18K
Now Chk RB = RB1||RB2 = 10.28K
C. Hutchens Chap 4 ECEN 3313 Handouts
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Bias Stability
Ensure Transistor CKT will work over the range
of specified voltage, tempertature, and transistor
variation.
The desired input and output impedances, gain
and bandwidth are maintained.
The maximum power hyperbola is note violated.
C. Hutchens Chap 4 ECEN 3313 Handouts
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Collector Current Variation
We must remember that ICO,  or BF, and VBE
are functions of Temperature and process.
SI 
I C
I C

I CO I CO
SV 
I C
I C

VBE VBE
SI 
I C
I C

 F  F
Now the total incremental change in current can
be written as
 I CT  S I  I CO  S V  V BE  S    F
C. Hutchens Chap 4 ECEN 3313 Handouts
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Collector Current Variation
Now writing the input bias loop equation, subsituting
and solving for IC.
VBB = IBRB + VBE + IEERE
(1)
Through manipulation of the Ebers-Moll equations
IC =  F IB + ( F + 1) ICO where ICO  (1-RF)ICS
“collector current with base open”
IB = (IC- (F + 1) ICO)/ F (2)
From IC+ IB+ IE = 0 where IEE = -IE
IEE = { (F+1)/ F }(IC -ICO) (3)
Substituting (2) and (3) into (1) and solving for I C
IC 
 F (VBB  VBE ) I CO (  F  1)( RB  RE )
RB  (  F  1)( RE )
C. Hutchens Chap 4 ECEN 3313 Handouts
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Collector Current Variation
Now
SI 
I C
I C
(   1)( RB  RE )
( RB  RE )

 F

I CO I CO RB  (  F  1)( RE ) ( RB
 F  RE )
keeping RB small and RE small
SV 
I C
I C
F


VBE VBE RB  (  F  1)( RE )
“Using B-E loop”
keep RE large as possible
SI 
I C
I C
 (V  V BE )( RB  RE )

 F BB
 F  F
 RB  (  F  1)( RE ) 2
“Using B-E loop”
“Note due to denominator SI is frequently
neglected”
C. Hutchens Chap 4 ECEN 3313 Handouts
25
Example
EX Given the selfbiased circuit and VBE = 0.7, IB =
15uA “designed” at 27Co and shifts to , BF=255,
BR=6, VA=75, IS=14fA, find the change in I C for Temp
change 27 to 50Co. From SPICE output curves ICO
=55.5fA, VBE = -0.03 V, and F = 30.
The Thevenin equivalent voltage VBB = 2.79 and RB =
RB1||RB2 = 7.67K.
SI 
I C
I C
( RB  RE )
( 7.67 K  510 )



 15.2
ICO ICO ( RB
( 7.67 K 255  510 )

R
)
E
F
SV 
IC
IC
F
255



 185
. mS
VBE VBE RB  (  F  1)( RE ) 7.67 K  ( 256)(510)
SI 
I C
I C
 (V  VBE )( RB  RE )

 F BB
0
 F  F
 RB  (  F  1)( RE )2
ICT  S I ICO  SV VBE  S   F  (15.2 )55.5 fA  ( 18 mS )( 0.03)  79uA
Now VCEQ = IC (RC + RE) = 79uA (1.51K) =120mV
C. Hutchens Chap 4 ECEN 3313 Handouts
26
PSPICE
.TEMP 27 50
Worst case analysis .WCASE
.model device_name NPN (BF=250 DEV 20 ...
.WCASE DC IC(Q1) YMAX HI VARY DEV DEVICES
Q
BF = BF + DEV = 250 + 20 = 270 &
BF = BF - DEV = 250 - 20 = 230
* worst case analysis with PSPICE
VCE 1 0 15V
IB 0 2 60uA
Q1 1 2 0 NPNBJT
.model NPNBJT NPN(BF=250 DEV 20 VA= 75)
.DC DEC 0 0.001 15 IB 0 50u 10u
.PROBE
.END
C. Hutchens Chap 4 ECEN 3313 Handouts
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Small Signal Model pp 256
iC = ISevBE/VT(1+VCE/VA)
Model parameters can be
found either
1. analytically or
2. graphically from exp. data
ac = hfe
C. Hutchens Chap 4 ECEN 3313 Handouts
28
Small Signal Model pp257
iC = ISevBE/nVt(1+VCE/VA) eq- 4.27 augmented to include the early
effect.
IS and VA IN SPICE
Model parameters can be found analytically
I
I
I
I B
gm  C  C  CQ 
VBE nVt Vt
VBE
gce  1 / rce 
IC
I C

VCE VCE
 VBE nVt 
IS  


 IC


VA
VA
Now from Ib = iC/ and eq-4.27
ICQ gm
I B
I B
IC
gbe  1 / rbe 




VBE VBE nVt Vt

r = rbe = /gm
C. Hutchens Chap 4 ECEN 3313 Handouts
Table 4.3 pp 271 Know
29
Small Signal Model Gain pp259-60

See Ex 4.9
Application
of ss models
gm = ICQ /Vt , gce =ICQ/VA = 1/rce
vin is imposed across vbe and r
vout (gce + GC) + gm vbe where vbe = vin
Solving for vo/vin = - gm /(Gc + gce)
A  - gm Rc Voltage Gain for Gc >> gce
C. Hutchens Chap 4 ECEN 3313 Handouts
30
Application of Small Signal Model pp262
Step 1 replace all Cs and DC power supplies if present
with a short circuit.
Step 2 replace the BJT with the hybrid  model.
Step 3 Analyze to find Ri , Ro or AV and Ai.
Step 4 Using DC analysis determine ICQ and assume ICQ
= IEQ. You must go to the data sheet for “Beta” or hfe.
Step 5 Solve for hybrid  model parameters using ICQ =
IEQ and Vt above.
Step 6 Insert the results of step 5 into the equations of
step 3 above.
Step 7 Verify with SPICE.
Start by looking at example 4.9 and 4.10
C. Hutchens Chap 4 ECEN 3313 Handouts
31
Small Signal Model with Re pp285
Ri = vb/ib = ? Assume rce can be neglected. ie = ib + ib
At e ve = gm(ve – vb) + ieRe and noting ib = (vb - ve)/r,
Solving for
Ri= vb/ib = r + ( + 1) Re or r + (gm r + 1) Re Note  = gm r
Re YIELDS THE DESIRED AMP INPUT RESISTANCE!
C. Hutchens Chap 4 ECEN 3313 Handouts
32
Small Signal Model with Re pp285
Av = vb/vo = ? Assume rce can be neglected. ie = ib + ib
At e; ve = gm(ve – vb) + ieRe and noting ib = (vb - ve) /r, voGC + gm vbe =0
Solving for Avc = vo/vb = vo/vin
Avc = gm RC/[1 + gm Re]
AND
Ave = vo/ve = vo/vin
Ave = 1/[1 + gm Re]
THE PRICE OF RE IS REDUCED GAIN.
THIS IS YOUR ENGINEERING TRADE OFF,
HIGHER R BUT WITH LOWER GAIN.
C. Hutchens Chap 4 ECEN 3313 Handouts I
33
Common Collector pp290
Re MUST BE >> 1/ gm
AND Re ( + 1) should be > Rs + r
WHEN ONE SOLVES for Ro
Ro = 1/gm || RE|| (Rs+ r)/
Using previous equations
Ri = r + ( + 1) Re or r + (gm r + 1) Re
Ave = 1/[1 + gm Re]
and Noting Re >> 1/gm
Ri= Rs + r + (gm r + 1) Re  Re(gm r + 1) = Re ( + 1)
Ave = 1
C. Hutchens Chap 4 ECEN 3313 Handouts
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Common Collector Con’t
Re MUST BE >> 1/ gm
AND Re ( + 1) should be > Rs + r
WHEN ONE SOLVES for Ro
Ro = 1/gm || RE|| (Rs+ r)/
Observations regarding impedances and the
Transistor
looking into the base
Emitter to gnd side resistors inc. by 
looking into the emitter
Emitter to base to gnd side resistors dec. by 
C. Hutchens Chap 4 ECEN 3313 Handouts
35
Small Signal Model Con’t Add Cs
Qn = W2/2DniC = F iC
Cde 
F  TF SPICE
dQn
i
  F gm   F C 
VBE
Vt
Junction Cap due B-E and C-B diodes
Cje  2CJE0
for B-E
Cjc  CJC0/2 = C
for C-E
Now total base-emitter capacitor symbolically is
C = Cje +Cde  2CJ0 + F iC or
C = 2CJE + TF iC in SPICE model parameters
Now total collector emitter capacitor symbolically is
C  CJC/2
C. Hutchens Chap 4 ECEN 3313 Handouts
36
Small Signal Model Cuttoff f
Ic = gm v + (0- v) sC
(1)
(v - vin )gx + v (g +s C + sC ) = 0
(2)
Or Ib = v (g + sC +sC )
(3)
Ic
hfe = Ic/Ib = {gm v - vssC }/{v (g + s(C + C )}
hfe = {gm - sC }/ {g + s(C + C )}
hfe(s) = [gm/ g]{1 - sC/ gm }/ {1 + s(C + C )/g}
THIS IS VERY IMPORTANT
the LINK BETWEEN
ANALYSIS- THE SIMULATOR
and OUR MODEL. SPICE
MODELS ARE 98% REALITY
AND TRANSFERABLE.
We now have a pole a zero and a DC term
 gm/ g = 0 the “DC” small signal current  BF
 pole @ g/(C + C ) = [gm/0] /(C + C )
 In SPICE
 gm = ICQ /Vt, C = TF (ICQ /Vt)+ 2CJE, C = CJC/2
C. Hutchens Chap 4 ECEN 3313 Handouts
37
Small Signal Model Cuttoff f
0 dB
See Fig 4.73 pp
325 also. This
slide presents a
very key concept.
In practice in
broad band
amplifier design
one CANNOT
expect to apply
a transistor
beyond T….
.model Q2N2222 NPN(Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=255.9
Ne=1.307
+
Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1
+
Cjc=7.306p Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75
+
Tr=46.91n Tf=411.1p Itf=.6 Vtf=1.7 Xtf=3 Rb=10)
*
National pid=19
case=TO18
*
88-09-07 bam
creation
C. Hutchens Chap 4 ECEN 3313 Handouts
38
Small Signal Model EX 4.76
This is what its is about
Understand
and know
for exam!!!
SPICE verification with 1kHz sine and Re = 0 and Re = 100 and selecting 0 = 100
Use VBE =0.7 (high for this case), IC  IE  0.84mA and neglecting “Early effect”
From model card for 2N2222 and hand analysis
gm = ICQ /Vt = 34mS, r =0/ gm = 3.7K
also C = TF (ICQ /Vt)+ 2CJE, C = CJC/2 can be calculated
RI = RB|| [r + (0+1)Re] 3.57K and 13.1K
Av = gm (RI/( RI + Rs) gm (RC||rl)/(1+ Regm) = -44.7V/V and –21.9V/V
Verify this with PSPICE See example.
C. Hutchens Chap 4 ECEN 3313 Handouts
39