High-Frequency Power Conversion for Machine Drive Applications

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Transcript High-Frequency Power Conversion for Machine Drive Applications

High-Frequency Power Conversion for
Machine Drive Applications
Dr Niall Oswald
Electrical Energy Management Group
University of Bristol
[email protected]
Presently working on two projects:
EPSRC ‘Centre for Power Electronics’ components theme
TSB ‘Power Module Validation’ (PoMoVal)
Focus is on wound passive components – performance and lifetime
when subjected to high speed switching waveforms.
Development, test and analysis of a high-power, high-frequency
power module for Electric Engine Start functionality.
Safran Power UK, Raytheon Systems Ltd, UoB.
These projects have similar objectives – enabling compact,
efficient power conversion for machine drive applications, using
new device technologies.
Low per-cycle switching loss of new devices (WBG) allows high
switching frequency operation, in turn enabling:
• High output frequency
High speed, torque-dense machines (e.g. 10 pole traction machine @
12k rpm – 1 kHz fundamental).
High switching frequency  reduced current waveform distortion.
• Compact, lightweight output filtering
Sinusoidal output voltage, low harmonic distortion output current
waveform – reduced losses in driven machine.
Possibility of eliminating screened cables – desirable in many
applications, reduces installation cost.
Filter cut-off frequency can be placed outside controller bandwidth.
…and Challenges
Low per-cycle switching loss is largely due to increased
switching speed – dominant DC-AC power conversion
topologies (2L-VSI, 3L-NPC) are hard-switched.
‘Slow’ IGBT-based drives already require significant
EMC countermeasures to achieve compliance.
SiC MOSFETs capable of switching at 10s of kV/μs.
Neither practical nor desirable to have this level of
dv/dt present at inverter output terminals – essentially
mandates use of output filtering!
Filter components must withstand switching stress
and provide sufficient attenuation of increased highfrequency spectral content.
Filter topology selection and parasitic circuit elements
important in determining overall performance.
600 V, 10 A
+40 dB above 16 MHz
Oswald, N.; Anthony, P.; McNeill, N.; Stark, B.H., "An Experimental
Investigation of the Tradeoff between Switching Losses and EMI
Generation With Hard-Switched All-Si, Si-SiC, and All-SiC Device
Combinations," IEEE Transactions on Power Electronics, May 2014
Project Plans & Objectives
Key objectives:
• Development of wound component high frequency
electrical behavioural models.
• Investigation of aging effects of high dv/dt on wound
Exemplary application – 40 kVA all-SiC 2L-VSI.
• Consideration of application requirements provides
representative basis for filter design (cut-off frequency,
voltage drop, etc.).
• Based around commercially-available 1200 V, 100 A SiC
MOSFET module (CREE CAS100H12AM1).
• Single phase inductor test-bed circuit under construction.
Project Plans & Objectives
• Test-bed circuit designed to maximise switching
performance (not cost/size optimised!)
• Draws on previous experience (PhD research,
PoMoVal test circuits).
• Loss analysis used to determine capabilities of
CREE all-SiC module.
100 ARMS @ 40 kHz
50 ARMS @ 100 kHz
30 ARMS @ 200 kHz
• Initial tests will use existing UoBdesigned high-performance inductor.
Potential Outcomes & Exploitation Plans
Improved understanding of trade-offs between total filter
volume and switching frequency, subject to EMC
Development of improved (compact, low-loss, low-EMI)
output filtering topologies using models developed by this
Construction of demonstration high-frequency inverter?