Transcript Real Mode

Operating Modes
UQ: State and explain the operating modes of
X86 family of processors. Show the mode
transition diagram highlighting important
features.(10 Marks)
Operating Modes
• The Intel 386DX has two modes of operation
– Real Mode (Real Address) and
– Protected Mode (Protected Virtual Address Mode)
• Real Mode:
– It works as a very fast 8086 with 32-bit extensions.
– It is required to set up the processor for
protected mode
2
Operating Modes
• Protected Mode:
– It provides access to sophisticated memory
management, paging and privilege capabilities of
the processor
3
Real Mode Architecture
• It has same base architecture as 8086
• When a processor is reset, it is initialized in
real mode.
• It sets up the processor for Protected Mode.
• The segment size of 80386 in real mode is
64KB
• The maximum memory size is 1MB
• Only address lines A2-A19 are active
4
Real Mode Architecture
• Paging is not allowed in real mode and hence
the physical address is same as linear.
• Physical Address is formed by adding contents
of segment register shifted left by 4 bits to an
effective address.
• This results in a physical address from
00000000 to 0010FFEF (FFFF0+FFFF)
• Real mode segments always start on 16-byte
boundaries since they are left shifted.
5
Real Mode Addressing
6
Real Mode Architecture
• All segments in Real Mode are exactly 64KB
long and generate exception 13 if a data
operand or instruction fetch occurs past the
end of a segment.
• Segments may be overlapped in Real Mode.If
a particular segment does not use all 64KB
another segment can be overlayed on top of
the unused portion of the previous segment.
7
Protected Mode
UQs :
Draw protected mode address translation
mechanism of 80386 and explain segment
translation in detail.(2)
8
Protected Mode Architecture
• It increases linear address space to 4GB and
virtual address space to 64TB
• This mode uses two components to form the
logical address:
– 16 bit selector: to determine the linear base
address of the segment
– 32 bit offset: Added to base address to form the
linear address
9
Protected Mode: Addressing Mechanism
• In this mode, the selector is used to specify an
index to the operating system defined table
• The table contains the 32-bit base address of a
given segment.
• The linear address is formed by adding base
address to the offset
10
Protected Mode: Addressing Mechanism
11
Protected Mode: Addressing Mechanism
• Paging provides a means of managing very
large segments.
• It translates linear address into physical
address.
12
Protected Mode: Addressing Mechanism
13
Segmentation
• Segmentation provides the basis of protection
which encapsulates regions of memory which
have common attributes.
• All information about a segment is stored in
an 8-byte data structure called a descriptor.
• All descriptors are contained in tables
recognized by hardware.
14
Selector (-Segment Register)
• A selector in protected mode has 3 fields:
– TI (Table Indicator): Local or Global Descriptor
Table Indicator
– Index(Descriptor Entry Index ): Selects one of 8K
descriptors
– RPL (Requestor Privilege Level): allows testing of
selector’s privilege attributes
• Level 0: Most Privilege Level
• Level 3: Least Privilege Level
15
Selector
16
Descriptor Tables
• It defines all the segments used in x86 system
• There are 3 types of table:
– Global Descriptor Table(GDT)
– Local Descriptor Table(LDT)
– Interrupt Descriptor Table(IDT)
• All tables are variable length memory arrays
• They can range in size from 8 bytes to 64KB
(213 x 23) (3 bits are implied as descriptor size
is fixed)
17
Descriptor Tables
• Each table can hold up to 8192(213) 8-byte
descriptors.
• The table has registers associated with them
named GDTR, LDTR and IDTR which hold the
32-bit linear base address and 16-bit limit of
each table.
• These tables are manipulated by the OS using
privileged instructions.
18
Global Descriptor Table
• It contains descriptors which are possibly
available to all of the tasks in a system.
• Every Intel386 DX system contains a GDT.
• It contains code and data segments used by
the operating systems and task state
segments and descriptors for the LDTs in a
system.
• The first slot of GDT corresponds to the null
selector and is not used.
19
Global Descriptor Table Register