About the Basic Stamp - Electrical & Computer Engineering

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Transcript About the Basic Stamp - Electrical & Computer Engineering

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Cs, DSPs, and FPGAs

Realization technologies for robotics

In the Beginning,

• skipping ahead a bit...

Evolution

• transistors • gates - SSI ~ 10 transistors • flip flops, registers, counters - MSI • sequencers, ALUs - LSI • microprocessors - VLSI • processors - ULSI 10 7 transistors

Micro-controllers and Single board Computers:

•A Micro-controller is an integrated circuit that contains many of the same items that a desktop computer has, such as: – CPU, memory, etc., but does not include any “human interface” devices like a monitor, keyboard, or mouse. •Micro-controllers are mostly designed for machine control applications, rather than human interaction.

•Micro-controllers paired with all the peripherals they need to be self-sufficient, such as the Basic Stamp II IC, are sometimes called “single-board computers.”

microControllers -

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Cs

• Simplified processors/sequencers • Intended for “embedded”applications – cell phones, VCRs, washing machines, toaster ovens, etc.

– single-chip solutions • or maybe a few chips...

• Inexpensive (!) – < $1.00 at the bottom end – < $100.00 at the top end

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Cs

• Programmable – but typically only programmed once...

• “reasonable” performance – 4 bit (passe’) – 8 bit, 16 bit – 32 bit (yes, but get real) – 64 bit ? (dope-slap deserved) • internal memory – bytes -> kbytes of RAM – kbytes of PROM, EPROM, EEPROM, Flash

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Cs

• speed – 2 -> 20 MHz • faster (of course) and slower devices available – remember, speed a power (watts) • typically, 4 clock cycles per instruction cycle • external ports – parallel (8 -> 24+ lines) – serial – timer/counter – analog (input; 8 bit typical) • some devices have multi-channel analog-mux

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Cs

• packaging – 8 pin SOIC -> 400+ ball BGA – and everything in between!

• programming – assembler, C – Basic (?) – Java – Pascal – pBasic, etc.

Lisp? Prolog?

Microcontroller board examples

Motorola 68HC11

based boards: – Handy Board – FingerBoard – BotBoard – MiniBoard

68HC711E9CFN2

• 512 bytes RAM • 512 bytes EEPROM • 12 kbytes PROM – containing modified-Buffalo kernel • 16 bit address, 8 bit data – 16 bit internal • 8 analog in (8 bit ADC) • serial I/O, timers, counters • 8 MHz crystal; 2 MHz cycle

Microcontroller Board Example that is presented in detail in Martin’s textbook

• Handy Board – Perfect for small robots – Easy to develop software

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Cs - why might you want one?

• dedicated application – monitoring, control • complex sequential function – programmed in C • low-medium performance • low cost • CLEO-II.5 silicon power system had over 5 dozen HC11’s – approximating the intellectual capacity, and temperament, of a 2-year old

Microcontroller Example that is our main low-end project platform

•Basic Stamp

Another example of a microcontroller – Basic Programming Language – Full documentation and examples online – Basic Stamp IIe has the most programming space

Microcontroller that is even better and was used in the Skeleton robot

OOPic

– Object oriented (VisualBasic) – Full documentation and examples online Another example

BASIC Stamp

• Many pre-defined functions • Cost-point: $34 - $99 • Starter kit for $149

Original BASIC Stamp from Parallax

• 256 bytes EEPROM – 80-100 lines of PBASIC • 16 bytes of RAM – bytes, not kbytes!

• 8 bit parallel port • serial port • 4 MHz

The Basic Stamp Microcontroller usage

Basic Stamp II (BSII)

•2048 Bytes of EEPROM(non-volatile) - Clock speed of 20 MHz.

- Holds 600 lines of code in EEPROM - executes an average of 4000 instructions/sec - 32 Bytes of Ram(16 of it for variable storage) - 16 I/O pins, plus two synchronous serial pins - Programmable with a PC/Mac through a serial connection with PBasic.

The Board of Education

• BSII micro-controller • bread-board • power supply • 9 volt connection • serial cable

Many boards can work together with micro-controller boards Foundation Controller

Motherboard

Microchip

PIC

(Peripheral-Integrated Controller)

• Wide variety of sizes in chip family • Very low cost: $4-$20 per chip • High speed • Programmable in

C

What is needed to use a PIC?

• Software – MP-Lab development environment – A C-compiler • PIC-Start Plus programmer • UV chip eraser for some chips

Pin diagram PIC 12c672

Pin 1 Pin 2 Pin 3 Pin 4 Positive power (3-5V DC) Digital input/output Digital i/o, Analog in Digital input only Pin 5 Pin 6 Pin 7 Pin 8 Digital i/o, Analog in, counter-timer Digital i/o, Analog in Digital i/o, Analog in Ground

How to use a PIC?

• Define, step-by-step, the desired behavior • Choose a chip with appropriate I/O lines • Build a board • Write the program • Test and debug, test and debug

PIC16C58A

• 73 bytes RAM • 2 kbytes UV-erasable EPROM • 12 I/O pins • timer/counter • 18 pin DIP • 20 MHz crystal; 5 MHz cycle

Digital Signal Processors - DSPs

• Essential difference from the microprocessor: – DSPs are designed for high performance, repetitive, numerically intensive tasks • Integer and floating point devices available – integer more common, less expensive • besides, just multiply your floats by 1000, and you have integers

DSPs - what is good about them?

• strong numeric architecture(s) – single cycle multiply accumulate – parallel units (SIMD) • specialized addressing modes (no overhead) – pre- and post- modification of pointers – circular addressing – bit-reversed addressing (for FFT) • on-chip memory – multiple memory access architecture • several accesses per cycle

DSPs features

DSPs - more features

• specialized execution control – tight loops do not require (repeated) instruction fetch – conditional testing and loop-breaks built-in • does not cost extra instruction to loop • deep pipelines – TMS320C6200 has an 8-deep pipe • “wide” operation – VLIW - very long instruction word – many units (numeric, instruction, memory, other) controlled by single (complicated) instruction

DSPs - architectures

• von Neumann - shared program/data memory • Harvard - separate program memory and data memory • modified Harvard - get one operand from data memory and another from program memory, in the same cycle • Super Harvard Architecture – ‘cause

SHARC

sounds cool!

• TigerSHARC

SHARC !

DSPs TMS3 20C62 00

DSPs - hard to program

• keeping the pipe full, • keeping the many units busy, • squeezing out performance… • is

really

difficult!

– Assembly language – “emulators” which measure device performance – no substitute for experience

DSPs - why might you want one?

• dedicated (or not) application • “simple” sequential function – with strong loop structure – best programmed in assembly language • but C tools are getting better • high performance – massive throughput!

• medium-high cost – 1200 MIPs for under $50 – 2400 MIPs for $250

Programmables Once

• ROM – read only memory – mask programmed • PROM – programmable read only memory – fuse/antifuse – one-time programmable

Programmables - A few times

• EPROM – erasable programmable read only memory – UV light (chases charge off of floating gate) – all or nothing • EEPROM – electrically erasable programmable read only memory – all or nothing • “Flash” – EEPROM-like, but page-at-a-time erase

Programmables

• but why limit yourself to address -> data ?

• programmable array logic - PAL – outputs = (mostly) combinatorial function of inputs and other outputs • 16L8 – 8 outputs » 6 of the outputs can be fed back as inputs – 10 simple inputs – out = (a&b&!c) + (d&e) + !f + … » up to 16 terms ANDed » up to 7 product terms ORed

Programmables

• programmable logic device - PLD – AND/OR array – feeding “macrocell” of flipflop/pass-through • and selectable feedback – 22V10 (next slide) • complex PLD - CPLD – lots of PLDs in one chip

Examples of programmable architectures

(Field) Programmable Gate Arrays

• field programmable gate array - FPGA – two common architectures: • sea-of-PLDs – e.g. Altera MAX 7000, MAX 9000 • sea-of-little look-up tables, feeding flipflops – e.g. Xilinx XC4000, XC5200 • but of course, marketting pressure forces everyone to sell everything – Altera FLEX 8K look-up tables… – Xilinx XC9500 sea of PLDs… • Actel, Altera, AT&T, Cypress, QuickLogic, Xilinx

MAX (Cypress)

Xilinx

FPGAs

• sizes – 10 3 to 10 6 “gates” • almost meaningless metric • low-end = 3.2 x 22V10 – ~30 “gates” per AND/OR/macrocell?

• Speeds – 50 MHz to 200+ MHz • packaging – typically SMT • QFP, BGA – 100 to 400+ “pins”

FPGAs - volatile vs nonvolatile

nonvolatile

– EEPROM-like • configuration held in floating-gate cells – ready on power-up – ~10 3 reprogram cycles • so you can make a few mistakes… – typical for sea-of-PLD devices • smaller number of larger blocks • more complexity per block • lower % utilization – as it that means anything

FPGAs - volatile vs nonvolatile

volatile

– SRAM-based configuration

• must be loaded on every power-up – XC5202 -> 3000 gates, 42kbits of config = 42 ms (serial) –

giant shift register - nothing “random access” about it!

– “unlimited” reprogram cycles • limited by whatever holds the configuration data – typically a tiny 8 pin serial (EE)PROM – typical for sea-of-little look-up tables devices • larger number of smaller blocks • less complexity per block • higher % utilization

FPGAs which one is right for you?

• If your function fits/works, go with it!

• in-system reprogrammability (volatile or non) is a powerful ally!

– Allows “reasonable” mistakes to be corrected simply by recompiling/reloading • pick a device larger/faster than you need – don’t expect to use more than 50% of the gates • you may use them all, but don’t expect to!

• try to use a single clock for everything

FPGAs - why might you want one?

• Anywhere you might use a bunch of chips – or a printed circuit board, or several...

• SoC - “System-on-a-chip” • Complex parallel function – programmed in HDL • hardware description language • Low -> high performance range • Low-medium cost – smallest is < $1.00

– largest are < $500.00

• for a million “gates” :-)

Previous Projects

• 1. Review material from ECE 171 and ECE 271 about logic circuits, microprocessors and PLDs.

• 2. Find on Internet data sheets of top companies that produce processors or programmable devices that may be used in your robotic project this year.

• 3. Learn about programmable devices and boards that we have in the lab. Dr. Greenwood has the whole FPGA lab with programming tools and interfaces as well.

• 4. For the following tasks : robot theatre, robot soccer, robot sumo, biped robot walker, analyze the best choice of microcontrollers or other devices to implement control.

Sources

•Curtis Bahn, RPI • J.E. Wampler •Michael Rodemer, University of Michigan, School of Art and Design •Physics and Media Group, MIT •Josh R. Fairley •Dr. Raymond S. Winton •Mike Haney, University of Illinois •Steve Benkovic, Cal State University , Northridgehttp://homepage.mac.com/Sbenkovic [email protected]

•Franklin Alioto, Christine Beltran, Eric Cina, Vince Francisco, Margo Gaitan, Matthew O’Connor, Mike Rasay.

•Kenneth Chin and Prang Chim • Dr. Jim Ostrowski, Bob Miller, Wally Szczesniak, Terry Kientz, Brett Balogh , Siddharth Deliwala, John Bowen, Darnel Degand, Kapil Kedia, Adrian Fox, Christopher Li