Transcript Tokyo Tech Template

A 60-GHz CMOS Direct-Conversion
Wireless Transceiver
Ryo Minami
Advisor: Kenichi Okada
Co-Advisor: Akira Matsuzawa
Tokyo Institute of Technology, Japan
0
Outline
• Motivation
• RF Front-end
─
60GHz injection-locked oscillator(ILO) with
20GHz phase lock loop(PLL)
─ 60GHz transmitter(Tx)
─ 60GHz receiver(Rx)
• Measurement and Comparison
• Conclusion
1
Outline
• Motivation
• RF Front-end
─
60GHz injection-locked oscillator(ILO) with
20GHz phase lock loop(PLL)
─ 60GHz transmitter(Tx)
─ 60GHz receiver(Rx)
• Measurement and Comparison
• Conclusion
2
Motivation
• 60GHz CMOS direct-conversion transceiver for
multi-Gbps wireless communication
IEEE 802.11ad specification
 57.24GHz - 65.88GHz
 2.16GHz/ch x 4channels
 QPSK  3.5Gbps/ch
 16QAM  7Gbps/ch
2.16 GHz
240
MHz
120
MHz
1.76 GHz
1
2
3
4
fGHz
57 58 59 60 61 62 63 64 65 66
3
Challenges for mmW Transceivers
• Target
– a low-power direct-conversion RF
front-end with 4-channel coverage
– very low phase noise
• Design complexity
– 2.4GHz vs 60GHz (25x)
– 20MHz-BW vs 2.16GHz-BW (108x)
4
Phase Noise Requirement
For 16QAM direct-conversion, -90dBc/Hz@60GHz is required.
D Required CNR [dB]
5
4
3
16QAM
2
1
0
-100
AM-AM of PA
-98
-96
-94
QPSK
-92
-90
-88
-86
-84
Phase noise [dBc/Hz] @ 1MHz offset
5
LO Topologies 1
• 60GHz QVCO[1]
• Low Q for capacitors
Poor Phase Noise
• 30GHz push-push VCO[2]
90 degree hybrid
• 2nd harmonic
• 90 degree hybrid
I/Q mismatch
[1] K. Scheir, et al., ISSCC 2009 [2] C. Marcu, et al., ISSCC 2009
6
Proposed Topology
• 20GHz PLL + 60GHz Quadrature Injection Locked
Oscillator
• Good tradeoff between phase noise & tuning range
• Target : 20dB improvement of phase noise
7
Outline
• Motivation
• RF Front-end
─
60GHz injection-locked oscillator(ILO) with
20GHz phase lock loop(PLL)
─ 60GHz transmitter(Tx)
─ 60GHz receiver(Rx)
• Measurement and Comparison
• Conclusion
8
Block Diagram
• Tx : 4-stage PA, Active mixer,
• Rx : 4-stage LNA, Passive mixer
• LO : 60GHz ILO, 20GHz PLL
9
60GHz Quadrature LO
36MHz ref.
PFD
20GHz PLL
CP
60GHz QILO
LPF
19.44GHz
20.16GHz
20.88GHz
21.60GHz
(27,28,29,30)
5
4 CML
Q
I
58.32GHz
60.48GHz
62.64GHz
64.80GHz
• Wide frequency tuning range
• Phase noise improvement by injection locking
10
Quadrature Injection Locked Osc.
I-
VDD
20GHz
Q-
VDD
I+
Q+
20GHz
• 60GHz QILO works as a tripler with 20GHz PLL.
• Full 4-channel coverage is realized
with < -95dBc/Hz@1MHz-offset.
11
Phase noise
-40
Ch1:
58.32[GHz]
-50
-60
Phase noise [dBc/Hz]
Phase noise [dBc/Hz]
-40
-70
-80
-90
-100
-110
-120
-60
-70
-80
-90
-100
-110
-120
0.001
0.01
0.1
1
Offset frequency [MHz]
10
0.001
0.01
0.1
1
Offset frequency [MHz]
10
-40
-40
Ch3:
62.64[GHz]
-50
-60
Phase noise [dBc/Hz]
Phase noise [dBc/Hz]
Ch2:
60.48[GHz]
-50
-70
-80
-90
-100
-110
-120
Ch4:
64.80[GHz]
-50
-60
-70
-80
-90
-100
-110
-120
0.001
0.01
0.1
1
Offset frequency [MHz]
10
0.001
0.01
0.1
1
Offset frequency [MHz]
10
-95dBc/Hz@1MHz-offset has been realized in all channels.
12
Performance comparison（60GHz PLL）
fref[MHz]
VCO range
[GHz]
Target
This Work
(PLL+QILO)
[1]
(60GHz
QVCO)
[2]
(30GHz VCO
+90o hybrid)
-
36.0
100.0
117
58.3 ~ 64.8 57.8 ~ 65.0 57.0~66.0
59.6~64
Phase noise
@1MHz[dBc/H
z]
<90.0
-96.3
-75.0
-72.3
Power
[mW]
-
106.3
78.0
63.1
Output type
Quadrature
Quadrature
Quadrature
Quadrature
[1] K. Scheir, et al., ISSCC 2009 [2] C. Marcu, et al., ISSCC 2009
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Tx Blocks
4-stage PA
MIM TL
MIM TL
TL
to antenna
Up-conversion mixer
from BB I/Q
capacitive cross-coupling [3]
from LO
[3] W. Chan, et al., JSSC 2008
14
Rx Blocks
4-stage CS-CS LNA
ESD protection
from antenna
W=1mm x40 1mm x40 2mm x20 2mm x20
Down-conversion mixer
Parallel-line trans.
from LO
to BB I/Q
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Outline
• Motivation
• RF Front-end
─
60GHz injection-locked oscillator(ILO) with
20GHz phase lock loop(PLL)
─ 60GHz transmitter(Tx)
─ 60GHz receiver(Rx)
• Measurement and Comparison
• Conclusion
16
Die Photo
65nm CMOS (RF)
LO BUF.
I MIXER
LNA
Q.OSC.
LNA
Q MIXER
LO BUF.
4.2mm
PLL LO BUF.
Logic
I MIXER
PA
LO BUF.
65nm CMOS
Tx:1.96mm2
Rx:1.77mm2
PLL:1.37mm2
Logic:0.38mm2
Q.OSC.
Q MIXER LO BUF.
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RF Measurement Setup
Power supply RF board
(Tx mode)
AWG
I/Q
RF board Power supply
(Rx mode)
Oscilloscope
I/Q
Agilent M8190A
Agilent DSA91304A
Laptop PC
Control signals
Control signals
Laptop PC
with VSA 89600
DC supply
Rx
I/Q output (Rx)
6-dBi antenna
I/Q input (Tx)
Tx
16.3mm x 14.4mm
DC supply
[4] R. Suga, et al., EuMC 2011
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7.0Gb/s 16QAM (max 10Gb/s)
Channel
ch.1
ch.2
ch.3
ch.4
Max rate
Constellation
Spectrum
10
10
10
10
0
0
0
0
0
-10
-10
-10
-10
-10
-20
-20
-20
-20
-20
-30
-30
-30
-30
-30
-40
55.08
-40
57.24
-40
59.40
-40
61.56
58.32
61.56
60.48
63.72
62.64
65.88
10
64.80
68.04
-40
59.40
62.64
65.88
Data rate*
7.0Gb/s 7.0Gb/s 7.0Gb/s 7.0Gb/s 10.0Gb/s
EVM**
-23.0dB -23.0dB -23.3dB -22.8dB -23.0dB
Distance***
(ch.3)
(ch.3)
0.3m
0.5m
0.5m
0.3m
>0.01m
(ch.3)
*The roll-off factor is 0.25. The bandwidth is 2.16GHz except for Max rate.
**EVM through Tx and Rx boards.
***Maximum distance within a BER of 10-3. The 6-dBi antenna in the package is used.
19
Performance Comparison
Arch.
IMEC[5]
CEALETI[6]
SiBeam
[7]
This
work
Max. rate
in 16QAM
Distance for BER
<10-3
PDC
(Tx/Rx)
Direct 7Gb/s
ch.1-4(EVM < -17dB) 176mW
/112mW
(not wireless)
(w/o PLL)
Hetero 3.8Gb/s
ch.1-4
EVM=-20.7dB(Tx)
EVM=-19.2dB(Rx)
Hetero 7Gb/s
Direct 10Gb/s
ch.2-3 (EVM < -19dB)
50m (LOS)
16m (NLOS)
ch.1-4 (EVM < -23dB)
1.3-1.6m (QPSK)
0.3-0.5m (16QAM)
[5] V. Vidojkovic, et al., ISSCC 2012 [6] A. Siligaris, et al., ISSCC 2011
[7] S. Emami, et al., ISSCC 2011
1,357mW
/ 454mW
1,820mW
/
1,250mW
319mW
/ 223mW
20
Data rate [Gb/s]
Performance Comparison
20
QPSK+16QAM
direct-conversion
18
other arch.
16
Tokyo Tech all oscillators inc.
14
QPSK+16QAM
12
10
8
Univ. of Toronto
IMEC 16QAM
6
SiBeam, CEA-LETI
UCB
4
NEC
OOK FSK
Toshiba
2
OOK
0
2007 2008 2009 2010 2011 2012 2013
Year
Outline
• Motivation
• RF Front-end
─
60GHz injection-locked oscillator(ILO) with
20GHz phase lock loop(PLL)
─ 60GHz transmitter(Tx)
─ 60GHz receiver(Rx)
• Measurement and Comparison
• Conclusion
22
Summary and Conclusion
• A 60-GHz direct-conversion wireless transceiver
is implemented using CMOS 65nm process.
• Excellent phase noise has been realized in full 4channels.
• The first complete transceiver covering full 4
channels with 16QAM.
• Max 10Gbps data rate has been realized.
• A high-speed low-power mmW transceiver has
been realized.
23
Thank you for your attention.
24
Backup slides
25
60GHz Quadrature LO Scenario
• 60GHz quadrature PLL
– Phase noise degradation
e.g. -75dBc/Hz@1MHz-offset at 60GHz [1]
• 60GHz PLL with 90o hybrid
[2]
– I/Q mismatch
• 60GHz quadrature ILO with 20GHz PLL[This work]
– ILO: Injection-locked oscillator
– Very wide tuning
– Excellent phase noise
[1] K. Scheir, et al., ISSCC 2009
[2] C. Marcu, et al., ISSCC 2009
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Schematic of QILO
• I-Q coupling with tail transistor
• Half side injection
In
Qn
varactor
INJn
VDD
INJp
Ip
Qp
27
back-to-back layout
• I-Q coupling path
– coventional：40um
this work：8um
– reduction of parasitic component
– Low I-Q mismatch
I-
Q-
85um
VDD
180um
Die photo of QILO
VDD
I+
Q+
Schematic
28
Layout of ILO
29
Injection Locked Oscillator（ILO）
Pulling of VCOs
60GHz
60GHz
60.1GHz
Injection Lock
60/n GHz
n=1,2,3…
60GHz
Free-run: 60.1GHz → Locked: 60GHz
Phase noise is determined by following equation[12].
[12] X. Zhang, TMTT 1992
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MIM Transmission Line
• De-coupling use
• Modeling accuracy
• Avoiding self-resonance of
parallel-plate capacitors
GND
MIM TL
GND
Measured
Model
Z0 [Ohm]
10
9
8
7
6
5
4
3
2
1
0
MIM capacitor
MIM transmission line
GND
TL
0
10
20
30
40
50
Frequency [GHz]
T. Suzuki, et al., ISSCC 2008
60
70
GND
50W transmission line
31
RF Performance Summary
Tx
CG
P1dB
18dB
-2dBm
Psat
5.6dBm
LO
Injection PLL
Ref. spur
Rx
CG
NF
23dB (high-gain mode)
9dB (low-gain mode)
< 4.9dB (high-gain mode)
IIP3
-14dBm (low-gain mode)
19.44, 20.16, 20.88, 21.60GHz
<-58dBc @ 20.16GHz
Locking range
1.4GHz
Quadrature ILO
58.0-64.7GHz (free-run)
Phase noise@1MHz-offset < -95dBc/Hz (every channel)
32
SNDR[dB]
Pout, IM3, Noise Floor[dBm]
Measured Rx SNR
40
30
20
10
0
-10
-20
-30
-40
-50
-60
-70
-80
16QAM(17dB)
SNDR
QPSK(10dB)
High Gain
Low Gain
Pout
IM3
Noise
Floor
-70
-60
-50
-40
Pin [dBm]
-30
-20
-10
33
Link Budget
Modulation
Data rate (2.16GHz-BW)
QPSK
1.5m
3.5Gb/s
Tx output
Back-off
Tx/Rx antenna gain
Implementation loss
NF
Received CNR
Margin
6.0dBm
4.0dB
5.0dB
6.0dBi
-3.0dB
6.0dB
14.0dB
22.5dB
+4.6dB
+4.3dB
Distance
16QAM
0.5m
7.0Gb/s
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Mixer Layout (Core)
• Mixer core excluding intersection
─ LO line and RF line cross in matching network
• Mixer core including intersection
─ bad symmetrical property
RF+
RF+
LO+
RF-
RF-
LO-
Symmetric core
Asymmetric core
LO-
LO+
35
Symmetric Core Layout
• Symmetric core needs crossed and
complicated matching network.
RF+
IF+
IF-
RFLO+
LO-
36
Asymmetric Core Layout
• Asymmetric core can realize simple
matching network.
IF+ IFRF+
LO+
RF-
LO-
37
I/Q Mismatch by Mixer Layout
• Sideband Rejection Ratio (SRR)
I Mixer
0o
BB input
0o
RF output
60GHz LO
90o
90o
BB input
Q Mixer
Symmetric
core
Asymmetric
core
SRR
Amplitude
Error
Phase
Error
-24.5 [dB]
0.04[dB]
6.8[deg]
-42.3[dB]
0.02[dB]
0.9[deg]
38
Performance Comparison
Arch.
IMEC[5]
CEALETI[6]
SiBeam
[7]
This
work
Max. rate
in 16QAM
Distance for BER
<10-3
PDC
(Tx/Rx)
Direct 7Gb/s
ch.1-4(EVM < -17dB) 176mW
/112mW
(not wireless)
(w/o PLL)
Hetero 3.8Gb/s
ch.1-4
EVM=-20.7dB(Tx)
EVM=-19.2dB(Rx)
Hetero 7Gb/s
Direct 10Gb/s
ch.2-3 (EVM < -19dB)
50m (LOS)
16m (NLOS)
ch.1-4 (EVM < -23dB)
1.3-1.6m (QPSK)
0.3-0.5m (16QAM)
[5] V. Vidojkovic, et al., ISSCC 2012 [6] A. Siligaris, et al., ISSCC 2011
[7] S. Emami, et al., ISSCC 2011
1,357mW
/ 454mW
1,820mW
/
1,250mW
319mW
/ 223mW
39
Performance Comparison
Max. rate Distance for BER <10-3
in 16QAM with 2.16GHz-BW
IMEC[5]
CEA-LETI
[6]
SiBeam
[7]
This work
Area
7Gb/s
ch.1-4(EVM < -17dB)
(not wireless)
0.7mm2
3.8Gb/s
ch.1-4
EVM=-20.7dB(Tx)
EVM=-19.2dB(Rx)
9.3mm2(TRx)
0.46mm2(PA)
3.8Gb/s
ch.2-3 (EVM < -19dB)
50m (LOS)
16m (NLOS)
72.2mm2(Tx)
72.7mm2(Rx)
10Gb/s
ch.1-4 (EVM < -23dB)
1.3-1.6m (QPSK)
0.3-0.5m (16QAM)
5.48mm2
[5] V. Vidojkovic, et al., ISSCC 2012 [6] A. Siligaris, et al., ISSCC 2011
[7] S. Emami, et al., ISSCC 2011
40
Performance Comparison
Integration
#ch.
Data rate
(16QAM)
IMEC[5]
RF (Direct)
4
7Gb/s
(not wireless)
CEA-LETI
[6]
RF (Hetero)
4
3.8Gb/s
2
3.8Gb/s
4
RF: w/ wider-BW
10Gb/s
SiBeam [7]
Tokyo Tech
(This work)
RF (Hetero)
RF (Direct)
PDC (Tx/Rx)
176mW
/112mW
(w/o PLL)
1,357mW
/ 454mW
1,820mW
/ 1,250mW
[5] V. Vidojkovic, et al., ISSCC 2012 [6] A. Siligaris, et al., ISSCC 2011
[7] S. Emami, et al., ISSCC 2011
319mW
/ 223mW
41
Challenges for 60GHz Transceivers
• Direct-conversion full CMOS integration
• 16QAM/8PSK/QPSK/BPSK support for
IEEE802.15.3c, WiGig, Wireless HD, etc.
• 60GHz quadrature LO
– Low phase noise for 16QAM
– Wide frequency tuning (58-to-65GHz)
– I/Q phase balance
• 60GHz LNA
– Low NF & High linearity
– Wide bandwidth (gain flatness)
• 60GHz PA
– 10dBm output
– High PAE (>10%)
42
Injection-Locked Oscillator
Previous work [3]
This work
20GHz
20GHz
PPF
I
Dq
Q
60GHz 3Dq
I/Q mismatch
PPF:polyphase filter
[3] W. Chan, el al., ISSCC 2008
I
Q
60GHz
Single-side injection
- Small I/Q mismatch
- The same locking range
43