Transcript Op-Amp Selection - Electrical & Computer Engineering

ECE 2799
Electrical and Computer Engineering Design
“Op-Amp Selection”
Prof. Bitar
Ideal Op-Amp Characteristics
Linear Model
+
Non-Inverting Input
Vout
-
Inverting Input







vin
Rin
Avin
Input Resistance (Rin = ∞)
Open Loop Voltage Gain (A = ∞)
Output Resistance (Rout = 0)
Input Voltage Range (+/- ∞)
Output Voltage Range (+/- ∞)
Output Current Limit (+/- ∞)
Bandwidth (∞)
S. J. Bitar - 2007
Rout
Vout
Real Op-Amp Limitations








Output Voltage Range Limits
Output Current Limit
Bandwidth Limit
Slew Rate
Input Offset Voltages
Input Bias Currents
Input Voltage Range
Single Supply & Low Voltage Concerns
S. J. Bitar - 2007
Output Voltage Range Limits
Clipping at (or below) Supply Rails
V+
T
10.00
Expected Output
+
+
Vs
+
Actual Output
Vout1
-
5.00
R2
V+
OP1
R1
Output
V-
0.00
5V
-5.00
5V
V-
-10.00
0.00
S. J. Bitar - 2007
1.00m
Time (s)
2.00m
Output Current Limit
Check Output Current Spec
V+
+
+
Vs
5.00
T
Expected Output
+
Actual Output
Vout1
-
R Load 25 2.50
O P 1 uA741
V+
Output
V-
0.00
V1 10
-2.50
V2 10
V-
-5.00
0.00
S. J. Bitar - 2007
1.00m
Time (s)
2.00m
Bandwidth Limitation
Gain x BW = Constant
Check Gain Bandwidth Product (GBWP) Spec
+
V+
+
T
Open Loop Response
+
Vout
V-
OP1
80.0
V+
V1
100.0
R2
R1
Gain (dB)
Vs
120.0
60.0
40.0
V2
20.0
V-
0.0
1
10
S. J. Bitar - 2007
100
1k
10k
Frequency (Hz)
100k
1M
Slew Rate Limitation (V/μsec)
+
+
Vs
Ideal
T 5.00
IO P1
R2 4k
2.50
V+
Output
R1 1k
V+
V1 10V
+
+
0.00
Vout1
R2 4k
V2 10V
VV-
O P 1 uA741
-2.50
R1 1k
-5.00
0.00
10.00u
20.00u
30.00u
Time (s)
S. J. Bitar - 2007
40.00u
50.00u
Input Offset Voltage
V+
VOFFSET
994.72 μV
V+
+ + OP1 uA741
Vout1
R2 1M
V-
V+
+ + OP1 uA741
Vout1
R2 1M
V-
1.06V
V+
R1 1k
V1 10V
R1 1k
P1 100k
R3 1M
V2 10V
V-
V-
S. J. Bitar - 2007
205.89uV
Input Bias Currents
R3 = R1 || R2
AM1 80nA V+
V+
V1 10V
V2 10V
+ + OP1 uA741
Vout1 83mV
R2 1M
VAM2 80nA
R1 500k
V-
S. J. Bitar - 2007
V+
R3 333.3k
+ + OP1 uA741
Vout1 2.98mV
R2 1M
VR1 500k
Input Voltage Range Issues
Keep V- < Vin < V+
5.00
T
V+
V+
AM1
+
+
5V
U1
+
Vout1
Vs
AM1
-
5V
V-
V-
-5.00
6.00
V+
Vs
+
D1
D2
Vs
V-
-6.00
0.00
1.00m
Time (s)
Excessive Input Currents due to ESD Diode Protected Inputs
S. J. Bitar - 2007
2.00m
Input Voltage Range Issues
Add Current Limiting Resistor
V+
R1 10k AM1
+
+
Vs
40.00u
T
U1 LMC6462A/NS
+
Vout1 AM1
V-
-40.00u
6.00
V+
V1 5V
Vs
V1 5V
-6.00
0.00
V-
S. J. Bitar - 2007
1.00m
Time (s)
2.00m
Input Voltage Range Issues
Vout Phase Inversion and Clipping
w/ JFET Input Op-Amps
V+
V+
+
+
V1 5V
Vs
O P 1 LM358
T
4.00
+
Vout1
-
Vout1
0.00
3.00
Half-Wave Rectifier Attempt
Vs
-3.00
0.00
S. J. Bitar - 2007
1.00m
Time (s)
2.00m
Input Voltage Range Issues
Diode Clamp Fix
(for JFET Input Op-Amps)
T
V+
Vout1 0.00
V+
R1 10k
+
V1 5V
Vs
SD1 1N5817
+
3.00
O P 1 LM358
+
Vout1
-
-3.00
3.00
Vs
Half-Wave Rectifier w/ Schottky Diode Clamp
0.00
-3.00
0.00
S. J. Bitar - 2007
1.00m
Time (s)
2.00m
Single Supply & Low Voltage Concerns
LM741 - A Bad Choice for Low Voltage Single Supply Applications
T 5.00
Expected
V+
+
Vram p
+
+
Actual
4.00
O P 1 uA741
Vout
R1 4k
R2 1k
Output
-
3.00
2.00
V+
Vramp
1.00
5V
0.00
0.00
S. J. Bitar - 2007
500.00u
1.00m
Time (s)
1.50m
2.00m
Single Supply & Low Voltage Concerns
Improvement: Reaching the Ground Rail with the LM124, LM358
T 5.00
Expected
V+
+
Vram p
+
+
O P 1 LM358
Actual
4.00
Vout
R1 4k
R2 1k
Output
-
3.00
2.00
V+
Vramp
1.00
5V
0.00
0.00
500.00u
S. J. Bitar - 2007
1.00m
Time (s)
1.50m
2.00m
Low Voltage Single Supply Solutions
“Rail-To-Rail” Input AND/OR Output (CMOS) Op-Amps
V+
U1 O PA350/BB T
+
5.00
OPA350
+
LM741
4.00
Output
Vin
R3 1k R2 4k
+
O P A350
-
LM358
3.00
2.00
LM741
V+
Vin
1.00
5V
0.00
0.00
500.00u
S. J. Bitar - 2007
1.00m
Time (s)
1.50m
2.00m
Single Supply Issues
Problem: Output Cannot Swing Negative
T 2.00
Vcc
Vout
Vcc
+
+
Vout
1k
+
-
Vin
1Vpk
f=1kHz
OP1
2k
1.00
Voltage (V)
9V
Vin
0.00
Typical Inverting Amplifier
-1.00
0.00
S. J. Bitar - 2007
500.00u
Time (s)
1.00m
Single Supply Issues
Solution: Bias Ground Points to Vcc/2
Use Capacitive Coupling to Block DC and Pass AC
T 7.00
Vcc
Vcc
6.00
5.00
9V
R
Vout
R
Vcc
+
Vin
+
3.00
2.00
Vin
Vout
1k
-
+
C
Voltage (V)
4.00
1Vpk
f=1kHz
OP1
1.00
0.00
2k
-1.00
0.00
NOTE:
500.00u
Time (s)
Output Centered Around Vcc/2 (4.5V)
S. J. Bitar - 2007
1.00m
Single-Supply Issues
Non-Inverting Amplifier
V+
Vin
+
+
+
Vout
Vin
T
4.00
V-
O P 1 R2
3.00
R1
R
C1
V+
+
R
Output
V+
+
Vout
2.00
1.00
O P 1 R2
0.00
V+
Rth = 2R1 || 2R 1
Vth = (V+ )/ 2
2R1
2R1
-1.00
0.00
Copyright - Stephen J. Bitar 2006
1.00m
Time (s)
2.00m
Single-Supply Issues
Difference Amplifier
R2
V+
R1
+
+
T
4.00
Vout
+
Vd
V-
3.00
OP1
Output
R2
R1
Rth = 2R2 || 2R 2
Vth = (V+ )/ 2
2.00
1.00
V+
2R2
0.00
R1
+
+
2R2
V+
Vout
+
Vd
-1.00
0.00
OP1
R1
R2
Copyright - Stephen J. Bitar 2006
1.00m
Time (s)
2.00m
Single-Supply Issues
Schmitt Trigger Oscillator
T
V+
2.00
R2
V+
Vsqr
V1
V+
+
+
V2
+
Vtri
R1
+
-
V-
OP2
V-
OP1
0.00
-2.00
V-
Voltage (V)
R3
4.00
-4.00
C1
0.00
T
R3
R2
V+
Vsqr
V+
Vref
+
V1
R
+
+
Vtri
R1
+
-
R
Vref
10.00m
5.00m
Time (s)
10.00m
5.00
4.00
V+
OP2
Output
V+
5.00m
Time (s)
3.00
2.00
OP1
C1
1.00
0.00
0.00
Copyright - Stephen J. Bitar 2006