Transcript Building D Flip Flops - University of Hawaii

Building D Flip Flops
• Combinational Circuit Components
– Switches
– Voltage inverters
• D Clocked Latch
– Feedback to store bits
• D Flip Flop
– Two D clocked latches
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EE 260 University of Hawaii
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Building D Flip Flops
D Flip Flops
D Clocked Latches
Primitive Combinational Circuits
(Switches/Transisters)
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EE 260 University of Hawaii
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Combinational Circuit
Components
Normally
Open Switch
Control = L
Control = H
open
closed
L
Normally
Closed Switch
closed
L
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EE 260 University of Hawaii
H
open
H
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Combinational Circuit
Components
Voltage Inverters
(2 symbols)
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EE 260 University of Hawaii
Active
Device
L
H
H
L
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A Simple 1-Bit Memory
D
Q
Input to load
new state value
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State value
(1 bit)
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A Simple 1-Bit Memory
D
Q
Input to load
new state value
State value
(1 bit)
Two configurations:
Hold (store) = hold onto the state value
Load
= load a new state value
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EE 260 University of Hawaii
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Holding (Storing)
With Voltage Inverters
Devices drive each other
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Holding (Storing)
With Voltage Inverters
Devices drive each other
H
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Holding (Storing)
With Voltage Inverters
Devices drive each other
H
H
L
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Holding (Storing)
With Voltage Inverters
Devices drive each other
H
H
L
L
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Holding (Storing)
With Voltage Inverters
Devices drive each other
H
H
L
L
L
L
H
H
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EE 260 University of Hawaii
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Simple Memory: Two
Configurations
D
Q
Input to load
new state value
State value
(1 bit)
Two configurations:
Hold (store) = hold onto the state value
Load
= load a new state value
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EE 260 University of Hawaii
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Simple Memory: Two
Configurations
Hold
D
Load
Q
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D
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Q
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Simple Memory: Two
Configurations
Hold
D
Load
Q
D
Switches
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Q
Switches
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D Clocked Latch
clock
Q
D
clock
clock = L : Hold
clock = H : Load
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D Clocked Latch
Hold
D
Q
Clock
Q
=L
Clock
It similar to a D flip flop
but it reacts to the clock
differently
Load
Q=D
D
Q
Clock = H
It’s “transparent”
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EE 260 University of Hawaii
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Comparing Flip Flop and Latch
D
Q
Clock
Clock
D
Q-FlipFlop
Q-Latch
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Comparing Flip Flop and Latch
D
Q
Clock
Clock
D
T1
T2
Q-FlipFlop
T3
Q-Latch
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Comparing Flip Flop and Latch
D
Q
Clock
Clock
D
Q-FlipFlop
Q-Latch
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Comparing Flip Flop and Latch
D
Q
Clock
Clock
D
Q-FlipFlop
Q-Latch
Store
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Store
Store
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D Flip Flop vs. D Clocked
Latch
• D flip flop
– Triggered on positive edge of clock
– Output Q (and state) changes only at a time
instant
• D clocked latch
– Output Q changes (with D) while clock is H
– Output Q changes during a window of time
– Trickier to use since lots of changes can happen
during a time duration
• Flip flops are preferred to latches in designing circuits
• Latches are used in memory circuits, e.g., RAM
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D Flip Flop
D
Clock
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Q
D
Q
Clock
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D Flip Flop
D
Q
Clock
Clock = L
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Load
D Q
D
Q
Clock
Hold
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D Flip Flop
D
Q
Clock
D
Q
Clock
Clock = L
Load
D Q
Hold
Clock = H
Hold
Load
D Q
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EE 260 University of Hawaii
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D Flip Flop
Load
(loads input)
Hold
(output doesn’t
change)
L
D
Clock
Q
D
Q
Clock
Input really doesn’t
get stored until the upward
clock transition
Clock
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EE 260 University of Hawaii
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D Flip Flop
Load
(loads input)
H
Hold
(output doesn’t
change)
L
H
D
Clock
Q
D
Q
Clock
Input really doesn’t
get stored until the upward
clock transition
Clock
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EE 260 University of Hawaii
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D Flip Flop
Load
(loads input)
H
Hold
(output doesn’t
change)
Clock
Q
Hold
D
Clock
H
H
L
H
D
Load
(transfers state
to output)
Q
D
Clock
Q
D
Q
Clock
Input really doesn’t
get stored until the upward
clock transition
Clock
Galen Sasaki
EE 260 University of Hawaii
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Summary
• Combinational circuit components
– switches and voltage inverters
• D clocked latch
– Built from switches and voltage inverters
– 2 configurations: load and hold
• D flip flop
– Built from two D latches in series
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EE 260 University of Hawaii
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