Transcript PowerPoint

Designing Energy-Efficient
Fetch Engines
Michele Co
Department of Computer Science
University of Virginia
Advisor:
Co-Advisor:
Committee:
Kevin Skadron
Dee A.B. Weikle
Jack Davidson (Chair)
James Cohoon, John Lach,
Christopher Milner
Overview
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•
•
•
•
Introduction
Fetch Engine Design Space
Related Work
Results
Summary
2
Introduction
• Energy efficiency
– Balance power and performance (runtime)
• Fetch Engine
– I-storage
– I-TLB
– Predictor
3
4
Fetch Engines are Important
• Provides instructions to execution units
– Impacts overall processor energy
• Bottleneck to performance
– Deep processor pipelines → high branch
misprediction penalty
– Mispredictions waste work and energy
5
Branch Prediction is Crucial to
Improved Performance
• Branch prediction is the biggest limiter of
performance [Jouppi & Ranganathan]
6
Why Study Fetch Engine Energy
Efficiency?
• High fetch bandwidth mechanisms
– Rotenberg, et al.; Black, et al.; many others
• Better branch predictor → better chip
energy-efficiency
– Parikh, et al.
• Recent branch predictors:
↑ accuracy, ↑ performance, ↑ area
– Jimenez; Seznec; Tarjan
7
What is the most energy efficient
fetch organization?
• Performance design ≠ Energy-efficiency design
• What improves energy efficiency?
– Caches?
– Branch predictors?
– Other?
Thesis:
• Branch prediction is key factor affecting energyefficiency
• Analytical methods are needed to help focus
design space studies
8
Overview
•
•
•
•
•
Introduction
Fetch Engine Design Space
Related Work
Results
Summary
9
Fetch Engine Design Space
• Design space parameters
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–
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Instruction storage order
Cache associativity and area
Instruction fetch bundle
Next fetch predictor
Instruction issue width
• Technology factors
– Leakage power
– Access latency
• System-level factors
– Context switching
10
Research Goals
• Evaluate fetch engine design space for
energy efficiency
• Develop techniques to aid in design space
evaluations
11
Contributions
• Fetch engine design space evaluation for
energy-efficiency
– Insight: Branch prediction and access latency
• Ahead-pipelined next trace prediction
• Evaluated the effect of context switching
12
Contributions
• Breakeven branch predictor energy
formulation
• Extension of breakeven formulation for inorder processors
• Evaluated potential for phase adaptation
for branch predictors
13
Overview
•
•
•
•
•
Introduction
Fetch Engine Design Space
Related Work
Results
Summary
14
Related Work
• Design space studies
– Friendly, et al.; Rotenberg, et al. (trace
caches)
• Power and energy consumption
– Hu, et al.; (trace caches)
– Bahar; Kim; Zhang (instruction caches)
– Parikh, et al. (branch predictors)
15
Overview
•
•
•
•
•
Introduction
Fetch Engine Design Space
Related Work
Results
Summary
16
Methodology
• Simulator and Power Models
– SimpleScalar
• Instruction cache and trace cache models
• Branch predictors, next trace predictors
• Context-switching
– Wattch
• Benchmarks
– SPECcpu1995, SPECcpu2000
• Metrics
– Performance: Instructions per Clock (IPC), branch misprediction
rate
– Energy-efficiency: Energy, Energy-Delay-Squared Product (ED2)
17
Fetch Engine Design Space Study
• Varied fetch organization
– Sequential trace cache
– Block-based trace cache
– Instruction cache
• Classic fetch
• Streaming fetch
– Branch predictor / trace predictor
• Varied component sizes
– 2 KB - 512 KB
ACM TACO, in review
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Fetch Engine Energy-Efficiency
2
ED - Percent Difference from
Classic I$ w/global perceptron
% Diff from classic I$
160%
Seq_T$
Block_based_T$
stream I$ w/trace pred
classic I$ w/trace pred
140%
120%
100%
80%
60%
40%
20%
0%
-20%
2
4
8
16
32
64
128
256
512
Maximum Component Area (KB)
• T$ only energy efficient at large areas
– Trace prediction constrained by small areas
• Branch prediction is determining factor!
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Ahead-pipelining Next Trace Prediction
• 17.2% IPC improvement, 29% lower ED2
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Branch Predictor Energy Budgets
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Etotal = Ebpred + Eremainder
ED2new ≤ ED2ref
Upper bound
Ebpred_budget
2
ref
ED
 2  Eremainder_new
Dnew
WCED 2005
21
Branch Predictor Energy Budgets
(Intuitively)
• How much energy may the branch
predictor afford to consume to break
even?
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Comparing Bpred Energy Budgets
Percent of Ebpred_budget Consumed
Pct of Ebpred_budget
Consumed
4-wide - 256 KB Caches - Integer
300%
250%
200%
150%
100%
50%
0%
100%
Break even
perlbmk
hashed perceptron
hybrid.2KB
hybrid.4KB
hybrid.8KB
gshare.2KB
gshare.4KB
gshare.8KB
ogehl.8KB
piecewise.8KB
piecewise.32KB
piecewise.256KB
100 Pct
• Eactual < Ebudget → More energy efficient
• Branch predictors are not equally energy efficient for all 23
programs
Breakeven Methodology
How well must a branch predictor perform in
order to break even in energy-efficiency?
1. Choose an energy-efficiency metric
•
Energy, ED2
2. Develop a breakeven formulation using
the chosen metric
•
Enew≤Eref; ED2new≤ED2ref
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Step 3: Expand the Formulation
3. Represent formulation in terms of factors that
don’t require cycle-accurate simulation
•
Base processor – power, misprediction penalty, clock
frequency
Program – number of instructions, branch density
Branch predictor – power, misprediction rate
•
•
P
 P
rem
 Pnew_bp I  (MPpenalty * MP_rate new_BP * BD) 
P ET EP T
I new
(MP
new
newpenalty * MP_rate
ref refref_BP * BD) 
rem  Pref_bp
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Step 4: Solve the Formulation
4. Solve formulation for parameter of interest
•
Change in misprediction rate (MP∆)
MPΔ 

Pbp bb_size  Rate MPwithout_bpMPpenalty
MPpenalty Prem  Pbp 

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Step 5: Narrow the Design Space
5. Cull design space, eliminate noninteresting design points from cycleaccurate simulation evaluation
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MP∆ by Misprediction Penalty
183
250%
133
200%
83
150%
33
100%
-17
50%
2
3
4
5
6
7
Correct Pred
Rate (%)
MP∆ (pct. pts.)
Reference: Static BTFNT - Energy Breakeven
(330 MHz, Base Power: 1.85528109e-9 J/cycle)
8
Misprediction Penalty (cycles)
ev6
piecewise
ogehl
bimod
28
MP∆ by Base Processor Power
220%
180%
140%
100%
60%
Correct
Pred Rate
(%)
153
113
73
33
-7
1.
00
7. E-1
59 1
1. E-1
51 0
2. E-0
26 9
3. E-0
01 9
3. E-0
76 9
4. E-0
51 9
5. E-0
25 9
6. E-0
00 9
6. E-0
75 9
7. E-0
50 9
8. E-0
25 9
9. E-0
00 9
9. E-0
75 9
E09
MP∆
(perc.
pts.)
Reference: Static BTFNT - Energy Breakeven
Misprediction Penalty: 7 cycles
(330 MHz, Base Power: 1.85528109e-9 J/cycle)
Ave Base Processor Power (J/cycle)
ev6
piecewise
ogehl
bimod
29
Branch Predictor Benefit/Cost
Energy Benefit/Cost Ratio
E_benefit/E_cost
Reference: Static BTFNT
(330 MHz, Base Power: 1.85528109e-9 J/cycle)
25
20
15
10
5
0
2
3
4
5
6
7
8
Misprediction Penalty (cycles)
bimod
alpha
ogehl
piecewise
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Adapting the Fetch Engine for
Energy Efficiency
• Proposed Idea
– Adapt branch predictor based on program
phase behavior
• Finding
– Little potential for phase-based branch
predictor adaptation
• Given state-of-the-art branch predictors and the
SPEC2000 benchmark suite
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Overview
•
•
•
•
•
Introduction
Fetch Engine Design Space
Related Work
Results
Summary
32
Contributions
• Fetch engine design space evaluation
considering energy-efficiency [ACM TACO, in review]
• Ahead-pipelined next trace predictor [ACM TACO, in
review]
• Effects of context-switching on branch predictors
[ISPASS 2001]
• Branch prediction breakeven formulation
[WCED
2005]
• Branch predictor benefit/cost formulation
• Potential for phase-based branch predictor
adaptation
33
Future Work
• Fetch engine design space
– More sophisticated trace selection heuristics
• Branch predictor breakeven formulation
– Extend to consider more components
• Benefit-cost methodology
– Extend to more complex processor designs
– Incorporate into a semi-automated tool
34
Observations
• Trace caches and instruction caches have
similar performance and energy-efficiency
• Branch prediction is critical to energy-efficiency
• Access latency is a critical limiter to branch
prediction accuracy
• Techniques that attack this problem can help
branch prediction accuracy (ahead-pipelined
NTP)
• Realistic time slices have little effect on branch
predictor accuracy
35
Observations (cont’d)
• Increasing leakage ratio does not affect
relative energy-efficiency of fetch designs
• Design space studies are complex and
time consuming. Analytical methods are
needed to narrow the evaluation space.
– Branch predictor breakeven energy budget
– Benefit/cost formulation and metric
36
Designing Energy-Efficient
Fetch Engines
Michele Co
Department of Computer Science
University of Virginia
Advisor:
Committee:
Kevin Skadron
Jack Davidson (Chair)
James Cohoon, John Lach,
Christopher Milner, Dee A.B. Weikle