Transcript ppt
ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 2: September 10, 2010 Transistor Introduction 1 Penn ESE370 Fall2010 -- DeHon Today • MOSFET • Capacitive and resistive loads • Simplified models – Zero-th order model • Good enough for ??? – First order model • There are always Rs and Cs 2 Penn ESE370 Fall2010 -- DeHon MOSFET • Metal Oxide Semiconductor Field Effect Transistor – New device – Primary active component for the term – Three terminal device • Voltage at gate controls conduction between two other terminals (source, drain) 3 Penn ESE370 Fall2010 -- DeHon MOSFET I vs. Vgs, Vds 4 Penn ESE370 Fall2010 -- DeHon MOSFET I vs. Vgs, Vds • Will dig into understanding during term • Today simple ways to reason about gross behavior – Static/DC 5 Penn ESE370 Fall2010 -- DeHon Preclass • What voltage do the cases converge to? 6 Penn ESE370 Fall2010 -- DeHon 7 Penn ESE370 Fall2010 -- DeHon 8 Penn ESE370 Fall2010 -- DeHon 9 Penn ESE370 Fall2010 -- DeHon 10 Penn ESE370 Fall2010 -- DeHon 11 Penn ESE370 Fall2010 -- DeHon 12 Penn ESE370 Fall2010 -- DeHon 13 Penn ESE370 Fall2010 -- DeHon Conclude? • DC/Steady-State – Ignore the capacitors 14 Penn ESE370 Fall2010 -- DeHon Quasistatic • Static – inputs (and circuit) unchanging, how does it settle? • Dynamic – what happens when things change • Quasi-Static – inputs transition, circuit responds, and settles – Dynamic transition to roughly static states 15 Penn ESE370 Fall2010 -- DeHon Quasistatic Relevance? • How relevant to a combinational digital circuit? • How relevant to a clocked digital circuit? 16 Penn ESE370 Fall2010 -- DeHon Zero-th Order MOSFET • Ideal Switch Vgs > Vth conducts Vgs < Vth does not conduct Vth – threshold voltage 17 Penn ESE370 Fall2010 -- DeHon Zero-th Order MOSFET 18 Penn ESE370 Fall2010 -- DeHon N-Type, P-Type • N – negative carriers – electrons • Switch turned on positive Vgs • P – positive carriers – holes • Switch turned on negative Vgs Vth<0 Vgs<Vth to to conduct 19 Penn ESE370 Fall2010 -- DeHon Why useful? 20 Penn ESE370 Fall2010 -- DeHon What happens when Vin=Vdd>Vth 21 Penn ESE370 Fall2010 -- DeHon What happens when Vin=Vdd>Vth Penn ESE370 Fall2010 -- DeHon Vgs=Vdd > Vth 22 What happens when Vin=Vdd>Vth Penn ESE370 Fall2010 -- DeHon Vgs=Vdd > Vth 23 What happens when Vin=Vdd>Vth Vgs=0 > Vth Penn ESE370 Fall2010 -- DeHon Vgs=Vdd > Vth 24 What happens when Vin=Vdd>Vth Vgs=0 > Vth Penn ESE370 Fall2010 -- DeHon Vgs=Vdd > Vth 25 What happens when Vin=Vdd>Vth Vgs=0 > Vth V2=Gnd Penn ESE370 Fall2010 -- DeHon Vgs=Vdd > Vth 26 What happens when Vin=Vdd>Vth Vgs=0 > Vth V2=Gnd Penn ESE370 Fall2010 -- DeHon Vgs=Vdd > Vth Vgs=0 < Vth 27 What happens when Vin=Vdd>Vth Vgs=0 > Vth V2=Gnd Penn ESE370 Fall2010 -- DeHon Vgs=Vdd > Vth Vgs=0 < Vth 28 What happens when Vin=Vdd>Vth Vgs=0 > Vth V2=Gnd Penn ESE370 Fall2010 -- DeHon Vgs=Vdd > Vth Vgs=0 < Vth Vout=Vdd 29 What happens when Vin=0<Vth 30 Penn ESE370 Fall2010 -- DeHon What happens when Vin=0<Vth V2=Vdd Vout=0 31 Penn ESE370 Fall2010 -- DeHon What function? Buffer • Vin=Vdd Vout=Vdd • Vin=0 Vout=0 32 Penn ESE370 Fall2010 -- DeHon Why Useful? • Allows us to reason (mostly) at logic level about steady-state functionality of typical gate circuits 33 Penn ESE370 Fall2010 -- DeHon Why adequate? • Static analysis – can ignore capacitors • Capacitive loads – resistances don’t matter • Feed forward for gates – – don’t generally have loops – can work forward from known values • Logic drive rail-to-rail – Don’t have to reason about intermediate voltage levels 34 Penn ESE370 Fall2010 -- DeHon What not tell us? • Delay • Dynamics • Behavior if not – Capacitively loaded – Loops 35 Penn ESE370 Fall2010 -- DeHon First Order Model • Switch – Loads input capacitively – Has finite drive strength 36 Penn ESE370 Fall2010 -- DeHon First Order Model 37 Penn ESE370 Fall2010 -- DeHon First Order Model 38 Penn ESE370 Fall2010 -- DeHon Refine to First Order 39 Penn ESE370 Fall2010 -- DeHon Zero-th Order Tells us how switches set (Vin=0) V2=Vdd Vout=0 40 Penn ESE370 Fall2010 -- DeHon Zero-th Order Tells us how switches set (Vin=0) V2=Vdd Vout=0 41 Penn ESE370 Fall2010 -- DeHon Zero-th Order Tells us how switches set (Vin=0) • Leaves an RC Circuit we can analyze 42 Penn ESE370 Fall2010 -- DeHon Zero-th Order Tells us how switches set (Vin=0) • Look at middle stage 43 Penn ESE370 Fall2010 -- DeHon What more this tell us? • Delay • Quastistatic behavior • Voltage settling with resistive loads – At least some basis for reasoning 44 Penn ESE370 Fall2010 -- DeHon What is this leaving out? 45 Penn ESE370 Fall2010 -- DeHon What is this leaving out? 46 Penn ESE370 Fall2010 -- DeHon What leaving out? • What happens at intermediate voltages – Not rail-to-rail • Details of dynamics, including… – Input not transition as step – Intermediate drive strengths change with Vgs – As output charges Vds changes, changing drive strenght • Isn’t really 0 current below threshold 47 Penn ESE370 Fall2010 -- DeHon Engineering Control • Vth – process engineer • Drive strength – circuit engineer control with sizing • Supply voltages – range set by process, detail use by circuit design 48 Penn ESE370 Fall2010 -- DeHon Engineering Control: Threshold 49 Penn ESE370 Fall2010 -- DeHon Engineering Control: Drive Strength 50 Penn ESE370 Fall2010 -- DeHon Wire Capacitance 51 Penn ESE370 Fall2010 -- DeHon Wire Capacitance A C r 0 d Penn ESE370 Fall2010 -- DeHon 52 Wire Resistance 53 Penn ESE370 Fall2010 -- DeHon Wire Resistance R Penn ESE370 Fall2010 -- DeHon L A 54 Wire Resistance • Sanity check – Wire twice as long = resistors in series – Wire twice as wide = resistors in parallel R Penn ESE370 Fall2010 -- DeHon L A 55 There are always Rs and Cs • Modeling vs. discrete components • Dominant effects – Rbig + Rsmall ≈ Rbig – Cbig || Csmall ≈ Csmall 56 Penn ESE370 Fall2010 -- DeHon Admin • TA: Andrew Townley – Email: atownley – Office Hours: seas • Lecture Monday: building gates – Reading • Lab on Wednesday 57 Penn ESE370 Fall2010 -- DeHon MOSFET 58 Penn ESE370 Fall2010 -- DeHon Big Ideas • MOSFET Transistor as switch • Purpose-driven simplified modeling – Aid reasoning – Sanity check – Simplify design • New perspective on Rs and Cs 59 Penn ESE370 Fall2010 -- DeHon