Transcript slides

Independence Fault Collapsing
Alok S. Doshi (Speaker)
Vishwani D. Agrawal
Auburn University, Department of Electrical and Computer Engineering
Auburn, AL 36849, USA
Aug.13, 2005
VDAT05: Doshi and Agrawal
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Outline
• Motivation
• Fault Classification
• Independence Graph and Matrix
• Independence Fault Collapsing
• Concurrent Test Generation
• Conclusions and Future Work
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Motivation
a
x
b
c
d
y
e
C17 - ISCAS85 Benchmark Circuit
ATPG
Hitec1
Fastest2
Gentest3
Tests
10
7
7
Minimum 4
T. M. Niermann and J. H. Patel, “HITEC: A Test Generation Package for Sequential
Circuits,” Proc. European Design Automation Conference, Feb. 1991, pp. 214-218.
2 T. P. Kelsey, K. K. Saluja, and S. Y. Lee, “An Efficient Algorithm for Sequential Circuit
Test Generation,” IEEE Trans. Computers, vol. 42, no. 11, pp. 1361-1371, Nov. 1993.
3 W. T. Cheng and T. J. Chakraborty, “Gentest: An Automatic Test Generation System for
Sequential Circuits,” Computer, vol. 22, no. 4, pp. 43–49, April 1989.
1
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Fault Classification
T(F1)
T(F1) = T(F2)
T(F2)
(a) F1 and F2 are equivalent.
T(F1)
T(F2)
(c) F1 and F2 are independent.
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(b) F1 dominates F2.
T(F1)
T(F2)
(d) F1 and F2 are concurrently testable.
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Definitions
Independent Faults4:
Two faults are independent if and only if they
cannot be detected by the same test vector.
Concurrently-Testable Faults:
Two faults that neither have a dominance
relationship nor are independent, are defined
as concurrently-testable faults.
4 S.
B. Akers, C. Joseph, and B. Krishnamurthy, “On the role of Independent Fault Sets in the
Generation of Minimal Test Sets,” in Proc. International Test Conf., 1987, pp. 1100-1107.
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Structural Independences
sa1
sa0
sa0
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sa1
sa1
sa0
sa1
sa1
sa0
sa1
sa1
sa0
sa0
sa1
sa1
sa0
sa1
sa0
sa0
sa0
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Implied Independences
Equivalence implied independence:
If two faults are equivalent then all faults that
are independent of one fault are also
independent of the other fault.
Dominance implied independence:
If one fault dominates a second fault then all
faults that are independent of the first fault are
also independent of the second fault.
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Functional Independences
Redundant faults Fj are
independent of Fi
Redundant faults Fj are
independent of Fi
CUT
C0
CUT
C0
Primary
Outputs
Primary
Output
Primary
Inputs
CUT
C0
Primary
Inputs
CUT(Fi)
Ci
CUT(Fi)
Ci
(a) Finding all faults independent of Fi in a single output circuit.
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CUT
C0
(b) Finding all faults independent of Fi in a multiple output circuit.
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Example Circuit
2-1
a
e
x
5-1
1-1
b
c
d
4-1
3-1
7-1
6-1
8-1
11-1
9-1
y
10-1
C17 - ISCAS85 Benchmark Circuit
5 R.
K. K. R. Sandireddy and V. D. Agrawal, “Diagnostic and Detection Fault Collapsing for
Multiple Output Circuits," in Proc. Design, Automation and Test in Europe (DATE) Conf., Mar.
2005, pp. 1014 - 1019.
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Independence Matrix and Graph
F 1
2
3
4
5
6
7
8
9 10 11
1 0
1
1
1
1
1
0
0
1
0
1
2 1
0
0
1
1
0
1
0
0
0
1
3 1
0
0
0
1
1
1
1
0
1
1
4 1
1
0
0
1
0
1
0
0
0
1
5 1
1
1
1
0
0
0
1
1
1
0
6 1
0
1
0
0
0
1
1
1
0
0
7 0
1
1
1
0
1
0
1
1
0
0
8 0
0
1
0
1
1
1
0
1
1
1
9 1
0
0
0
1
1
1
1
0
1
1
10 0
0
1
0
1
0
0
1
1
0
1
11 1
1
1
1
0
0
0
1
1
1
0
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1
2
3
4
5
11
6
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8
9
10
10
Clique
A clique is defined as a fully-connected
subgraph, i.e., a subgraph in which every node
is connected to every other node.
A lower bound on the number of tests required
to cover all faults of an irredundant
combinational circuit is given by the size of
the largest clique of the independence graph.
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Cliques
1
2
3
4
5
1
2
3
4
5
11
6
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7
8
9
10
11
6
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8
9
10
12
Degree of Independence
Degree of Independence:
This is the number of edges attached to the
fault node and is computed for the ith fault by
adding all the elements of either the ith row or
the ith column of the independence matrix.
N
N
j=1
i=1
DI (ith fault) = Σ xij = Σ xji
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Degree of Independence
Fault
1
2
3
4
5
6
7
8
9
10
11
DI
1
0
1
1
1
1
1
0
0
1
0
1
7
2
1
0
0
1
1
0
1
0
0
0
1
5
3
1
0
0
0
1
1
1
1
0
1
1
7
4
1
1
0
0
1
0
1
0
0
0
1
5
5
1
1
1
1
0
0
0
1
1
1
0
7
6
1
0
1
0
0
0
1
1
1
0
0
5
7
0
1
1
1
0
1
0
1
1
0
0
6
8
0
0
1
0
1
1
1
0
1
1
1
7
9
1
0
0
0
1
1
1
1
0
1
1
7
10
0
0
1
0
1
0
0
1
1
0
1
5
11
1
1
1
1
0
0
0
1
1
1
0
7
DI
7
5
7
5
7
5
6
7
7
5
7
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Similarity Metric
Similarity Metric:
This is a measure defined for a pair of faults
that determines how similar they are in their
independence and concurrent-testability with
respect to the entire fault set of the circuit.
N
SIM (fault-i, fault-j) = Nxij + (1-xij) Σ |xik-xjk|
k=1
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Similarity Metrics
Fault
1
2
3
4
5
6
7
8
9
10
11
1
0
11
11
11
11
11
3
4
11
4
11
2
11
0
4
11
11
6
11
6
4
6
11
3
11
4
0
4
11
11
11
11
0
11
11
4
11
11
4
0
11
6
11
6
4
6
11
5
11
11
11
11
0
4
3
11
11
11
0
6
11
6
11
6
4
0
11
11
11
4
4
7
3
11
11
11
3
11
0
11
11
5
3
8
4
6
11
6
11
11
11
0
11
11
11
9
11
4
0
4
11
11
11
11
0
11
11
10
4
6
11
6
11
4
5
11
11
0
11
11
11
11
11
11
0
4
3
11
11
11
0
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Independence Collapsing
Fault
1
3
5
8
9
11
7
2
4
6
10
DI
1
0
1
1
0
1
1
0
1
1
1
0
7
3
1
0
1
1
0
1
1
0
0
1
1
7
5
1
1
0
1
1
0
0
1
1
0
1
7
8
0
1
1
0
1
1
1
0
0
1
1
7
9
1
0
1
1
0
1
1
0
0
1
1
7
11
1
1
0
1
1
0
0
1
1
0
1
7
7
0
1
0
1
1
0
0
1
1
1
0
6
2
1
0
1
0
0
1
1
0
1
0
0
5
4
1
0
1
0
0
1
1
1
0
0
0
5
6
1
1
0
1
1
0
1
0
0
0
0
5
10
0
1
1
1
1
1
0
0
0
0
0
5
DI
7
7
7
7
7
7
6
5
5
5
5
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Independence Collapsing
F
1
3
5
8
9
11
7
2
4
6
10
1
0
11
11
4
11
11
3
11
11
11
4
3
11
0
11
11
0
11
11
4
4
11
11
5
11
11
0
11
11
0
3
11
11
4
11
8
4
11
11
0
11
11
11
6
6
11
11
9
11
0
11
11
0
11
11
4
4
11
11
11
11
11
0
11
11
0
3
11
11
4
11
7
3
11
3
11
11
3
0
11
11
11
5
2
11
4
11
6
4
11
11
0
11
6
6
4
11
4
11
6
4
11
11
11
0
6
6
6
11
11
4
11
11
4
11
6
6
0
4
10
4
11
11
11
11
11
5
6
6
4
0
11
4
11
03
1,8
1
5,11,7
5,11
5
3,9,2
3,9
3
4,6,10
4,6
4
11
0
4
6
Similarity index for fault F for each existing node i:
Max. SIM (F, kth fault of node i)
where k = 1…..K, and K is number of faults in node i.
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Concurrent test generation for C17
a
2-1
e
x
5-1
1-1
b
c
d
4-1
3-1
7-1
6-1
11-1
9-1
10-1
y
Fault Targets
(a b c d e)
8-1
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Test
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1,8
10010
3,9,2
01111
5,11,7
X1010
4,6,10
10101
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Results (ALU – 74181)
Node
no. Total
1
2
3
4
5
6
7
8
9
10
11
12
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5
3
8
3
5
6
7
14
8
8
8
9
Number of faults
Targeted
Detected from
this
other
node
nodes
5
5
6
3
3
2
7
7
3
3
3
3
3
3
4
6
6
2
4
4
3
11
11
1
6
5
1
4
3
2
3
3
1
2
2
1
VDAT05: Doshi and Agrawal
Test vectors
Cumulative
coverage
11
16
26
32
39
47
54
66
72
77
81
84
01001111010001
01001111110101
01011101000001
101x0101010000
10100101011000
11111000001001
11100000100000
11100110101011
10010100110101
1x101011101100
01010000101100
1x011110001100
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Conclusions and Future Work
•
•
•
•
Faults are reclassified into four classes:
•
•
•
•
Equivalent
Dominant
Independent
Concurrently-testable (also called compatible in the literature)
A new fault collapsing algorithm based on Independent Faults
is introduced.
 This algorithm frequently collapses the graph into a minimal clique.
This work motivates the need for ATPG algorithms for
concurrent fault targets.
The problem of completely determining all edges of the
independence graph is complex.
 The algorithm needs to be extended for incompletely – specified
independence graph.
Aug.13, 2005
VDAT05: Doshi and Agrawal
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Thank You!
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